forked from Openwrt/openwrt
196 lines
3.3 KiB
Plaintext
196 lines
3.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "ar9344.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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aliases {
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led-boot = &led_dlan_red;
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led-failsafe = &led_dlan_red;
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led-running = &led_dlan_white;
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led-upgrade = &led_dlan_red;
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};
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leds {
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compatible = "gpio-leds";
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wlan {
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function = LED_FUNCTION_WLAN;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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led_dlan_white: dlan_white {
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label = "white:dlan";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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};
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led_dlan_red: dlan_red {
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label = "red:dlan";
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gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
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panic-indicator;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "Reset button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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wifi {
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label = "WIFI button";
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linux,code = <KEY_RFKILL>;
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gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
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debounce-interval = <60>;
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};
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dlan {
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label = "DLAN button";
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linux,code = <BTN_0>;
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gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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};
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&gpio {
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wlan_power {
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gpio-hog;
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line-name = "WLAN power";
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gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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};
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&spi {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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uboot: partition@0 {
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label = "u-boot";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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label = "Config1";
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reg = <0x50000 0x10000>;
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read-only;
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};
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partition@60000 {
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label = "Config2";
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reg = <0x60000 0x10000>;
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read-only;
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};
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partition@70000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x70000 0xf80000>;
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};
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partition@ff0000 {
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label = "art";
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reg = <0xff0000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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cal_art_1000: calibration@1000 {
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reg = <0x1000 0x440>;
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};
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macaddr_art_1002: macaddr@1002 {
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compatible = "mac-base";
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reg = <0x1002 0x6>;
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#nvmem-cell-cells = <1>;
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};
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cal_art_5000: calibration@5000 {
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reg = <0x5000 0x844>;
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};
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};
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};
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};
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};
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};
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&ref {
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clock-frequency = <40000000>;
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};
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ð0 {
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status = "okay";
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pll-data = <0x02000000 0x00000101 0x00001616>;
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nvmem-cells = <&macaddr_art_1002 2>;
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nvmem-cell-names = "mac-address";
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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&wmac {
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status = "okay";
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nvmem-cells = <&cal_art_1000>;
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nvmem-cell-names = "calibration";
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};
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&pcie {
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status = "okay";
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wifi@0,0 {
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compatible = "qcom,ath10k";
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reg = <0 0 0 0 0>;
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nvmem-cells = <&cal_art_5000>;
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nvmem-cell-names = "calibration";
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};
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};
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&mdio0 {
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <0>;
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phy-mode = "rgmii";
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qca,ar8327-initvals = <
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/* PORT0: RGMII, MAC0/6 exchange, tx_delay 01, No rx_delay */
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0x04 0x06400000
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0x08 0x00000000 /* PORT5 PAD MODE CTRL */
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0x0c 0x00000000 /* PORT6 PAD MODE CTRL */
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0x7c 0x0000007e /* PORT0_STATUS */
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>;
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};
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};
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