msm8916-openwrt/target/linux/ath79/dts/ar7242.dtsi
Shiji Yang 731318667d ath79: correct dts ngpios properties
SoC Model	GPIO number

ar7100		12
ar7240		18(unknown, default)
ar7241		20
ar7242		18
ar9132		22(unknown, default)
ar9331		30
ar934x		23
qca953x		18
qca955x		24
qca956x		23

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/15784
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-07-04 19:30:37 +02:00

95 lines
1.4 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar724x.dtsi"
/ {
usb_phy: usb-phy {
compatible = "qca,ar7200-usb-phy";
reset-names = "usb-phy", "usb-suspend-override";
resets = <&rst 4>, <&rst 3>;
#phy-cells = <0>;
status = "disabled";
};
};
&gpio {
ngpios = <18>;
};
&ahb {
usb: usb@1b000000 {
compatible = "generic-ehci";
reg = <0x1b000000 0x1000>;
interrupts = <3>;
resets = <&rst 5>;
reset-names = "usb-host";
has-transaction-translator;
caps-offset = <0x100>;
phy-names = "usb-phy";
phys = <&usb_phy>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
hub_port: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};
&mdio0 {
resets = <&rst 22>;
reset-names = "mdio";
};
&eth0 {
compatible = "qca,ar7242-eth", "syscon";
pll-data = <0x16000000 0x00000101 0x00001616>;
pll-reg = <0x4 0x2c 17>;
pll-handle = <&pll>;
resets = <&rst 9>;
reset-names = "mac";
};
&mdio1 {
resets = <&rst 23>;
reset-names = "mdio";
builtin-switch;
builtin_switch: switch0@1f {
compatible = "qca,ar7240sw";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1f>;
resets = <&rst 8>;
reset-names = "switch";
qca,mib-poll-interval = <500>;
};
};
&eth1 {
compatible = "qca,ar7242-eth", "syscon";
resets = <&rst 13>;
reset-names = "mac";
phy-mode = "gmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};