forked from Openwrt/openwrt
731318667d
SoC Model GPIO number ar7100 12 ar7240 18(unknown, default) ar7241 20 ar7242 18 ar9132 22(unknown, default) ar9331 30 ar934x 23 qca953x 18 qca955x 24 qca956x 23 Signed-off-by: Shiji Yang <yangshiji66@qq.com> Link: https://github.com/openwrt/openwrt/pull/15784 Signed-off-by: Robert Marko <robimarko@gmail.com>
100 lines
1.4 KiB
Plaintext
100 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "ar724x.dtsi"
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/ {
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usb_phy: usb-phy {
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compatible = "qca,ar7200-usb-phy";
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reset-names = "usb-phy", "usb-ohci-dll";
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resets = <&rst 4>, <&rst 3>;
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#phy-cells = <0>;
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status = "disabled";
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};
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};
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&gpio {
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ngpios = <18>;
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};
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&ahb {
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usb: usb@1b000000 {
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compatible = "generic-ohci";
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reg = <0x1b000000 0x1000>;
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interrupts = <3>;
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resets = <&rst 5>;
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reset-names = "usb-host";
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phy-names = "usb-phy";
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phys = <&usb_phy>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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hub_port: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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};
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};
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&mdio0 {
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status = "okay";
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compatible = "qca,ar7240-mdio";
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builtin-switch;
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builtin_switch: switch0@1f {
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compatible = "qca,ar7240sw";
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reg = <0x1f>;
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resets = <&rst 8>;
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reset-names = "switch";
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qca,mib-poll-interval = <500>;
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mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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swphy4: ethernet-phy@4 {
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reg = <4>;
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phy-mode = "mii";
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};
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};
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};
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};
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ð0 {
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status = "okay";
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compatible = "qca,ar7240-eth", "syscon";
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pll-data = <0x00110000 0x00001099 0x00991099>;
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resets = <&rst 9>;
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reset-names = "mac";
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phy-handle = <&swphy4>;
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};
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ð1 {
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compatible = "qca,ar7240-eth", "syscon";
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pll-data = <0x00110000 0x00001099 0x00991099>;
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resets = <&rst 13>;
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reset-names = "mac";
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phy-mode = "gmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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