fcabdb9b9d
These are cherry-picked & backported from LKML: *https://lkml.org/lkml/2015/3/17/19 They are enabled on both 3.18 and 4.1 kernel. Patches 150 to 154 are applying changes merged since 3.18; they enable mechanisms used by the ADM driver. ADM engine is used by the NAND controller, so it is necessary to bring-up NAND flash support. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46567
77 lines
2.8 KiB
Diff
77 lines
2.8 KiB
Diff
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Subject: [v6,1/2] dt/bindings: qcom_adm: Fix channel specifiers
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From: Andy Gross <agross@codeaurora.org>
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X-Patchwork-Id: 6027361
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Message-Id: <1426571172-9711-2-git-send-email-agross@codeaurora.org>
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To: Vinod Koul <vinod.koul@intel.com>
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Cc: devicetree@vger.kernel.org, dmaengine@vger.kernel.org,
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linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
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linux-arm-kernel@lists.infradead.org, Kumar Gala <galak@codeaurora.org>,
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Bjorn Andersson <bjorn.andersson@sonymobile.com>,
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Andy Gross <agross@codeaurora.org>
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Date: Tue, 17 Mar 2015 00:46:11 -0500
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This patch removes the crci information from the dma channel property. At least
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one client device requires using more than one CRCI value for a channel. This
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does not match the current binding and the crci information needs to be removed.
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Instead, the client device will provide this information via other means.
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Signed-off-by: Andy Gross <agross@codeaurora.org>
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---
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Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++++++----------
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1 file changed, 6 insertions(+), 10 deletions(-)
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--- a/Documentation/devicetree/bindings/dma/qcom_adm.txt
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+++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt
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@@ -4,8 +4,7 @@ Required properties:
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- compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960
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- reg: Address range for DMA registers
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- interrupts: Should contain one interrupt shared by all channels
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-- #dma-cells: must be <2>. First cell denotes the channel number. Second cell
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- denotes CRCI (client rate control interface) flow control assignment.
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+- #dma-cells: must be <1>. First cell denotes the channel number.
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- clocks: Should contain the core clock and interface clock.
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- clock-names: Must contain "core" for the core clock and "iface" for the
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interface clock.
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@@ -22,7 +21,7 @@ Example:
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compatible = "qcom,adm";
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reg = <0x18300000 0x100000>;
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interrupts = <0 170 0>;
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- #dma-cells = <2>;
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+ #dma-cells = <1>;
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clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
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clock-names = "core", "iface";
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@@ -35,15 +34,12 @@ Example:
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qcom,ee = <0>;
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};
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-DMA clients must use the format descripted in the dma.txt file, using a three
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+DMA clients must use the format descripted in the dma.txt file, using a two
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cell specifier for each channel.
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-Each dmas request consists of 3 cells:
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+Each dmas request consists of two cells:
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1. phandle pointing to the DMA controller
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2. channel number
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- 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0.
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- The CRCI is used for flow control. It identifies the peripheral device that
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- is the source/destination for the transferred data.
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Example:
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@@ -56,7 +52,7 @@ Example:
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cs-gpios = <&qcom_pinmux 20 0>;
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- dmas = <&adm_dma 6 9>,
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- <&adm_dma 5 10>;
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+ dmas = <&adm_dma 6>,
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+ <&adm_dma 5>;
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dma-names = "rx", "tx";
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};
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