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openwrt/target/linux/generic/hack-6.6/766-net-phy-mediatek-ge-add-LED-configuration-interface.patch
Christian Marangi 081cfb3a24 generic: reintroduce Mediatek PHY patch to backport directory
Mediatek PHY patch has been merged upstream. Reintroduce them to
backport directory as the same PHY is also needed for Airoha target.

All the affected patch automatically refreshed.

Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-09-03 00:58:49 +02:00

73 lines
1.9 KiB
Diff

From cc225d163b5a4f7a0d1968298bf7927306646a47 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Fri, 28 Apr 2023 01:53:01 +0200
Subject: [PATCH] net: phy: mediatek-ge: add LED configuration interface
This adds a small hack similar to the one used for ar8xxx switches to
read a reg:value map for configuring the LED configuration registers.
This allows OpenWrt to write device-specific LED action as well as blink
configurations. It is unlikely to be accepted upstream, as upstream
plans on integrating their own framework for handling these LEDs.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
drivers/net/phy/mediatek/mtk-ge.c | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
--- a/drivers/net/phy/mediatek/mtk-ge.c
+++ b/drivers/net/phy/mediatek/mtk-ge.c
@@ -1,4 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
+#include <linux/of.h>
#include <linux/bitfield.h>
#include <linux/module.h>
#include <linux/phy.h>
@@ -76,6 +77,36 @@ static int mt7530_phy_config_init(struct
return 0;
}
+static int mt7530_led_config_of(struct phy_device *phydev)
+{
+ struct device_node *np = phydev->mdio.dev.of_node;
+ const __be32 *paddr;
+ int len;
+ int i;
+
+ paddr = of_get_property(np, "mediatek,led-config", &len);
+ if (!paddr)
+ return 0;
+
+ if (len < (2 * sizeof(*paddr)))
+ return -EINVAL;
+
+ len /= sizeof(*paddr);
+
+ phydev_warn(phydev, "Configure LED registers (num=%d)\n", len);
+ for (i = 0; i < len - 1; i += 2) {
+ u32 reg;
+ u32 val;
+
+ reg = be32_to_cpup(paddr + i);
+ val = be32_to_cpup(paddr + i + 1);
+
+ phy_write_mmd(phydev, MDIO_MMD_VEND2, reg, val);
+ }
+
+ return 0;
+}
+
static int mt7531_phy_config_init(struct phy_device *phydev)
{
mtk_gephy_config_init(phydev);
@@ -96,6 +127,9 @@ static int mt7531_phy_config_init(struct
FIELD_PREP(MTK_TX_DELAY_PAIR_B_MASK, 0x4) |
FIELD_PREP(MTK_TX_DELAY_PAIR_D_MASK, 0x4));
+ /* LED Config*/
+ mt7530_led_config_of(phydev);
+
return 0;
}