4589fa38c5
Initial conversion to new LED color/function format and drop label format where possible. The same label is composed at runtime. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
369 lines
6.9 KiB
Plaintext
369 lines
6.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later or MIT
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/include/ "fsl/p1020si-pre.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "Extreme Networks WS-AP3825i";
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compatible = "extreme-networks,ws-ap3825i";
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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ethernet0 = &enet0;
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ethernet1 = &enet2;
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led-boot = &led_power_green;
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led-failsafe = &led_power_red;
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led-running = &led_power_green;
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led-upgrade = &led_power_red;
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};
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chosen {
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bootargs-override = "console=ttyS0,115200";
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stdout-path = &serial0;
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};
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memory {
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device_type = "memory";
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};
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leds {
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compatible = "gpio-leds";
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wifi1 {
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gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>;
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label = "green:radio1";
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linux,default-trigger = "phy0tpt";
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};
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wifi2 {
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gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>;
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label = "green:radio2";
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linux,default-trigger = "phy1tpt";
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};
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led_power_green: power_green {
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gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>;
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_GREEN>;
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};
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led_power_red: power_red {
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gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>;
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_RED>;
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};
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lan1_red {
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gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>;
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label = "red:lan1";
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};
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lan1_green {
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gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>;
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label = "green:lan1";
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};
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lan2_red {
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gpios = <&spi_gpio 7 GPIO_ACTIVE_HIGH>;
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label = "red:lan2";
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};
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lan2_green {
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gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>;
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label = "green:lan2";
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "Reset button";
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gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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lbc: localbus@ffe05000 {
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reg = <0 0xffe05000 0 0x1000>;
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ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
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nor@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x4000000>;
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bank-width = <2>;
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device-width = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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compatible = "denx,fit";
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reg = <0x0 0x3d60000>;
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label = "firmware";
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};
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partition@3d60000 {
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reg = <0x3d60000 0x20000>;
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label = "calib";
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read-only;
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};
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partition@3d80000{
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reg = <0x3d80000 0x80000>;
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label = "u-boot";
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read-only;
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};
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partition@3e00000{
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reg = <0x3e00000 0x100000>;
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label = "nvram";
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read-only;
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};
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partition@3f00000 {
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reg = <0x3f00000 0x20000>;
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label = "cfg2";
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};
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partition@3f20000 {
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reg = <0x3f20000 0x20000>;
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label = "cfg1";
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};
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};
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};
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};
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soc: soc@ffe00000 {
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ranges = <0x0 0x0 0xffe00000 0x100000>;
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gpio0: gpio-controller@fc00 {
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};
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mdio@24000 {
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phy0: ethernet-phy@0 {
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/* interrupts = <3 1 0 0>; */
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reg = <0x5>;
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reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <10000>;
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};
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phy2: ethernet-phy@2 {
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/* interrupts = <1 1 0 0>; */
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reg = <0x6>;
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reset-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <10000>;
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};
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};
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mdio@25000 {
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status = "disabled";
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};
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mdio@26000 {
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status = "disabled";
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};
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enet0: ethernet@b0000 {
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status = "okay";
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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};
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enet1: ethernet@b1000 {
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status = "disabled";
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};
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enet2: ethernet@b2000 {
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status = "okay";
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phy-handle = <&phy2>;
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phy-connection-type = "rgmii-id";
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};
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usb@22000 {
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phy_type = "ulpi";
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dr_mode = "host";
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};
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usb@23000 {
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status = "disabled";
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};
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};
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pci0: pcie@ffe09000 {
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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reg = <0 0xffe09000 0 0x1000>;
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/* Filled by U-Boot */
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bus-range = <0x00 0x01>;
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dma-ranges = <0x2000000 0x00 0xfff00000 0x00 0xffe00000
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0x00 0x100000 0x42000000 0x00 0x00 0x00
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0x00 0x00 0x10000000>;
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pcie@0 {
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ranges = <0x2000000 0x0 0xa0000000
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0x2000000 0x0 0xa0000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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pci1: pcie@ffe0a000 {
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reg = <0 0xffe0a000 0 0x1000>;
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ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
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/* Filled by U-Boot */
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bus-range = <0x00 0x01>;
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dma-ranges = <0x2000000 0x00 0xfff00000 0x00
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0xffe00000 0x00 0x100000 0x42000000
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0x00 0x00 0x00 0x00 0x00 0x10000000>;
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pcie@0 {
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ranges = <0x2000000 0x0 0x80000000
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0x2000000 0x0 0x80000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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};
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&soc {
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led_spi {
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/*
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* This is currently non-functioning because the spi-gpio
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* driver refuses to register when presented with this node.
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*/
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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sck-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
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mosi-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
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num-chipselects = <0>;
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spi_gpio: led_gpio@0 {
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compatible = "fairchild,74hc595";
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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registers-number = <1>;
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spi-max-frequency = <100000>;
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};
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};
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};
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/include/ "fsl/p1020si-post.dtsi"
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/ {
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cpus {
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PowerPC,P1020@0 {
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bus-frequency = <399999996>;
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timebase-frequency = <50000000>;
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clock-frequency = <799999992>;
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d-cache-block-size = <0x20>;
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d-cache-size = <0x8000>;
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d-cache-sets = <0x80>;
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i-cache-block-size = <0x20>;
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i-cache-size = <0x8000>;
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i-cache-sets = <0x80>;
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cpu-release-addr = <0x0 0x0ffff280>;
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status = "okay";
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enable-method = "spin-table";
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};
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PowerPC,P1020@1 {
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bus-frequency = <399999996>;
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timebase-frequency = <50000000>;
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clock-frequency = <799999992>;
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d-cache-block-size = <0x20>;
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d-cache-size = <0x8000>;
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d-cache-sets = <0x80>;
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i-cache-block-size = <0x20>;
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i-cache-size = <0x8000>;
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i-cache-sets = <0x80>;
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cpu-release-addr = <0x0 0x0ffff2a0>;
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status = "disabled";
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enable-method = "spin-table";
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};
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};
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memory {
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reg = <0x0 0x0 0x0 0x10000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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cpu1-bootpage@ff00000 {
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/* Reserve upper 1 MB for second-core-bootpage */
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reg = <0x0 0xff00000 0x0 0x100000>;
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};
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};
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soc@ffe00000 {
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bus-frequency = <399999996>;
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serial@4600 {
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clock-frequency = <399999996>;
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};
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serial@4500 {
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clock-frequency = <399999996>;
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};
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pic@40000 {
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clock-frequency = <399999996>;
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};
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};
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localbus@ffe05000 {
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bus-frequency = <24999999>;
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};
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};
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&enet0 {
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rx-stash-idx = <0x00>;
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rx-stash-len = <0x60>;
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bd-stash;
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};
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&enet2 {
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rx-stash-idx = <0x00>;
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rx-stash-len = <0x60>;
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bd-stash;
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};
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/*
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* For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
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* aliases to determine PCI domain numbers, drop aliases so as not to
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* change the sysfs path of our wireless netdevs.
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*/
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/ {
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aliases {
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/delete-property/ pci0;
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/delete-property/ pci1;
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};
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};
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