380 lines
6.9 KiB
Plaintext
380 lines
6.9 KiB
Plaintext
/*
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* TP-Link TL-WDR4900 v1 Device Tree Source
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*
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* Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/include/ "fsl/p1010si-pre.dtsi"
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/ {
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model = "TP-Link TL-WDR4900 v1";
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compatible = "tplink,tl-wdr4900-v1";
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chosen {
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bootargs = "console=ttyS0,115200";
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/*
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stdout-path = "/soc@ffe00000/serial@4500";
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*/
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};
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aliases {
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spi0 = &spi0;
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led-boot = &system_green;
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led-failsafe = &system_green;
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led-running = &system_green;
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led-upgrade = &system_green;
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label-mac-device = &enet0;
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};
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memory {
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device_type = "memory";
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};
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soc: soc@ffe00000 {
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ranges = <0x0 0x0 0xffe00000 0x100000>;
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spi0: spi@7000 {
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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uboot: partition@0 {
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reg = <0x0 0x0050000>;
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label = "u-boot";
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_uboot_4fc00: macaddr@4fc00 {
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reg = <0x4fc00 0x6>;
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};
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};
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};
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partition@50000 {
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reg = <0x00050000 0x00010000>;
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label = "dtb";
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read-only;
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};
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partition@60000 {
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compatible = "tplink,firmware";
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reg = <0x00060000 0x00f80000>;
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label = "firmware";
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};
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partition@fe0000 {
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reg = <0x00fe0000 0x00010000>;
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label = "config";
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read-only;
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};
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partition@ff0000 {
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reg = <0x00ff0000 0x00010000>;
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label = "caldata";
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read-only;
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};
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};
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};
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};
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gpio0: gpio-controller@fc00 {
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};
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usb@22000 {
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phy_type = "utmi";
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dr_mode = "host";
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};
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mdio@24000 {
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phy_port1: phy@0 {
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reg = <0>;
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};
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phy_port2: phy@1 {
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reg = <1>;
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};
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phy_port3: phy@2 {
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reg = <2>;
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};
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phy_port4: phy@3 {
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reg = <3>;
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};
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phy_port5: phy@4 {
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reg = <4>;
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};
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switch@10 {
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compatible = "qca,qca8327";
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reg = <0x10>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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ethernet = <&enet0>;
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phy-mode = "rgmii-id";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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port@1 {
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reg = <1>;
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label = "wan";
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phy-handle = <&phy_port1>;
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};
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port@2 {
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reg = <2>;
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label = "lan1";
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phy-handle = <&phy_port2>;
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};
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port@3 {
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reg = <3>;
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label = "lan2";
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phy-handle = <&phy_port3>;
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};
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port@4 {
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reg = <4>;
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label = "lan3";
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phy-handle = <&phy_port4>;
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};
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port@5 {
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reg = <5>;
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label = "lan4";
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phy-handle = <&phy_port5>;
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};
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};
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};
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};
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mdio@25000 {
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status = "disabled";
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};
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mdio@26000 {
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status = "disabled";
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};
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enet0: ethernet@b0000 {
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phy-connection-type = "rgmii-id";
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nvmem-cells = <&macaddr_uboot_4fc00>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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enet1: ethernet@b1000 {
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status = "disabled";
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};
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enet2: ethernet@b2000 {
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status = "disabled";
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};
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sdhc@2e000 {
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status = "disabled";
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};
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serial1: serial@4600 {
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status = "disabled";
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};
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can0: can@1c000 {
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status = "disabled";
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};
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can1: can@1d000 {
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status = "disabled";
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};
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ptp_clock@b0e00 {
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compatible = "fsl,etsec-ptp";
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reg = <0xb0e00 0xb0>;
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interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
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fsl,cksel = <1>;
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fsl,tclk-period = <5>;
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fsl,tmr-prsc = <2>;
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fsl,tmr-add = <0xcccccccd>;
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fsl,tmr-fiper1 = <0x3b9ac9fb>; /* 1PPS */
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fsl,tmr-fiper2 = <0x00018696>;
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fsl,max-adj = <249999999>;
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};
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};
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pci0: pcie@ffe09000 {
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reg = <0 0xffe09000 0 0x1000>;
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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pcie@0 {
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ranges = <0x2000000 0x0 0xa0000000
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0x2000000 0x0 0xa0000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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pci1: pcie@ffe0a000 {
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reg = <0 0xffe0a000 0 0x1000>;
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ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
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pcie@0 {
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ranges = <0x2000000 0x0 0x80000000
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0x2000000 0x0 0x80000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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ifc: ifc@ffe1e000 {
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status = "disabled";
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};
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leds {
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compatible = "gpio-leds";
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system_green: system {
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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label = "tp-link:blue:system";
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};
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usb1 {
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gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
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label = "tp-link:green:usb1";
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};
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usb2 {
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gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
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label = "tp-link:green:usb2";
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};
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usbpower {
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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label = "tp-link:usb:power";
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};
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};
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buttons {
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compatible = "gpio-keys";
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reset {
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label = "Reset button";
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gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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rfkill {
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label = "RFKILL switch";
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gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RFKILL>;
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};
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};
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};
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/include/ "fsl/p1010si-post.dtsi"
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/ {
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cpus {
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PowerPC,P1010@0 {
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bus-frequency = <399999996>;
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timebase-frequency = <49999999>;
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clock-frequency = <799999992>;
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};
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};
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memory {
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reg = <0x0 0x0 0x0 0x8000000>;
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};
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soc@ffe00000 {
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bus-frequency = <399999996>;
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serial@4600 {
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clock-frequency = <399999996>;
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};
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serial@4500 {
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clock-frequency = <399999996>;
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};
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pic@40000 {
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clock-frequency = <399999996>;
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};
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};
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};
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/*
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* The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
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* related to the P1010.
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*
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* NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
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* datasheet states that the P1014 does not include the accelerated crypto
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* module (CAAM/SEC4) which is present in the P1010.
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*
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* NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
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* SEC4 module, but states that SoCs with System Version Register values
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* 0x80F10110 or 0x80F10120 do not have the security feature.
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*
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* All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
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* as: core rev 1.0, "P1014 (without security)".
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*
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* The SVR value is reported by uboot on the serial console.
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*/
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/ {
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soc: soc@ffe00000 {
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/delete-node/ crypto@30000; /* Pulled in by p1010si-post */
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};
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};
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/*
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* For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
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* aliases to determine PCI domain numbers, drop aliases so as not to
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* change the sysfs path of our wireless netdevs.
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*/
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/ {
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aliases {
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/delete-property/ pci0;
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/delete-property/ pci1;
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};
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};
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