640b0b79ff
Hardware specification: SoC: MediaTek MT7981B 2x A53 Flash: 8GB eMMC or 128 MB SPI-NAND RAM: 256MB Ethernet: 5x 10/100/1000 Mbps Switch: MediaTek MT7531AE WiFi: MediaTek MT7976C Button: Reset USB: M.2(B-key) for 4G/5G Module Power: DC 12V 1A UART: 3.3v, 115200n8 -------------------------- | Layout | | ----------------- | | 4 | VCC RX TX GND | <= | | ----------------- | -------------------------- The U-boot menu will automatically appear at startup, and then select the required options through UP/DOWN Key. NAND Flash and eMMC Flash instructions: 1. Set your computers IP adress to 192.168.1.2. 2. Run a TFTP server providing the sysupgrade.bin image. 3. Power on the router, into the U-Boot menu. 4. Select "2. Upgrade firmware" 5. Update sysupgrade.bin file name, input server IP and input device IP (if they deviate from the defaults) 6. Wait for automatic startup after burning Signed-off-by: Allen Zhao <allenzhao@unielecinc.com>
117 lines
2.2 KiB
Plaintext
117 lines
2.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
/*
|
|
* Copyright (C) 2023 Allen Zhao <allenzhao@unielecinc.com>
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "mt7981b-unielec-u7981-01.dtsi"
|
|
/ {
|
|
model = "Unielec U7981-01 (NAND)";
|
|
compatible = "unielec,u7981-01-nand", "mediatek,mt7981";
|
|
};
|
|
|
|
&spi0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi0_flash_pins>;
|
|
status = "okay";
|
|
spi_nand: spi_nand@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "spi-nand";
|
|
reg = <0>;
|
|
spi-max-frequency = <52000000>;
|
|
spi-tx-buswidth = <4>;
|
|
spi-rx-buswidth = <4>;
|
|
|
|
mediatek,nmbm;
|
|
mediatek,bmt-max-ratio = <1>;
|
|
mediatek,bmt-max-reserved-blocks = <64>;
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "bl2";
|
|
reg = <0x00000 0x0100000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@100000 {
|
|
label = "u-boot-env";
|
|
reg = <0x0100000 0x0080000>;
|
|
};
|
|
|
|
factory: partition@180000 {
|
|
label = "factory";
|
|
reg = <0x180000 0x200000>;
|
|
read-only;
|
|
|
|
compatible = "nvmem-cells";
|
|
nvmem-layout {
|
|
compatible = "fixed-layout";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
eeprom_factory_0: eeprom@0 {
|
|
reg = <0x0 0x1000>;
|
|
};
|
|
|
|
macaddr_factory_1000: macaddr@1000 {
|
|
compatible = "mac-base";
|
|
reg = <0x1000 0x6>;
|
|
#nvmem-cell-cells = <1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
partition@380000 {
|
|
label = "fip";
|
|
reg = <0x380000 0x0200000>;
|
|
};
|
|
|
|
partition@580000 {
|
|
label = "ubi";
|
|
reg = <0x580000 0x4000000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pio {
|
|
spi0_flash_pins: spi0-pins {
|
|
mux {
|
|
function = "spi";
|
|
groups = "spi0", "spi0_wp_hold";
|
|
};
|
|
|
|
conf-pu {
|
|
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
|
|
drive-strength = <8>;
|
|
mediatek,pull-up-adv = <0>; /* bias-disable */
|
|
};
|
|
|
|
conf-pd {
|
|
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
|
|
drive-strength = <8>;
|
|
mediatek,pull-up-adv = <0>; /* bias-disable */
|
|
};
|
|
};
|
|
};
|
|
|
|
&gmac0 {
|
|
nvmem-cells = <&macaddr_factory_1000 0>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
&gmac1 {
|
|
nvmem-cells = <&macaddr_factory_1000 1>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
&wifi {
|
|
nvmem-cells = <&eeprom_factory_0>;
|
|
nvmem-cell-names = "eeprom";
|
|
status = "okay";
|
|
};
|