5f307b29cd
Add a set of upstream patches for the imx8m{m,n,p} based Venice
boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/15736
Signed-off-by: Robert Marko <robimarko@gmail.com>
46 lines
1.2 KiB
Diff
46 lines
1.2 KiB
Diff
From f905e9a03cdf8edf6fa719ba89f37e6138c33834 Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Tue, 21 Nov 2023 11:44:38 -0800
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Subject: [PATCH 408/413] 6.9: arm64: dts: imx8mm-venice-gw7901: add TPM device
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Add the TPM device found on the GW7901 revision D PCB.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts | 10 +++++++++-
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1 file changed, 9 insertions(+), 1 deletion(-)
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--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
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+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
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@@ -285,7 +285,8 @@
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1>;
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- cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
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+ cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>,
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+ <&gpio4 24 GPIO_ACTIVE_LOW>;
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status = "okay";
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flash@0 {
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@@ -294,6 +295,12 @@
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spi-max-frequency = <40000000>;
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status = "okay";
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};
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+
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+ tpm@1 {
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+ compatible = "tcg,tpm_tis-spi";
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+ reg = <0x1>;
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+ spi-max-frequency = <36000000>;
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+ };
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};
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&fec1 {
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@@ -989,6 +996,7 @@
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MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
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MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
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MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x140
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+ MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x140
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>;
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};
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