c2c741ccce
Initial backport of at803x PHY driver cleanup. This is in preparation for split and addition of new PHY Family based on at803x needed for ipq807x and other IPQ Series SoC. Other affected patch are automatically refreshed with make target/linux/refresh Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
99 lines
3.0 KiB
Diff
99 lines
3.0 KiB
Diff
From df9401ff3e6eeaa42bfb06761967f1b71f5afce7 Mon Sep 17 00:00:00 2001
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From: Luo Jie <quic_luoj@quicinc.com>
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Date: Sun, 16 Jul 2023 16:49:23 +0800
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Subject: [PATCH 5/6] net: phy: at803x: remove qca8081 1G fast retrain and
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slave seed config
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The fast retrain and slave seed configs are only applicable when the 2.5G
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ability is supported.
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Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/phy/at803x.c | 50 +++++++++++++++++++++++++---------------
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1 file changed, 32 insertions(+), 18 deletions(-)
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--- a/drivers/net/phy/at803x.c
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+++ b/drivers/net/phy/at803x.c
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@@ -1755,6 +1755,11 @@ static bool qca808x_is_prefer_master(str
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(phydev->master_slave_get == MASTER_SLAVE_CFG_MASTER_PREFERRED);
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}
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+static bool qca808x_has_fast_retrain_or_slave_seed(struct phy_device *phydev)
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+{
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+ return linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported);
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+}
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+
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static int qca808x_config_init(struct phy_device *phydev)
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{
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int ret;
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@@ -1771,20 +1776,24 @@ static int qca808x_config_init(struct ph
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if (ret)
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return ret;
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- /* Config the fast retrain for the link 2500M */
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- ret = qca808x_phy_fast_retrain_config(phydev);
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- if (ret)
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- return ret;
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-
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- ret = genphy_read_master_slave(phydev);
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- if (ret < 0)
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- return ret;
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-
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- if (!qca808x_is_prefer_master(phydev)) {
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- /* Enable seed and configure lower ramdom seed to make phy linked as slave mode */
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- ret = qca808x_phy_ms_seed_enable(phydev, true);
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+ if (qca808x_has_fast_retrain_or_slave_seed(phydev)) {
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+ /* Config the fast retrain for the link 2500M */
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+ ret = qca808x_phy_fast_retrain_config(phydev);
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if (ret)
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return ret;
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+
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+ ret = genphy_read_master_slave(phydev);
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+ if (ret < 0)
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+ return ret;
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+
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+ if (!qca808x_is_prefer_master(phydev)) {
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+ /* Enable seed and configure lower ramdom seed to make phy
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+ * linked as slave mode.
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+ */
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+ ret = qca808x_phy_ms_seed_enable(phydev, true);
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+ if (ret)
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+ return ret;
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+ }
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}
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/* Configure adc threshold as 100mv for the link 10M */
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@@ -1826,11 +1835,13 @@ static int qca808x_read_status(struct ph
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* value is configured as the same value, the link can't be up and no link change
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* occurs.
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*/
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- if (phydev->master_slave_state == MASTER_SLAVE_STATE_ERR ||
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- qca808x_is_prefer_master(phydev)) {
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- qca808x_phy_ms_seed_enable(phydev, false);
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- } else {
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- qca808x_phy_ms_seed_enable(phydev, true);
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+ if (qca808x_has_fast_retrain_or_slave_seed(phydev)) {
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+ if (phydev->master_slave_state == MASTER_SLAVE_STATE_ERR ||
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+ qca808x_is_prefer_master(phydev)) {
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+ qca808x_phy_ms_seed_enable(phydev, false);
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+ } else {
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+ qca808x_phy_ms_seed_enable(phydev, true);
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+ }
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}
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}
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@@ -1845,7 +1856,10 @@ static int qca808x_soft_reset(struct phy
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if (ret < 0)
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return ret;
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- return qca808x_phy_ms_seed_enable(phydev, true);
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+ if (qca808x_has_fast_retrain_or_slave_seed(phydev))
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+ ret = qca808x_phy_ms_seed_enable(phydev, true);
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+
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+ return ret;
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}
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static bool qca808x_cdt_fault_length_valid(int cdt_code)
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