aab466f422
Backport generic phylink validate series and make use of it for mtk_eth_soc Ethernet driver as well as mt7530 DSA driver. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
39 lines
1.5 KiB
Diff
39 lines
1.5 KiB
Diff
From 650a49bc65df6b0e0051a8f62d7c22d95a8f350d Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Wed, 18 May 2022 15:55:07 +0100
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Subject: [PATCH 08/12] net: mtk_eth_soc: add fixme comment for state->speed
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use
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Add a fixme comment for the last remaining incorrect usage of
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state->speed in the mac_config() method, which is strangely in a code
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path which is only run when the PHY interface mode changes.
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This means if we are in RGMII mode, changes in state->speed will not
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cause the INTF_MODE, TRGMII_RCK_CTRL and TRGMII_TCK_CTRL registers to
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be set according to the speed, nor will the TRGPLL clock be set to the
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correct value.
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/mediatek/mtk_eth_soc.c | 8 ++++++++
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1 file changed, 8 insertions(+)
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -374,6 +374,14 @@ static void mtk_mac_config(struct phylin
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state->interface))
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goto err_phy;
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} else {
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+ /* FIXME: this is incorrect. Not only does it
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+ * use state->speed (which is not guaranteed
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+ * to be correct) but it also makes use of it
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+ * in a code path that will only be reachable
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+ * when the PHY interface mode changes, not
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+ * when the speed changes. Consequently, RGMII
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+ * is probably broken.
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+ */
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mtk_gmac0_rgmii_adjust(mac->hw,
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state->interface,
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state->speed);
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