6951526792
1. Rename function _do_env_set() to env_do_env_set(). 2. Replace kwbimage hack with UBOOT_CUSTOMIZE_CONFIG: "--disable TOOLS_KWBIMAGE" and "--disable TOOLS_LIBCRYPTO". 3. Disable CONFIG_CMD_BOOTEFI_BOOTMGR for all supported devices because the newly added UEFI bootmenu entries doesn't work. 4. Enable CONFIG_VERSION_VARIABLE for the OpenWrt One. Signed-off-by: Shiji Yang <yangshiji66@qq.com> Co-authored-by: Daniel Golle <daniel@makrotopia.org>
77 lines
3.0 KiB
Diff
77 lines
3.0 KiB
Diff
From a2df2df6fd1aec32572c7b30ccf5a184ec1763fd Mon Sep 17 00:00:00 2001
|
|
From: Weijie Gao <weijie.gao@mediatek.com>
|
|
Date: Wed, 27 Jul 2022 16:32:17 +0800
|
|
Subject: [PATCH 56/71] mtd: spi-nor: add more flash ids
|
|
|
|
Add more spi-nor flash ids
|
|
|
|
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
|
|
---
|
|
drivers/mtd/spi/spi-nor-core.c | 1 +
|
|
drivers/mtd/spi/spi-nor-ids.c | 23 ++++++++++++++++++++++-
|
|
2 files changed, 23 insertions(+), 1 deletion(-)
|
|
|
|
--- a/drivers/mtd/spi/spi-nor-core.c
|
|
+++ b/drivers/mtd/spi/spi-nor-core.c
|
|
@@ -698,6 +698,7 @@ static int set_4byte(struct spi_nor *nor
|
|
case SNOR_MFR_ISSI:
|
|
case SNOR_MFR_MACRONIX:
|
|
case SNOR_MFR_WINBOND:
|
|
+ case SNOR_MFR_EON:
|
|
if (need_wren)
|
|
write_enable(nor);
|
|
|
|
--- a/drivers/mtd/spi/spi-nor-ids.c
|
|
+++ b/drivers/mtd/spi/spi-nor-ids.c
|
|
@@ -84,7 +84,8 @@ const struct flash_info spi_nor_ids[] =
|
|
{ INFO("en25q32b", 0x1c3016, 0, 64 * 1024, 64, 0) },
|
|
{ INFO("en25q64", 0x1c3017, 0, 64 * 1024, 128, SECT_4K) },
|
|
{ INFO("en25q128b", 0x1c3018, 0, 64 * 1024, 256, 0) },
|
|
- { INFO("en25qh128", 0x1c7018, 0, 64 * 1024, 256, 0) },
|
|
+ { INFO("en25qh128", 0x1c7018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
+ { INFO("en25qh256", 0x1c7019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
{ INFO("en25s64", 0x1c3817, 0, 64 * 1024, 128, SECT_4K) },
|
|
#endif
|
|
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
|
|
@@ -150,6 +151,11 @@ const struct flash_info spi_nor_ids[] =
|
|
{INFO("gd55x02g", 0xc8481C, 0, 64 * 1024, 4096, SECT_4K |
|
|
SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)},
|
|
{
|
|
+ INFO("gd25q256", 0xc84019, 0, 64 * 1024, 512,
|
|
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
|
|
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
|
|
+ },
|
|
+ {
|
|
INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
|
|
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
|
|
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
|
|
@@ -489,6 +495,16 @@ const struct flash_info spi_nor_ids[] =
|
|
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
|
|
},
|
|
{
|
|
+ INFO("w25q256jv", 0xef7019, 0, 64 * 1024, 512,
|
|
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
|
|
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
|
|
+ },
|
|
+ {
|
|
+ INFO("w25q512jv", 0xef7020, 0, 64 * 1024, 1024,
|
|
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
|
|
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
|
|
+ },
|
|
+ {
|
|
INFO("w25q128jw", 0xef8018, 0, 64 * 1024, 256,
|
|
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
|
|
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
|
|
@@ -548,6 +564,11 @@ const struct flash_info spi_nor_ids[] =
|
|
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
|
|
},
|
|
{ INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
+ {
|
|
+ INFO("w25q512", 0xef4020, 0, 64 * 1024, 1024,
|
|
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
|
|
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
|
|
+ },
|
|
{ INFO("w25m512jw", 0xef6119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
{ INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
{ INFO("w25h02jv", 0xef9022, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|