d2964ddd6b
Changes in 4.9.176 x86/MCE: Save microcode revision in machine check records x86/cpufeatures: Hide AMD-specific speculation flags x86/bugs: Add AMD's variant of SSB_NO x86/bugs: Add AMD's SPEC_CTRL MSR usage x86/bugs: Switch the selection of mitigation from CPU vendor to CPU features x86/bugs: Fix the AMD SSBD usage of the SPEC_CTRL MSR x86/microcode/intel: Add a helper which gives the microcode revision x86/microcode/intel: Check microcode revision before updating sibling threads x86/microcode: Make sure boot_cpu_data.microcode is up-to-date x86/microcode: Update the new microcode revision unconditionally x86/mm: Use WRITE_ONCE() when setting PTEs bitops: avoid integer overflow in GENMASK(_ULL) x86/speculation: Simplify the CPU bug detection logic locking/atomics, asm-generic: Move some macros from <linux/bitops.h> to a new <linux/bits.h> file x86/speculation: Remove SPECTRE_V2_IBRS in enum spectre_v2_mitigation x86/cpu: Sanitize FAM6_ATOM naming Documentation/l1tf: Fix small spelling typo x86/speculation: Apply IBPB more strictly to avoid cross-process data leak x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigation x86/speculation: Propagate information about RSB filling mitigation to sysfs x86/speculation/l1tf: Drop the swap storage limit restriction when l1tf=off x86/speculation: Update the TIF_SSBD comment x86/speculation: Clean up spectre_v2_parse_cmdline() x86/speculation: Remove unnecessary ret variable in cpu_show_common() x86/speculation: Move STIPB/IBPB string conditionals out of cpu_show_common() x86/speculation: Disable STIBP when enhanced IBRS is in use x86/speculation: Rename SSBD update functions x86/speculation: Reorganize speculation control MSRs update x86/Kconfig: Select SCHED_SMT if SMP enabled sched: Add sched_smt_active() x86/speculation: Rework SMT state change x86/l1tf: Show actual SMT state x86/speculation: Reorder the spec_v2 code x86/speculation: Mark string arrays const correctly x86/speculataion: Mark command line parser data __initdata x86/speculation: Unify conditional spectre v2 print functions x86/speculation: Add command line control for indirect branch speculation x86/speculation: Prepare for per task indirect branch speculation control x86/process: Consolidate and simplify switch_to_xtra() code x86/speculation: Avoid __switch_to_xtra() calls x86/speculation: Prepare for conditional IBPB in switch_mm() x86/speculation: Split out TIF update x86/speculation: Prepare arch_smt_update() for PRCTL mode x86/speculation: Prevent stale SPEC_CTRL msr content x86/speculation: Add prctl() control for indirect branch speculation x86/speculation: Enable prctl mode for spectre_v2_user x86/speculation: Add seccomp Spectre v2 user space protection mode x86/speculation: Provide IBPB always command line options kvm: x86: Report STIBP on GET_SUPPORTED_CPUID x86/msr-index: Cleanup bit defines x86/speculation: Consolidate CPU whitelists x86/speculation/mds: Add basic bug infrastructure for MDS x86/speculation/mds: Add BUG_MSBDS_ONLY x86/kvm: Expose X86_FEATURE_MD_CLEAR to guests x86/speculation/mds: Add mds_clear_cpu_buffers() x86/speculation/mds: Clear CPU buffers on exit to user x86/kvm/vmx: Add MDS protection when L1D Flush is not active x86/speculation/mds: Conditionally clear CPU buffers on idle entry x86/speculation/mds: Add mitigation control for MDS x86/speculation/mds: Add sysfs reporting for MDS x86/speculation/mds: Add mitigation mode VMWERV Documentation: Move L1TF to separate directory Documentation: Add MDS vulnerability documentation x86/speculation/mds: Add mds=full,nosmt cmdline option x86/speculation: Move arch_smt_update() call to after mitigation decisions x86/speculation/mds: Add SMT warning message x86/speculation/mds: Fix comment x86/speculation/mds: Print SMT vulnerable on MSBDS with mitigations off cpu/speculation: Add 'mitigations=' cmdline option x86/speculation: Support 'mitigations=' cmdline option x86/speculation/mds: Add 'mitigations=' support for MDS x86/mds: Add MDSUM variant to the MDS documentation Documentation: Correct the possible MDS sysfs values x86/speculation/mds: Fix documentation typo x86: stop exporting msr-index.h to userland x86/cpu/bugs: Use __initconst for 'const' init data Linux 4.9.176 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
110 lines
2.8 KiB
C
110 lines
2.8 KiB
C
/*
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* intel_soc_dts_thermal.c
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* Copyright (c) 2014, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include "intel_soc_dts_iosf.h"
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#define CRITICAL_OFFSET_FROM_TJ_MAX 5000
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static int crit_offset = CRITICAL_OFFSET_FROM_TJ_MAX;
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module_param(crit_offset, int, 0644);
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MODULE_PARM_DESC(crit_offset,
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"Critical Temperature offset from tj max in millidegree Celsius.");
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/* IRQ 86 is a fixed APIC interrupt for BYT DTS Aux threshold notifications */
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#define BYT_SOC_DTS_APIC_IRQ 86
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static int soc_dts_thres_irq;
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static struct intel_soc_dts_sensors *soc_dts;
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static irqreturn_t soc_irq_thread_fn(int irq, void *dev_data)
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{
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pr_debug("proc_thermal_interrupt\n");
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intel_soc_dts_iosf_interrupt_handler(soc_dts);
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return IRQ_HANDLED;
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}
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static const struct x86_cpu_id soc_thermal_ids[] = {
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT, 0,
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BYT_SOC_DTS_APIC_IRQ},
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, soc_thermal_ids);
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static int __init intel_soc_thermal_init(void)
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{
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int err = 0;
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const struct x86_cpu_id *match_cpu;
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match_cpu = x86_match_cpu(soc_thermal_ids);
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if (!match_cpu)
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return -ENODEV;
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/* Create a zone with 2 trips with marked as read only */
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soc_dts = intel_soc_dts_iosf_init(INTEL_SOC_DTS_INTERRUPT_APIC, 2, 1);
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if (IS_ERR(soc_dts)) {
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err = PTR_ERR(soc_dts);
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return err;
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}
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soc_dts_thres_irq = (int)match_cpu->driver_data;
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if (soc_dts_thres_irq) {
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err = request_threaded_irq(soc_dts_thres_irq, NULL,
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soc_irq_thread_fn,
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IRQF_TRIGGER_RISING | IRQF_ONESHOT,
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"soc_dts", soc_dts);
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if (err) {
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pr_err("request_threaded_irq ret %d\n", err);
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goto error_irq;
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}
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}
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err = intel_soc_dts_iosf_add_read_only_critical_trip(soc_dts,
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crit_offset);
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if (err)
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goto error_trips;
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return 0;
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error_trips:
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if (soc_dts_thres_irq)
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free_irq(soc_dts_thres_irq, soc_dts);
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error_irq:
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intel_soc_dts_iosf_exit(soc_dts);
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return err;
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}
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static void __exit intel_soc_thermal_exit(void)
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{
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if (soc_dts_thres_irq)
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free_irq(soc_dts_thres_irq, soc_dts);
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intel_soc_dts_iosf_exit(soc_dts);
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}
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module_init(intel_soc_thermal_init)
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module_exit(intel_soc_thermal_exit)
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MODULE_DESCRIPTION("Intel SoC DTS Thermal Driver");
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MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
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MODULE_LICENSE("GPL v2");
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