fee50d6688
Changes in 4.9.298
Bluetooth: bfusb: fix division by zero in send path
USB: core: Fix bug in resuming hub's handling of wakeup requests
USB: Fix "slab-out-of-bounds Write" bug in usb_hcd_poll_rh_status
mfd: intel-lpss: Fix too early PM enablement in the ACPI ->probe()
can: gs_usb: fix use of uninitialized variable, detach device on reception of invalid USB data
can: gs_usb: gs_can_start_xmit(): zero-initialize hf->{flags,reserved}
random: fix data race on crng_node_pool
random: fix data race on crng init time
staging: wlan-ng: Avoid bitwise vs logical OR warning in hfa384x_usb_throttlefn()
drm/i915: Avoid bitwise vs logical OR warning in snb_wm_latency_quirk()
media: uvcvideo: fix division by zero at stream start
rtlwifi: rtl8192cu: Fix WARNING when calling local_irq_restore() with interrupts enabled
HID: uhid: Fix worker destroying device without any protection
HID: wacom: Avoid using stale array indicies to read contact count
nfc: llcp: fix NULL error pointer dereference on sendmsg() after failed bind()
rtc: cmos: take rtc_lock while reading from CMOS
media: flexcop-usb: fix control-message timeouts
media: mceusb: fix control-message timeouts
media: em28xx: fix control-message timeouts
media: cpia2: fix control-message timeouts
media: s2255: fix control-message timeouts
media: dib0700: fix undefined behavior in tuner shutdown
media: redrat3: fix control-message timeouts
media: pvrusb2: fix control-message timeouts
media: stk1160: fix control-message timeouts
can: softing_cs: softingcs_probe(): fix memleak on registration failure
PCI: Add function 1 DMA alias quirk for Marvell 88SE9125 SATA controller
shmem: fix a race between shmem_unused_huge_shrink and shmem_evict_inode
Bluetooth: cmtp: fix possible panic when cmtp_init_sockets() fails
wcn36xx: Indicate beacon not connection loss on MISSED_BEACON_IND
Bluetooth: stop proccessing malicious adv data
media: dmxdev: fix UAF when dvb_register_device() fails
crypto: qce - fix uaf on qce_ahash_register_one
tty: serial: atmel: Check return code of dmaengine_submit()
tty: serial: atmel: Call dma_async_issue_pending()
netfilter: bridge: add support for pppoe filtering
arm64: dts: qcom: msm8916: fix MMC controller aliases
drm/amdgpu: Fix a NULL pointer dereference in amdgpu_connector_lcd_native_mode()
drm/radeon/radeon_kms: Fix a NULL pointer dereference in radeon_driver_open_kms()
serial: amba-pl011: do not request memory region twice
floppy: Fix hang in watchdog when disk is ejected
media: dib8000: Fix a memleak in dib8000_init()
media: saa7146: mxb: Fix a NULL pointer dereference in mxb_attach()
media: si2157: Fix "warm" tuner state detection
media: msi001: fix possible null-ptr-deref in msi001_probe()
usb: ftdi-elan: fix memory leak on device disconnect
pcmcia: rsrc_nonstatic: Fix a NULL pointer dereference in __nonstatic_find_io_region()
pcmcia: rsrc_nonstatic: Fix a NULL pointer dereference in nonstatic_find_mem_region()
ppp: ensure minimum packet size in ppp_write()
fsl/fman: Check for null pointer after calling devm_ioremap
spi: spi-meson-spifc: Add missing pm_runtime_disable() in meson_spifc_probe
can: softing: softing_startstop(): fix set but not used variable warning
can: xilinx_can: xcan_probe(): check for error irq
pcmcia: fix setting of kthread task states
net: mcs7830: handle usb read errors properly
ext4: avoid trim error on fs with small groups
ALSA: jack: Add missing rwsem around snd_ctl_remove() calls
ALSA: PCM: Add missing rwsem around snd_ctl_remove() calls
ALSA: hda: Add missing rwsem around snd_ctl_remove() calls
RDMA/hns: Validate the pkey index
powerpc/prom_init: Fix improper check of prom_getprop()
ALSA: oss: fix compile error when OSS_DEBUG is enabled
char/mwave: Adjust io port register size
scsi: ufs: Fix race conditions related to driver data
RDMA/core: Let ib_find_gid() continue search even after empty entry
dmaengine: pxa/mmp: stop referencing config->slave_id
ASoC: samsung: idma: Check of ioremap return value
misc: lattice-ecp3-config: Fix task hung when firmware load failed
mips: lantiq: add support for clk_set_parent()
mips: bcm63xx: add support for clk_set_parent()
RDMA/cxgb4: Set queue pair state when being queried
Bluetooth: Fix debugfs entry leak in hci_register_dev()
fs: dlm: filter user dlm messages for kernel locks
ar5523: Fix null-ptr-deref with unexpected WDCMSG_TARGET_START reply
usb: gadget: f_fs: Use stream_open() for endpoint files
HID: apple: Do not reset quirks when the Fn key is not found
media: b2c2: Add missing check in flexcop_pci_isr:
gpiolib: acpi: Do not set the IRQ type if the IRQ is already in use
HSI: core: Fix return freed object in hsi_new_client
mwifiex: Fix skb_over_panic in mwifiex_usb_recv()
floppy: Add max size check for user space request
media: saa7146: hexium_orion: Fix a NULL pointer dereference in hexium_attach()
media: m920x: don't use stack on USB reads
iwlwifi: mvm: synchronize with FW after multicast commands
ath10k: Fix tx hanging
net: bonding: debug: avoid printing debug logs when bond is not notifying peers
media: igorplugusb: receiver overflow should be reported
media: saa7146: hexium_gemini: Fix a NULL pointer dereference in hexium_attach()
usb: hub: Add delay for SuperSpeed hub resume to let links transit to U0
ath9k: Fix out-of-bound memcpy in ath9k_hif_usb_rx_stream
um: registers: Rename function names to avoid conflicts and build problems
jffs2: GC deadlock reading a page that is used in jffs2_write_begin()
ACPICA: Utilities: Avoid deleting the same object twice in a row
ACPICA: Executer: Fix the REFCLASS_REFOF case in acpi_ex_opcode_1A_0T_1R()
btrfs: remove BUG_ON() in find_parent_nodes()
btrfs: remove BUG_ON(!eie) in find_parent_nodes
net: mdio: Demote probed message to debug print
dm btree: add a defensive bounds check to insert_at()
dm space map common: add bounds check to sm_ll_lookup_bitmap()
serial: pl010: Drop CR register reset on set_termios
serial: core: Keep mctrl register state and cached copy in sync
parisc: Avoid calling faulthandler_disabled() twice
powerpc/6xx: add missing of_node_put
powerpc/powernv: add missing of_node_put
powerpc/cell: add missing of_node_put
powerpc/btext: add missing of_node_put
i2c: i801: Don't silently correct invalid transfer size
powerpc/smp: Move setup_profiling_timer() under CONFIG_PROFILING
i2c: mpc: Correct I2C reset procedure
w1: Misuse of get_user()/put_user() reported by sparse
ALSA: seq: Set upper limit of processed events
i2c: designware-pci: Fix to change data types of hcnt and lcnt parameters
MIPS: Octeon: Fix build errors using clang
scsi: sr: Don't use GFP_DMA
ASoC: mediatek: mt8173: fix device_node leak
power: bq25890: Enable continuous conversion for ADC at charging
ubifs: Error path in ubifs_remount_rw() seems to wrongly free write buffers
iwlwifi: mvm: Increase the scan timeout guard to 30 seconds
ext4: set csum seed in tmp inode while migrating to extents
ext4: Fix BUG_ON in ext4_bread when write quota data
ext4: don't use the orphan list when migrating an inode
fuse: fix bad inode
fuse: fix live lock in fuse_iget()
drm/radeon: fix error handling in radeon_driver_open_kms
RDMA/hns: Modify the mapping attribute of doorbell to device
RDMA/rxe: Fix a typo in opcode name
powerpc/fsl/dts: Enable WA for erratum A-009885 on fman3l MDIO buses
net/fsl: xgmac_mdio: Fix incorrect iounmap when removing module
parisc: pdc_stable: Fix memory leak in pdcs_register_pathentries
af_unix: annote lockless accesses to unix_tot_inflight & gc_in_progress
net: axienet: Wait for PhyRstCmplt after core reset
net: axienet: fix number of TX ring slots for available check
netns: add schedule point in ops_exit_list()
libcxgb: Don't accidentally set RTO_ONLINK in cxgb_find_route()
dmaengine: at_xdmac: Don't start transactions at tx_submit level
dmaengine: at_xdmac: Print debug message after realeasing the lock
dmaengine: at_xdmac: Fix lld view setting
dmaengine: at_xdmac: Fix at_xdmac_lld struct definition
net_sched: restore "mpu xxx" handling
bcmgenet: add WOL IRQ check
scripts/dtc: dtx_diff: remove broken example from help text
lib82596: Fix IRQ check in sni_82596_probe
Revert "gup: document and work around "COW can break either way" issue"
gup: document and work around "COW can break either way" issue
drm/ttm/nouveau: don't call tt destroy callback on alloc failure.
gianfar: simplify FCS handling and fix memory leak
gianfar: fix jumbo packets+napi+rx overrun crash
cipso,calipso: resolve a number of problems with the DOI refcounts
rbtree: cache leftmost node internally
lib/timerqueue: Rely on rbtree semantics for next timer
mm: add follow_pte_pmd()
KVM: do not assume PTE is writable after follow_pfn
KVM: Use kvm_pfn_t for local PFN variable in hva_to_pfn_remapped()
KVM: do not allow mapping valid but non-reference-counted pages
Linux 4.9.298
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: Ifcea82a702a0906d9090c89785363c2d5423f652
962 lines
27 KiB
C
962 lines
27 KiB
C
/*
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* Copyright (c) 2016 Mellanox Technologies Ltd. All rights reserved.
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* Copyright (c) 2015 System Fabric Works, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <rdma/ib_pack.h>
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#include "rxe_opcode.h"
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#include "rxe_hdr.h"
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/* useful information about work request opcodes and pkt opcodes in
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* table form
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*/
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struct rxe_wr_opcode_info rxe_wr_opcode_info[] = {
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[IB_WR_RDMA_WRITE] = {
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.name = "IB_WR_RDMA_WRITE",
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.mask = {
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[IB_QPT_RC] = WR_INLINE_MASK | WR_WRITE_MASK,
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[IB_QPT_UC] = WR_INLINE_MASK | WR_WRITE_MASK,
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},
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},
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[IB_WR_RDMA_WRITE_WITH_IMM] = {
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.name = "IB_WR_RDMA_WRITE_WITH_IMM",
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.mask = {
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[IB_QPT_RC] = WR_INLINE_MASK | WR_WRITE_MASK,
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[IB_QPT_UC] = WR_INLINE_MASK | WR_WRITE_MASK,
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},
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},
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[IB_WR_SEND] = {
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.name = "IB_WR_SEND",
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.mask = {
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[IB_QPT_SMI] = WR_INLINE_MASK | WR_SEND_MASK,
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[IB_QPT_GSI] = WR_INLINE_MASK | WR_SEND_MASK,
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[IB_QPT_RC] = WR_INLINE_MASK | WR_SEND_MASK,
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[IB_QPT_UC] = WR_INLINE_MASK | WR_SEND_MASK,
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[IB_QPT_UD] = WR_INLINE_MASK | WR_SEND_MASK,
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},
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},
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[IB_WR_SEND_WITH_IMM] = {
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.name = "IB_WR_SEND_WITH_IMM",
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.mask = {
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[IB_QPT_SMI] = WR_INLINE_MASK | WR_SEND_MASK,
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[IB_QPT_GSI] = WR_INLINE_MASK | WR_SEND_MASK,
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[IB_QPT_RC] = WR_INLINE_MASK | WR_SEND_MASK,
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[IB_QPT_UC] = WR_INLINE_MASK | WR_SEND_MASK,
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[IB_QPT_UD] = WR_INLINE_MASK | WR_SEND_MASK,
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},
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},
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[IB_WR_RDMA_READ] = {
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.name = "IB_WR_RDMA_READ",
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.mask = {
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[IB_QPT_RC] = WR_READ_MASK,
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},
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},
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[IB_WR_ATOMIC_CMP_AND_SWP] = {
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.name = "IB_WR_ATOMIC_CMP_AND_SWP",
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.mask = {
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[IB_QPT_RC] = WR_ATOMIC_MASK,
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},
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},
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[IB_WR_ATOMIC_FETCH_AND_ADD] = {
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.name = "IB_WR_ATOMIC_FETCH_AND_ADD",
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.mask = {
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[IB_QPT_RC] = WR_ATOMIC_MASK,
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},
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},
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[IB_WR_LSO] = {
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.name = "IB_WR_LSO",
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.mask = {
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/* not supported */
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},
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},
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[IB_WR_SEND_WITH_INV] = {
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.name = "IB_WR_SEND_WITH_INV",
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.mask = {
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[IB_QPT_RC] = WR_INLINE_MASK | WR_SEND_MASK,
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[IB_QPT_UC] = WR_INLINE_MASK | WR_SEND_MASK,
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[IB_QPT_UD] = WR_INLINE_MASK | WR_SEND_MASK,
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},
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},
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[IB_WR_RDMA_READ_WITH_INV] = {
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.name = "IB_WR_RDMA_READ_WITH_INV",
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.mask = {
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[IB_QPT_RC] = WR_READ_MASK,
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},
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},
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[IB_WR_LOCAL_INV] = {
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.name = "IB_WR_LOCAL_INV",
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.mask = {
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[IB_QPT_RC] = WR_REG_MASK,
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},
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},
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[IB_WR_REG_MR] = {
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.name = "IB_WR_REG_MR",
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.mask = {
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[IB_QPT_RC] = WR_REG_MASK,
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},
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},
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};
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struct rxe_opcode_info rxe_opcode[RXE_NUM_OPCODE] = {
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[IB_OPCODE_RC_SEND_FIRST] = {
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.name = "IB_OPCODE_RC_SEND_FIRST",
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.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_RWR_MASK
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| RXE_SEND_MASK | RXE_START_MASK,
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.length = RXE_BTH_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_PAYLOAD] = RXE_BTH_BYTES,
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}
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},
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[IB_OPCODE_RC_SEND_MIDDLE] = {
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.name = "IB_OPCODE_RC_SEND_MIDDLE",
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.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_SEND_MASK
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| RXE_MIDDLE_MASK,
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.length = RXE_BTH_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_PAYLOAD] = RXE_BTH_BYTES,
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}
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},
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[IB_OPCODE_RC_SEND_LAST] = {
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.name = "IB_OPCODE_RC_SEND_LAST",
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.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_COMP_MASK
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| RXE_SEND_MASK | RXE_END_MASK,
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.length = RXE_BTH_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_PAYLOAD] = RXE_BTH_BYTES,
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}
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},
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[IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE] = {
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.name = "IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE",
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.mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
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| RXE_COMP_MASK | RXE_SEND_MASK | RXE_END_MASK,
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.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_IMMDT] = RXE_BTH_BYTES,
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[RXE_PAYLOAD] = RXE_BTH_BYTES
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+ RXE_IMMDT_BYTES,
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}
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},
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[IB_OPCODE_RC_SEND_ONLY] = {
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.name = "IB_OPCODE_RC_SEND_ONLY",
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.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_COMP_MASK
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| RXE_RWR_MASK | RXE_SEND_MASK
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| RXE_START_MASK | RXE_END_MASK,
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.length = RXE_BTH_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_PAYLOAD] = RXE_BTH_BYTES,
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}
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},
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[IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE] = {
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.name = "IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE",
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.mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
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| RXE_COMP_MASK | RXE_RWR_MASK | RXE_SEND_MASK
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| RXE_START_MASK | RXE_END_MASK,
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.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_IMMDT] = RXE_BTH_BYTES,
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[RXE_PAYLOAD] = RXE_BTH_BYTES
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+ RXE_IMMDT_BYTES,
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}
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},
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[IB_OPCODE_RC_RDMA_WRITE_FIRST] = {
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.name = "IB_OPCODE_RC_RDMA_WRITE_FIRST",
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.mask = RXE_RETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
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| RXE_WRITE_MASK | RXE_START_MASK,
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.length = RXE_BTH_BYTES + RXE_RETH_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_RETH] = RXE_BTH_BYTES,
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[RXE_PAYLOAD] = RXE_BTH_BYTES
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+ RXE_RETH_BYTES,
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}
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},
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[IB_OPCODE_RC_RDMA_WRITE_MIDDLE] = {
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.name = "IB_OPCODE_RC_RDMA_WRITE_MIDDLE",
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.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_WRITE_MASK
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| RXE_MIDDLE_MASK,
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.length = RXE_BTH_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_PAYLOAD] = RXE_BTH_BYTES,
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}
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},
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[IB_OPCODE_RC_RDMA_WRITE_LAST] = {
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.name = "IB_OPCODE_RC_RDMA_WRITE_LAST",
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.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_WRITE_MASK
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| RXE_END_MASK,
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.length = RXE_BTH_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_PAYLOAD] = RXE_BTH_BYTES,
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}
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},
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[IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = {
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.name = "IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE",
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.mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
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| RXE_WRITE_MASK | RXE_COMP_MASK | RXE_RWR_MASK
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| RXE_END_MASK,
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.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_IMMDT] = RXE_BTH_BYTES,
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[RXE_PAYLOAD] = RXE_BTH_BYTES
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+ RXE_IMMDT_BYTES,
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}
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},
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[IB_OPCODE_RC_RDMA_WRITE_ONLY] = {
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.name = "IB_OPCODE_RC_RDMA_WRITE_ONLY",
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.mask = RXE_RETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
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| RXE_WRITE_MASK | RXE_START_MASK
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| RXE_END_MASK,
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.length = RXE_BTH_BYTES + RXE_RETH_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_RETH] = RXE_BTH_BYTES,
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[RXE_PAYLOAD] = RXE_BTH_BYTES
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+ RXE_RETH_BYTES,
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}
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},
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[IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = {
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.name = "IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE",
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.mask = RXE_RETH_MASK | RXE_IMMDT_MASK | RXE_PAYLOAD_MASK
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| RXE_REQ_MASK | RXE_WRITE_MASK
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| RXE_COMP_MASK | RXE_RWR_MASK
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| RXE_START_MASK | RXE_END_MASK,
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.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_RETH_BYTES,
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.offset = {
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[RXE_BTH] = 0,
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[RXE_RETH] = RXE_BTH_BYTES,
|
|
[RXE_IMMDT] = RXE_BTH_BYTES
|
|
+ RXE_RETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RETH_BYTES
|
|
+ RXE_IMMDT_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RC_RDMA_READ_REQUEST] = {
|
|
.name = "IB_OPCODE_RC_RDMA_READ_REQUEST",
|
|
.mask = RXE_RETH_MASK | RXE_REQ_MASK | RXE_READ_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_RETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST] = {
|
|
.name = "IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST",
|
|
.mask = RXE_AETH_MASK | RXE_PAYLOAD_MASK | RXE_ACK_MASK
|
|
| RXE_START_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_AETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_AETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_AETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE] = {
|
|
.name = "IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE",
|
|
.mask = RXE_PAYLOAD_MASK | RXE_ACK_MASK | RXE_MIDDLE_MASK,
|
|
.length = RXE_BTH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST] = {
|
|
.name = "IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST",
|
|
.mask = RXE_AETH_MASK | RXE_PAYLOAD_MASK | RXE_ACK_MASK
|
|
| RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_AETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_AETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_AETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY] = {
|
|
.name = "IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY",
|
|
.mask = RXE_AETH_MASK | RXE_PAYLOAD_MASK | RXE_ACK_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_AETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_AETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_AETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RC_ACKNOWLEDGE] = {
|
|
.name = "IB_OPCODE_RC_ACKNOWLEDGE",
|
|
.mask = RXE_AETH_MASK | RXE_ACK_MASK | RXE_START_MASK
|
|
| RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_AETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_AETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_AETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE] = {
|
|
.name = "IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE",
|
|
.mask = RXE_AETH_MASK | RXE_ATMACK_MASK | RXE_ACK_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_ATMACK_BYTES + RXE_AETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_AETH] = RXE_BTH_BYTES,
|
|
[RXE_ATMACK] = RXE_BTH_BYTES
|
|
+ RXE_AETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_ATMACK_BYTES + RXE_AETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RC_COMPARE_SWAP] = {
|
|
.name = "IB_OPCODE_RC_COMPARE_SWAP",
|
|
.mask = RXE_ATMETH_MASK | RXE_REQ_MASK | RXE_ATOMIC_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_ATMETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_ATMETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_ATMETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RC_FETCH_ADD] = {
|
|
.name = "IB_OPCODE_RC_FETCH_ADD",
|
|
.mask = RXE_ATMETH_MASK | RXE_REQ_MASK | RXE_ATOMIC_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_ATMETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_ATMETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_ATMETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE] = {
|
|
.name = "IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE",
|
|
.mask = RXE_IETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_COMP_MASK | RXE_SEND_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_IETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_IETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_IETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE] = {
|
|
.name = "IB_OPCODE_RC_SEND_ONLY_INV",
|
|
.mask = RXE_IETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_COMP_MASK | RXE_RWR_MASK | RXE_SEND_MASK
|
|
| RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_IETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_IETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_IETH_BYTES,
|
|
}
|
|
},
|
|
|
|
/* UC */
|
|
[IB_OPCODE_UC_SEND_FIRST] = {
|
|
.name = "IB_OPCODE_UC_SEND_FIRST",
|
|
.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_RWR_MASK
|
|
| RXE_SEND_MASK | RXE_START_MASK,
|
|
.length = RXE_BTH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UC_SEND_MIDDLE] = {
|
|
.name = "IB_OPCODE_UC_SEND_MIDDLE",
|
|
.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_SEND_MASK
|
|
| RXE_MIDDLE_MASK,
|
|
.length = RXE_BTH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UC_SEND_LAST] = {
|
|
.name = "IB_OPCODE_UC_SEND_LAST",
|
|
.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_COMP_MASK
|
|
| RXE_SEND_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE] = {
|
|
.name = "IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE",
|
|
.mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_COMP_MASK | RXE_SEND_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_IMMDT] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_IMMDT_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UC_SEND_ONLY] = {
|
|
.name = "IB_OPCODE_UC_SEND_ONLY",
|
|
.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_COMP_MASK
|
|
| RXE_RWR_MASK | RXE_SEND_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE] = {
|
|
.name = "IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE",
|
|
.mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_COMP_MASK | RXE_RWR_MASK | RXE_SEND_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_IMMDT] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_IMMDT_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UC_RDMA_WRITE_FIRST] = {
|
|
.name = "IB_OPCODE_UC_RDMA_WRITE_FIRST",
|
|
.mask = RXE_RETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_WRITE_MASK | RXE_START_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_RETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UC_RDMA_WRITE_MIDDLE] = {
|
|
.name = "IB_OPCODE_UC_RDMA_WRITE_MIDDLE",
|
|
.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_WRITE_MASK
|
|
| RXE_MIDDLE_MASK,
|
|
.length = RXE_BTH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UC_RDMA_WRITE_LAST] = {
|
|
.name = "IB_OPCODE_UC_RDMA_WRITE_LAST",
|
|
.mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_WRITE_MASK
|
|
| RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = {
|
|
.name = "IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE",
|
|
.mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_WRITE_MASK | RXE_COMP_MASK | RXE_RWR_MASK
|
|
| RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_IMMDT] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_IMMDT_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UC_RDMA_WRITE_ONLY] = {
|
|
.name = "IB_OPCODE_UC_RDMA_WRITE_ONLY",
|
|
.mask = RXE_RETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_WRITE_MASK | RXE_START_MASK
|
|
| RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_RETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = {
|
|
.name = "IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE",
|
|
.mask = RXE_RETH_MASK | RXE_IMMDT_MASK | RXE_PAYLOAD_MASK
|
|
| RXE_REQ_MASK | RXE_WRITE_MASK
|
|
| RXE_COMP_MASK | RXE_RWR_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_RETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RETH] = RXE_BTH_BYTES,
|
|
[RXE_IMMDT] = RXE_BTH_BYTES
|
|
+ RXE_RETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RETH_BYTES
|
|
+ RXE_IMMDT_BYTES,
|
|
}
|
|
},
|
|
|
|
/* RD */
|
|
[IB_OPCODE_RD_SEND_FIRST] = {
|
|
.name = "IB_OPCODE_RD_SEND_FIRST",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK
|
|
| RXE_REQ_MASK | RXE_RWR_MASK | RXE_SEND_MASK
|
|
| RXE_START_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_SEND_MIDDLE] = {
|
|
.name = "IB_OPCODE_RD_SEND_MIDDLE",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK
|
|
| RXE_REQ_MASK | RXE_SEND_MASK
|
|
| RXE_MIDDLE_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_SEND_LAST] = {
|
|
.name = "IB_OPCODE_RD_SEND_LAST",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK
|
|
| RXE_REQ_MASK | RXE_COMP_MASK | RXE_SEND_MASK
|
|
| RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_SEND_LAST_WITH_IMMEDIATE] = {
|
|
.name = "IB_OPCODE_RD_SEND_LAST_WITH_IMMEDIATE",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_IMMDT_MASK
|
|
| RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_COMP_MASK | RXE_SEND_MASK
|
|
| RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_DETH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_IMMDT] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES
|
|
+ RXE_IMMDT_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_SEND_ONLY] = {
|
|
.name = "IB_OPCODE_RD_SEND_ONLY",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK
|
|
| RXE_REQ_MASK | RXE_COMP_MASK | RXE_RWR_MASK
|
|
| RXE_SEND_MASK | RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_SEND_ONLY_WITH_IMMEDIATE] = {
|
|
.name = "IB_OPCODE_RD_SEND_ONLY_WITH_IMMEDIATE",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_IMMDT_MASK
|
|
| RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_COMP_MASK | RXE_RWR_MASK | RXE_SEND_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_DETH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_IMMDT] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES
|
|
+ RXE_IMMDT_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_RDMA_WRITE_FIRST] = {
|
|
.name = "IB_OPCODE_RD_RDMA_WRITE_FIRST",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_RETH_MASK
|
|
| RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_WRITE_MASK | RXE_START_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_RETH_BYTES + RXE_DETH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_RETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES
|
|
+ RXE_RETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_RDMA_WRITE_MIDDLE] = {
|
|
.name = "IB_OPCODE_RD_RDMA_WRITE_MIDDLE",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK
|
|
| RXE_REQ_MASK | RXE_WRITE_MASK
|
|
| RXE_MIDDLE_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_RDMA_WRITE_LAST] = {
|
|
.name = "IB_OPCODE_RD_RDMA_WRITE_LAST",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK
|
|
| RXE_REQ_MASK | RXE_WRITE_MASK
|
|
| RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_RDMA_WRITE_LAST_WITH_IMMEDIATE] = {
|
|
.name = "IB_OPCODE_RD_RDMA_WRITE_LAST_WITH_IMMEDIATE",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_IMMDT_MASK
|
|
| RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_WRITE_MASK | RXE_COMP_MASK | RXE_RWR_MASK
|
|
| RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_DETH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_IMMDT] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES
|
|
+ RXE_IMMDT_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_RDMA_WRITE_ONLY] = {
|
|
.name = "IB_OPCODE_RD_RDMA_WRITE_ONLY",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_RETH_MASK
|
|
| RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_WRITE_MASK | RXE_START_MASK
|
|
| RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_RETH_BYTES + RXE_DETH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_RETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES
|
|
+ RXE_RETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = {
|
|
.name = "IB_OPCODE_RD_RDMA_WRITE_ONLY_WITH_IMMEDIATE",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_RETH_MASK
|
|
| RXE_IMMDT_MASK | RXE_PAYLOAD_MASK
|
|
| RXE_REQ_MASK | RXE_WRITE_MASK
|
|
| RXE_COMP_MASK | RXE_RWR_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_RETH_BYTES
|
|
+ RXE_DETH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_RETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
[RXE_IMMDT] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES
|
|
+ RXE_RETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES
|
|
+ RXE_RETH_BYTES
|
|
+ RXE_IMMDT_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_RDMA_READ_REQUEST] = {
|
|
.name = "IB_OPCODE_RD_RDMA_READ_REQUEST",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_RETH_MASK
|
|
| RXE_REQ_MASK | RXE_READ_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_RETH_BYTES + RXE_DETH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_RETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RETH_BYTES
|
|
+ RXE_DETH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_RDMA_READ_RESPONSE_FIRST] = {
|
|
.name = "IB_OPCODE_RD_RDMA_READ_RESPONSE_FIRST",
|
|
.mask = RXE_RDETH_MASK | RXE_AETH_MASK
|
|
| RXE_PAYLOAD_MASK | RXE_ACK_MASK
|
|
| RXE_START_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_AETH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_AETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_AETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_RDMA_READ_RESPONSE_MIDDLE] = {
|
|
.name = "IB_OPCODE_RD_RDMA_READ_RESPONSE_MIDDLE",
|
|
.mask = RXE_RDETH_MASK | RXE_PAYLOAD_MASK | RXE_ACK_MASK
|
|
| RXE_MIDDLE_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_RDMA_READ_RESPONSE_LAST] = {
|
|
.name = "IB_OPCODE_RD_RDMA_READ_RESPONSE_LAST",
|
|
.mask = RXE_RDETH_MASK | RXE_AETH_MASK | RXE_PAYLOAD_MASK
|
|
| RXE_ACK_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_AETH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_AETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_AETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_RDMA_READ_RESPONSE_ONLY] = {
|
|
.name = "IB_OPCODE_RD_RDMA_READ_RESPONSE_ONLY",
|
|
.mask = RXE_RDETH_MASK | RXE_AETH_MASK | RXE_PAYLOAD_MASK
|
|
| RXE_ACK_MASK | RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_AETH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_AETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_AETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_ACKNOWLEDGE] = {
|
|
.name = "IB_OPCODE_RD_ACKNOWLEDGE",
|
|
.mask = RXE_RDETH_MASK | RXE_AETH_MASK | RXE_ACK_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_AETH_BYTES + RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_AETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_ATOMIC_ACKNOWLEDGE] = {
|
|
.name = "IB_OPCODE_RD_ATOMIC_ACKNOWLEDGE",
|
|
.mask = RXE_RDETH_MASK | RXE_AETH_MASK | RXE_ATMACK_MASK
|
|
| RXE_ACK_MASK | RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_ATMACK_BYTES + RXE_AETH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_AETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_ATMACK] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_AETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_COMPARE_SWAP] = {
|
|
.name = "RD_COMPARE_SWAP",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_ATMETH_MASK
|
|
| RXE_REQ_MASK | RXE_ATOMIC_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_ATMETH_BYTES + RXE_DETH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_ATMETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES +
|
|
+ RXE_ATMETH_BYTES
|
|
+ RXE_DETH_BYTES +
|
|
+ RXE_RDETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_RD_FETCH_ADD] = {
|
|
.name = "IB_OPCODE_RD_FETCH_ADD",
|
|
.mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_ATMETH_MASK
|
|
| RXE_REQ_MASK | RXE_ATOMIC_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_ATMETH_BYTES + RXE_DETH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_RDETH] = RXE_BTH_BYTES,
|
|
[RXE_DETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES,
|
|
[RXE_ATMETH] = RXE_BTH_BYTES
|
|
+ RXE_RDETH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES +
|
|
+ RXE_ATMETH_BYTES
|
|
+ RXE_DETH_BYTES +
|
|
+ RXE_RDETH_BYTES,
|
|
}
|
|
},
|
|
|
|
/* UD */
|
|
[IB_OPCODE_UD_SEND_ONLY] = {
|
|
.name = "IB_OPCODE_UD_SEND_ONLY",
|
|
.mask = RXE_DETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK
|
|
| RXE_COMP_MASK | RXE_RWR_MASK | RXE_SEND_MASK
|
|
| RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_DETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_DETH] = RXE_BTH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
}
|
|
},
|
|
[IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE] = {
|
|
.name = "IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE",
|
|
.mask = RXE_DETH_MASK | RXE_IMMDT_MASK | RXE_PAYLOAD_MASK
|
|
| RXE_REQ_MASK | RXE_COMP_MASK | RXE_RWR_MASK
|
|
| RXE_SEND_MASK | RXE_START_MASK | RXE_END_MASK,
|
|
.length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_DETH_BYTES,
|
|
.offset = {
|
|
[RXE_BTH] = 0,
|
|
[RXE_DETH] = RXE_BTH_BYTES,
|
|
[RXE_IMMDT] = RXE_BTH_BYTES
|
|
+ RXE_DETH_BYTES,
|
|
[RXE_PAYLOAD] = RXE_BTH_BYTES
|
|
+ RXE_DETH_BYTES
|
|
+ RXE_IMMDT_BYTES,
|
|
}
|
|
},
|
|
|
|
};
|