Changes in 4.9.156 drm/bufs: Fix Spectre v1 vulnerability staging: iio: adc: ad7280a: handle error from __ad7280_read32() ASoC: Intel: mrfld: fix uninitialized variable access gpu: ipu-v3: image-convert: Prevent race between run and unprepare ath9k: dynack: use authentication messages for 'late' ack scsi: lpfc: Correct LCB RJT handling ARM: 8808/1: kexec:offline panic_smp_self_stop CPU dlm: Don't swamp the CPU with callbacks queued during recovery x86/PCI: Fix Broadcom CNB20LE unintended sign extension (redux) powerpc/pseries: add of_node_put() in dlpar_detach_node() drm/vc4: ->x_scaling[1] should never be set to VC4_SCALING_NONE serial: fsl_lpuart: clear parity enable bit when disable parity ptp: check gettime64 return code in PTP_SYS_OFFSET ioctl staging:iio:ad2s90: Make probe handle spi_setup failure staging: iio: ad7780: update voltage on read ARM: OMAP2+: hwmod: Fix some section annotations modpost: validate symbol names also in find_elf_symbol perf tools: Add Hygon Dhyana support soc/tegra: Don't leak device tree node reference media: mtk-vcodec: Release device nodes in mtk_vcodec_init_enc_pm() dmaengine: xilinx_dma: Remove __aligned attribute on zynqmp_dma_desc_ll iio: accel: kxcjk1013: Add KIOX010A ACPI Hardware-ID media: adv*/tc358743/ths8200: fill in min width/height/pixelclock f2fs: move dir data flush to write checkpoint process f2fs: fix wrong return value of f2fs_acl_create sunvdc: Do not spin in an infinite loop when vio_ldc_send() returns EAGAIN soc: bcm: brcmstb: Don't leak device tree node reference nfsd4: fix crash on writing v4_end_grace before nfsd startup Thermal: do not clear passive state during system sleep firmware/efi: Add NULL pointer checks in efivars API functions arm64: ftrace: don't adjust the LR value ARM: dts: mmp2: fix TWSI2 x86/fpu: Add might_fault() to user_insn() media: DaVinci-VPBE: fix error handling in vpbe_initialize() smack: fix access permissions for keyring usb: hub: delay hub autosuspend if USB3 port is still link training timekeeping: Use proper seqcount initializer clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks iommu/amd: Fix amd_iommu=force_isolation ARM: dts: Fix OMAP4430 SDP Ethernet startup mips: bpf: fix encoding bug for mm_srlv32_op iommu/arm-smmu: Add support for qcom,smmu-v2 variant iommu/arm-smmu-v3: Use explicit mb() when moving cons pointer sata_rcar: fix deferred probing clk: imx6sl: ensure MMDC CH0 handshake is bypassed cpuidle: big.LITTLE: fix refcount leak i2c-axxia: check for error conditions first udf: Fix BUG on corrupted inode ARM: pxa: avoid section mismatch warning ASoC: fsl: Fix SND_SOC_EUKREA_TLV320 build error on i.MX8M memstick: Prevent memstick host from getting runtime suspended during card detection tty: serial: samsung: Properly set flags in autoCTS mode perf header: Fix unchecked usage of strncpy() perf probe: Fix unchecked usage of strncpy() arm64: KVM: Skip MMIO insn after emulation powerpc/uaccess: fix warning/error with access_ok() mac80211: fix radiotap vendor presence bitmap handling xfrm6_tunnel: Fix spi check in __xfrm6_tunnel_alloc_spi Bluetooth: Fix unnecessary error message for HCI request completion scsi: smartpqi: correct host serial num for ssa scsi: smartpqi: correct volume status cw1200: Fix concurrency use-after-free bugs in cw1200_hw_scan() drbd: narrow rcu_read_lock in drbd_sync_handshake drbd: disconnect, if the wrong UUIDs are attached on a connected peer drbd: skip spurious timeout (ping-timeo) when failing promote drbd: Avoid Clang warning about pointless switch statment video: clps711x-fb: release disp device node in probe() fbdev: fbmem: behave better with small rotated displays and many CPUs i40e: define proper net_device::neigh_priv_len igb: Fix an issue that PME is not enabled during runtime suspend fbdev: fbcon: Fix unregister crash when more than one framebuffer pinctrl: meson: meson8: fix the GPIO function for the GPIOAO pins pinctrl: meson: meson8b: fix the GPIO function for the GPIOAO pins KVM: x86: svm: report MSR_IA32_MCG_EXT_CTL as unsupported NFS: nfs_compare_mount_options always compare auth flavors. hwmon: (lm80) fix a missing check of the status of SMBus read hwmon: (lm80) fix a missing check of bus read in lm80 probe seq_buf: Make seq_buf_puts() null-terminate the buffer crypto: ux500 - Use proper enum in cryp_set_dma_transfer crypto: ux500 - Use proper enum in hash_set_dma_transfer MIPS: ralink: Select CONFIG_CPU_MIPSR2_IRQ_VI on MT7620/8 cifs: check ntwrk_buf_start for NULL before dereferencing it um: Avoid marking pages with "changed protection" niu: fix missing checks of niu_pci_eeprom_read f2fs: fix sbi->extent_list corruption issue scripts/decode_stacktrace: only strip base path when a prefix of the path ocfs2: don't clear bh uptodate for block read isdn: hisax: hfc_pci: Fix a possible concurrency use-after-free bug in HFCPCI_l1hw() gdrom: fix a memory leak bug fsl/fman: Use GFP_ATOMIC in {memac,tgec}_add_hash_mac_address() block/swim3: Fix -EBUSY error when re-opening device after unmount thermal: generic-adc: Fix adc to temp interpolation HID: lenovo: Add checks to fix of_led_classdev_register kernel/hung_task.c: break RCU locks based on jiffies proc/sysctl: fix return error for proc_doulongvec_minmax() fs/epoll: drop ovflist branch prediction exec: load_script: don't blindly truncate shebang string thermal: hwmon: inline helpers when CONFIG_THERMAL_HWMON is not set dccp: fool proof ccid_hc_[rt]x_parse_options() net: dp83640: expire old TX-skb rxrpc: bad unlock balance in rxrpc_recvmsg skge: potential memory corruption in skge_get_regs() rds: fix refcount bug in rds_sock_addref net: systemport: Fix WoL with password after deep sleep net/mlx5e: Force CHECKSUM_UNNECESSARY for short ethernet frames net: dsa: slave: Don't propagate flag changes on down slave interfaces enic: fix checksum validation for IPv6 ALSA: compress: Fix stop handling on compressed capture streams ALSA: hda - Serialize codec registrations fuse: call pipe_buf_release() under pipe lock fuse: decrement NR_WRITEBACK_TEMP on the right page fuse: handle zero sized retrieve correctly dmaengine: bcm2835: Fix interrupt race on RT dmaengine: bcm2835: Fix abort of transactions dmaengine: imx-dma: fix wrong callback invoke usb: phy: am335x: fix race condition in _probe usb: gadget: udc: net2272: Fix bitwise and boolean operations usb: gadget: musb: fix short isoc packets with inventra dma scsi: aic94xx: fix module loading KVM: x86: work around leak of uninitialized stack contents (CVE-2019-7222) kvm: fix kvm_ioctl_create_device() reference counting (CVE-2019-6974) KVM: nVMX: unconditionally cancel preemption timer in free_nested (CVE-2019-7221) perf/x86/intel/uncore: Add Node ID mask x86/MCE: Initialize mce.bank in the case of a fatal error in mce_no_way_out() perf/core: Don't WARN() for impossible ring-buffer sizes perf tests evsel-tp-sched: Fix bitwise operator serial: fix race between flush_to_ldisc and tty_open oom, oom_reaper: do not enqueue same task twice PCI: vmd: Free up IRQs on suspend path IB/hfi1: Add limit test for RC/UC send via loopback perf/x86/intel: Delay memory deallocation until x86_pmu_dead_cpu() ath9k: dynack: make ewma estimation faster ath9k: dynack: check da->enabled first in sampling routines Linux 4.9.156 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
1294 lines
32 KiB
C
1294 lines
32 KiB
C
/*
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* Driver for the SWIM3 (Super Woz Integrated Machine 3)
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* floppy controller found on Power Macintoshes.
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*
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* Copyright (C) 1996 Paul Mackerras.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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/*
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* TODO:
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* handle 2 drives
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* handle GCR disks
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*/
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#undef DEBUG
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/timer.h>
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#include <linux/delay.h>
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#include <linux/fd.h>
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#include <linux/ioctl.h>
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#include <linux/blkdev.h>
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <linux/wait.h>
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#include <asm/io.h>
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#include <asm/dbdma.h>
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#include <asm/prom.h>
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#include <asm/uaccess.h>
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#include <asm/mediabay.h>
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#include <asm/machdep.h>
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#include <asm/pmac_feature.h>
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#define MAX_FLOPPIES 2
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static DEFINE_MUTEX(swim3_mutex);
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static struct gendisk *disks[MAX_FLOPPIES];
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enum swim_state {
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idle,
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locating,
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seeking,
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settling,
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do_transfer,
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jogging,
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available,
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revalidating,
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ejecting
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};
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#define REG(x) unsigned char x; char x ## _pad[15];
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/*
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* The names for these registers mostly represent speculation on my part.
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* It will be interesting to see how close they are to the names Apple uses.
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*/
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struct swim3 {
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REG(data);
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REG(timer); /* counts down at 1MHz */
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REG(error);
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REG(mode);
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REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
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REG(setup);
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REG(control); /* writing bits clears them */
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REG(status); /* writing bits sets them in control */
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REG(intr);
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REG(nseek); /* # tracks to seek */
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REG(ctrack); /* current track number */
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REG(csect); /* current sector number */
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REG(gap3); /* size of gap 3 in track format */
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REG(sector); /* sector # to read or write */
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REG(nsect); /* # sectors to read or write */
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REG(intr_enable);
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};
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#define control_bic control
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#define control_bis status
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/* Bits in select register */
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#define CA_MASK 7
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#define LSTRB 8
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/* Bits in control register */
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#define DO_SEEK 0x80
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#define FORMAT 0x40
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#define SELECT 0x20
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#define WRITE_SECTORS 0x10
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#define DO_ACTION 0x08
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#define DRIVE2_ENABLE 0x04
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#define DRIVE_ENABLE 0x02
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#define INTR_ENABLE 0x01
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/* Bits in status register */
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#define FIFO_1BYTE 0x80
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#define FIFO_2BYTE 0x40
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#define ERROR 0x20
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#define DATA 0x08
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#define RDDATA 0x04
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#define INTR_PENDING 0x02
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#define MARK_BYTE 0x01
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/* Bits in intr and intr_enable registers */
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#define ERROR_INTR 0x20
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#define DATA_CHANGED 0x10
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#define TRANSFER_DONE 0x08
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#define SEEN_SECTOR 0x04
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#define SEEK_DONE 0x02
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#define TIMER_DONE 0x01
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/* Bits in error register */
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#define ERR_DATA_CRC 0x80
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#define ERR_ADDR_CRC 0x40
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#define ERR_OVERRUN 0x04
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#define ERR_UNDERRUN 0x01
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/* Bits in setup register */
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#define S_SW_RESET 0x80
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#define S_GCR_WRITE 0x40
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#define S_IBM_DRIVE 0x20
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#define S_TEST_MODE 0x10
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#define S_FCLK_DIV2 0x08
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#define S_GCR 0x04
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#define S_COPY_PROT 0x02
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#define S_INV_WDATA 0x01
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/* Select values for swim3_action */
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#define SEEK_POSITIVE 0
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#define SEEK_NEGATIVE 4
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#define STEP 1
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#define MOTOR_ON 2
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#define MOTOR_OFF 6
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#define INDEX 3
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#define EJECT 7
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#define SETMFM 9
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#define SETGCR 13
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/* Select values for swim3_select and swim3_readbit */
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#define STEP_DIR 0
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#define STEPPING 1
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#define MOTOR_ON 2
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#define RELAX 3 /* also eject in progress */
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#define READ_DATA_0 4
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#define TWOMEG_DRIVE 5
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#define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
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#define DRIVE_PRESENT 7
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#define DISK_IN 8
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#define WRITE_PROT 9
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#define TRACK_ZERO 10
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#define TACHO 11
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#define READ_DATA_1 12
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#define MFM_MODE 13
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#define SEEK_COMPLETE 14
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#define ONEMEG_MEDIA 15
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/* Definitions of values used in writing and formatting */
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#define DATA_ESCAPE 0x99
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#define GCR_SYNC_EXC 0x3f
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#define GCR_SYNC_CONV 0x80
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#define GCR_FIRST_MARK 0xd5
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#define GCR_SECOND_MARK 0xaa
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#define GCR_ADDR_MARK "\xd5\xaa\x00"
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#define GCR_DATA_MARK "\xd5\xaa\x0b"
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#define GCR_SLIP_BYTE "\x27\xaa"
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#define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
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#define DATA_99 "\x99\x99"
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#define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
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#define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
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#define MFM_GAP_LEN 12
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struct floppy_state {
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enum swim_state state;
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struct swim3 __iomem *swim3; /* hardware registers */
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struct dbdma_regs __iomem *dma; /* DMA controller registers */
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int swim3_intr; /* interrupt number for SWIM3 */
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int dma_intr; /* interrupt number for DMA channel */
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int cur_cyl; /* cylinder head is on, or -1 */
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int cur_sector; /* last sector we saw go past */
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int req_cyl; /* the cylinder for the current r/w request */
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int head; /* head number ditto */
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int req_sector; /* sector number ditto */
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int scount; /* # sectors we're transferring at present */
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int retries;
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int settle_time;
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int secpercyl; /* disk geometry information */
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int secpertrack;
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int total_secs;
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int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
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struct dbdma_cmd *dma_cmd;
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int ref_count;
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int expect_cyl;
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struct timer_list timeout;
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int timeout_pending;
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int ejected;
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wait_queue_head_t wait;
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int wanted;
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struct macio_dev *mdev;
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char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
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int index;
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struct request *cur_req;
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};
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#define swim3_err(fmt, arg...) dev_err(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
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#define swim3_warn(fmt, arg...) dev_warn(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
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#define swim3_info(fmt, arg...) dev_info(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
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#ifdef DEBUG
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#define swim3_dbg(fmt, arg...) dev_dbg(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
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#else
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#define swim3_dbg(fmt, arg...) do { } while(0)
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#endif
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static struct floppy_state floppy_states[MAX_FLOPPIES];
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static int floppy_count = 0;
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static DEFINE_SPINLOCK(swim3_lock);
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static unsigned short write_preamble[] = {
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0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
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0, 0, 0, 0, 0, 0, /* sync field */
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0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
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0x990f /* no escape for 512 bytes */
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};
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static unsigned short write_postamble[] = {
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0x9904, /* insert CRC */
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0x4e4e, 0x4e4e,
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0x9908, /* stop writing */
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0, 0, 0, 0, 0, 0
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};
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static void seek_track(struct floppy_state *fs, int n);
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static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
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static void act(struct floppy_state *fs);
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static void scan_timeout(unsigned long data);
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static void seek_timeout(unsigned long data);
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static void settle_timeout(unsigned long data);
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static void xfer_timeout(unsigned long data);
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static irqreturn_t swim3_interrupt(int irq, void *dev_id);
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/*static void fd_dma_interrupt(int irq, void *dev_id);*/
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static int grab_drive(struct floppy_state *fs, enum swim_state state,
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int interruptible);
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static void release_drive(struct floppy_state *fs);
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static int fd_eject(struct floppy_state *fs);
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static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
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unsigned int cmd, unsigned long param);
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static int floppy_open(struct block_device *bdev, fmode_t mode);
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static void floppy_release(struct gendisk *disk, fmode_t mode);
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static unsigned int floppy_check_events(struct gendisk *disk,
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unsigned int clearing);
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static int floppy_revalidate(struct gendisk *disk);
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static bool swim3_end_request(struct floppy_state *fs, int err, unsigned int nr_bytes)
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{
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struct request *req = fs->cur_req;
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int rc;
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swim3_dbg(" end request, err=%d nr_bytes=%d, cur_req=%p\n",
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err, nr_bytes, req);
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if (err)
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nr_bytes = blk_rq_cur_bytes(req);
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rc = __blk_end_request(req, err, nr_bytes);
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if (rc)
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return true;
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fs->cur_req = NULL;
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return false;
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}
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static void swim3_select(struct floppy_state *fs, int sel)
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{
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struct swim3 __iomem *sw = fs->swim3;
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out_8(&sw->select, RELAX);
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if (sel & 8)
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out_8(&sw->control_bis, SELECT);
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else
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out_8(&sw->control_bic, SELECT);
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out_8(&sw->select, sel & CA_MASK);
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}
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static void swim3_action(struct floppy_state *fs, int action)
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{
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struct swim3 __iomem *sw = fs->swim3;
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swim3_select(fs, action);
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udelay(1);
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out_8(&sw->select, sw->select | LSTRB);
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udelay(2);
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out_8(&sw->select, sw->select & ~LSTRB);
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udelay(1);
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}
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static int swim3_readbit(struct floppy_state *fs, int bit)
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{
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struct swim3 __iomem *sw = fs->swim3;
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int stat;
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swim3_select(fs, bit);
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udelay(1);
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stat = in_8(&sw->status);
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return (stat & DATA) == 0;
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}
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static void start_request(struct floppy_state *fs)
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{
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struct request *req;
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unsigned long x;
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swim3_dbg("start request, initial state=%d\n", fs->state);
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if (fs->state == idle && fs->wanted) {
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fs->state = available;
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wake_up(&fs->wait);
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return;
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}
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while (fs->state == idle) {
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swim3_dbg("start request, idle loop, cur_req=%p\n", fs->cur_req);
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if (!fs->cur_req) {
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fs->cur_req = blk_fetch_request(disks[fs->index]->queue);
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swim3_dbg(" fetched request %p\n", fs->cur_req);
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if (!fs->cur_req)
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break;
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}
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req = fs->cur_req;
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if (fs->mdev->media_bay &&
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check_media_bay(fs->mdev->media_bay) != MB_FD) {
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swim3_dbg("%s", " media bay absent, dropping req\n");
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swim3_end_request(fs, -ENODEV, 0);
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continue;
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}
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#if 0 /* This is really too verbose */
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swim3_dbg("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%u buf=%p\n",
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req->rq_disk->disk_name, req->cmd,
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(long)blk_rq_pos(req), blk_rq_sectors(req),
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bio_data(req->bio));
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swim3_dbg(" errors=%d current_nr_sectors=%u\n",
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req->errors, blk_rq_cur_sectors(req));
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#endif
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if (blk_rq_pos(req) >= fs->total_secs) {
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swim3_dbg(" pos out of bounds (%ld, max is %ld)\n",
|
|
(long)blk_rq_pos(req), (long)fs->total_secs);
|
|
swim3_end_request(fs, -EIO, 0);
|
|
continue;
|
|
}
|
|
if (fs->ejected) {
|
|
swim3_dbg("%s", " disk ejected\n");
|
|
swim3_end_request(fs, -EIO, 0);
|
|
continue;
|
|
}
|
|
|
|
if (rq_data_dir(req) == WRITE) {
|
|
if (fs->write_prot < 0)
|
|
fs->write_prot = swim3_readbit(fs, WRITE_PROT);
|
|
if (fs->write_prot) {
|
|
swim3_dbg("%s", " try to write, disk write protected\n");
|
|
swim3_end_request(fs, -EIO, 0);
|
|
continue;
|
|
}
|
|
}
|
|
|
|
/* Do not remove the cast. blk_rq_pos(req) is now a
|
|
* sector_t and can be 64 bits, but it will never go
|
|
* past 32 bits for this driver anyway, so we can
|
|
* safely cast it down and not have to do a 64/32
|
|
* division
|
|
*/
|
|
fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl;
|
|
x = ((long)blk_rq_pos(req)) % fs->secpercyl;
|
|
fs->head = x / fs->secpertrack;
|
|
fs->req_sector = x % fs->secpertrack + 1;
|
|
fs->state = do_transfer;
|
|
fs->retries = 0;
|
|
|
|
act(fs);
|
|
}
|
|
}
|
|
|
|
static void do_fd_request(struct request_queue * q)
|
|
{
|
|
start_request(q->queuedata);
|
|
}
|
|
|
|
static void set_timeout(struct floppy_state *fs, int nticks,
|
|
void (*proc)(unsigned long))
|
|
{
|
|
if (fs->timeout_pending)
|
|
del_timer(&fs->timeout);
|
|
fs->timeout.expires = jiffies + nticks;
|
|
fs->timeout.function = proc;
|
|
fs->timeout.data = (unsigned long) fs;
|
|
add_timer(&fs->timeout);
|
|
fs->timeout_pending = 1;
|
|
}
|
|
|
|
static inline void scan_track(struct floppy_state *fs)
|
|
{
|
|
struct swim3 __iomem *sw = fs->swim3;
|
|
|
|
swim3_select(fs, READ_DATA_0);
|
|
in_8(&sw->intr); /* clear SEEN_SECTOR bit */
|
|
in_8(&sw->error);
|
|
out_8(&sw->intr_enable, SEEN_SECTOR);
|
|
out_8(&sw->control_bis, DO_ACTION);
|
|
/* enable intr when track found */
|
|
set_timeout(fs, HZ, scan_timeout); /* enable timeout */
|
|
}
|
|
|
|
static inline void seek_track(struct floppy_state *fs, int n)
|
|
{
|
|
struct swim3 __iomem *sw = fs->swim3;
|
|
|
|
if (n >= 0) {
|
|
swim3_action(fs, SEEK_POSITIVE);
|
|
sw->nseek = n;
|
|
} else {
|
|
swim3_action(fs, SEEK_NEGATIVE);
|
|
sw->nseek = -n;
|
|
}
|
|
fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
|
|
swim3_select(fs, STEP);
|
|
in_8(&sw->error);
|
|
/* enable intr when seek finished */
|
|
out_8(&sw->intr_enable, SEEK_DONE);
|
|
out_8(&sw->control_bis, DO_SEEK);
|
|
set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
|
|
fs->settle_time = 0;
|
|
}
|
|
|
|
static inline void init_dma(struct dbdma_cmd *cp, int cmd,
|
|
void *buf, int count)
|
|
{
|
|
cp->req_count = cpu_to_le16(count);
|
|
cp->command = cpu_to_le16(cmd);
|
|
cp->phy_addr = cpu_to_le32(virt_to_bus(buf));
|
|
cp->xfer_status = 0;
|
|
}
|
|
|
|
static inline void setup_transfer(struct floppy_state *fs)
|
|
{
|
|
int n;
|
|
struct swim3 __iomem *sw = fs->swim3;
|
|
struct dbdma_cmd *cp = fs->dma_cmd;
|
|
struct dbdma_regs __iomem *dr = fs->dma;
|
|
struct request *req = fs->cur_req;
|
|
|
|
if (blk_rq_cur_sectors(req) <= 0) {
|
|
swim3_warn("%s", "Transfer 0 sectors ?\n");
|
|
return;
|
|
}
|
|
if (rq_data_dir(req) == WRITE)
|
|
n = 1;
|
|
else {
|
|
n = fs->secpertrack - fs->req_sector + 1;
|
|
if (n > blk_rq_cur_sectors(req))
|
|
n = blk_rq_cur_sectors(req);
|
|
}
|
|
|
|
swim3_dbg(" setup xfer at sect %d (of %d) head %d for %d\n",
|
|
fs->req_sector, fs->secpertrack, fs->head, n);
|
|
|
|
fs->scount = n;
|
|
swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
|
|
out_8(&sw->sector, fs->req_sector);
|
|
out_8(&sw->nsect, n);
|
|
out_8(&sw->gap3, 0);
|
|
out_le32(&dr->cmdptr, virt_to_bus(cp));
|
|
if (rq_data_dir(req) == WRITE) {
|
|
/* Set up 3 dma commands: write preamble, data, postamble */
|
|
init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
|
|
++cp;
|
|
init_dma(cp, OUTPUT_MORE, bio_data(req->bio), 512);
|
|
++cp;
|
|
init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
|
|
} else {
|
|
init_dma(cp, INPUT_LAST, bio_data(req->bio), n * 512);
|
|
}
|
|
++cp;
|
|
out_le16(&cp->command, DBDMA_STOP);
|
|
out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
|
|
in_8(&sw->error);
|
|
out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
|
|
if (rq_data_dir(req) == WRITE)
|
|
out_8(&sw->control_bis, WRITE_SECTORS);
|
|
in_8(&sw->intr);
|
|
out_le32(&dr->control, (RUN << 16) | RUN);
|
|
/* enable intr when transfer complete */
|
|
out_8(&sw->intr_enable, TRANSFER_DONE);
|
|
out_8(&sw->control_bis, DO_ACTION);
|
|
set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
|
|
}
|
|
|
|
static void act(struct floppy_state *fs)
|
|
{
|
|
for (;;) {
|
|
swim3_dbg(" act loop, state=%d, req_cyl=%d, cur_cyl=%d\n",
|
|
fs->state, fs->req_cyl, fs->cur_cyl);
|
|
|
|
switch (fs->state) {
|
|
case idle:
|
|
return; /* XXX shouldn't get here */
|
|
|
|
case locating:
|
|
if (swim3_readbit(fs, TRACK_ZERO)) {
|
|
swim3_dbg("%s", " locate track 0\n");
|
|
fs->cur_cyl = 0;
|
|
if (fs->req_cyl == 0)
|
|
fs->state = do_transfer;
|
|
else
|
|
fs->state = seeking;
|
|
break;
|
|
}
|
|
scan_track(fs);
|
|
return;
|
|
|
|
case seeking:
|
|
if (fs->cur_cyl < 0) {
|
|
fs->expect_cyl = -1;
|
|
fs->state = locating;
|
|
break;
|
|
}
|
|
if (fs->req_cyl == fs->cur_cyl) {
|
|
swim3_warn("%s", "Whoops, seeking 0\n");
|
|
fs->state = do_transfer;
|
|
break;
|
|
}
|
|
seek_track(fs, fs->req_cyl - fs->cur_cyl);
|
|
return;
|
|
|
|
case settling:
|
|
/* check for SEEK_COMPLETE after 30ms */
|
|
fs->settle_time = (HZ + 32) / 33;
|
|
set_timeout(fs, fs->settle_time, settle_timeout);
|
|
return;
|
|
|
|
case do_transfer:
|
|
if (fs->cur_cyl != fs->req_cyl) {
|
|
if (fs->retries > 5) {
|
|
swim3_err("Wrong cylinder in transfer, want: %d got %d\n",
|
|
fs->req_cyl, fs->cur_cyl);
|
|
swim3_end_request(fs, -EIO, 0);
|
|
fs->state = idle;
|
|
return;
|
|
}
|
|
fs->state = seeking;
|
|
break;
|
|
}
|
|
setup_transfer(fs);
|
|
return;
|
|
|
|
case jogging:
|
|
seek_track(fs, -5);
|
|
return;
|
|
|
|
default:
|
|
swim3_err("Unknown state %d\n", fs->state);
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
|
|
static void scan_timeout(unsigned long data)
|
|
{
|
|
struct floppy_state *fs = (struct floppy_state *) data;
|
|
struct swim3 __iomem *sw = fs->swim3;
|
|
unsigned long flags;
|
|
|
|
swim3_dbg("* scan timeout, state=%d\n", fs->state);
|
|
|
|
spin_lock_irqsave(&swim3_lock, flags);
|
|
fs->timeout_pending = 0;
|
|
out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
|
|
out_8(&sw->select, RELAX);
|
|
out_8(&sw->intr_enable, 0);
|
|
fs->cur_cyl = -1;
|
|
if (fs->retries > 5) {
|
|
swim3_end_request(fs, -EIO, 0);
|
|
fs->state = idle;
|
|
start_request(fs);
|
|
} else {
|
|
fs->state = jogging;
|
|
act(fs);
|
|
}
|
|
spin_unlock_irqrestore(&swim3_lock, flags);
|
|
}
|
|
|
|
static void seek_timeout(unsigned long data)
|
|
{
|
|
struct floppy_state *fs = (struct floppy_state *) data;
|
|
struct swim3 __iomem *sw = fs->swim3;
|
|
unsigned long flags;
|
|
|
|
swim3_dbg("* seek timeout, state=%d\n", fs->state);
|
|
|
|
spin_lock_irqsave(&swim3_lock, flags);
|
|
fs->timeout_pending = 0;
|
|
out_8(&sw->control_bic, DO_SEEK);
|
|
out_8(&sw->select, RELAX);
|
|
out_8(&sw->intr_enable, 0);
|
|
swim3_err("%s", "Seek timeout\n");
|
|
swim3_end_request(fs, -EIO, 0);
|
|
fs->state = idle;
|
|
start_request(fs);
|
|
spin_unlock_irqrestore(&swim3_lock, flags);
|
|
}
|
|
|
|
static void settle_timeout(unsigned long data)
|
|
{
|
|
struct floppy_state *fs = (struct floppy_state *) data;
|
|
struct swim3 __iomem *sw = fs->swim3;
|
|
unsigned long flags;
|
|
|
|
swim3_dbg("* settle timeout, state=%d\n", fs->state);
|
|
|
|
spin_lock_irqsave(&swim3_lock, flags);
|
|
fs->timeout_pending = 0;
|
|
if (swim3_readbit(fs, SEEK_COMPLETE)) {
|
|
out_8(&sw->select, RELAX);
|
|
fs->state = locating;
|
|
act(fs);
|
|
goto unlock;
|
|
}
|
|
out_8(&sw->select, RELAX);
|
|
if (fs->settle_time < 2*HZ) {
|
|
++fs->settle_time;
|
|
set_timeout(fs, 1, settle_timeout);
|
|
goto unlock;
|
|
}
|
|
swim3_err("%s", "Seek settle timeout\n");
|
|
swim3_end_request(fs, -EIO, 0);
|
|
fs->state = idle;
|
|
start_request(fs);
|
|
unlock:
|
|
spin_unlock_irqrestore(&swim3_lock, flags);
|
|
}
|
|
|
|
static void xfer_timeout(unsigned long data)
|
|
{
|
|
struct floppy_state *fs = (struct floppy_state *) data;
|
|
struct swim3 __iomem *sw = fs->swim3;
|
|
struct dbdma_regs __iomem *dr = fs->dma;
|
|
unsigned long flags;
|
|
int n;
|
|
|
|
swim3_dbg("* xfer timeout, state=%d\n", fs->state);
|
|
|
|
spin_lock_irqsave(&swim3_lock, flags);
|
|
fs->timeout_pending = 0;
|
|
out_le32(&dr->control, RUN << 16);
|
|
/* We must wait a bit for dbdma to stop */
|
|
for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
|
|
udelay(1);
|
|
out_8(&sw->intr_enable, 0);
|
|
out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
|
|
out_8(&sw->select, RELAX);
|
|
swim3_err("Timeout %sing sector %ld\n",
|
|
(rq_data_dir(fs->cur_req)==WRITE? "writ": "read"),
|
|
(long)blk_rq_pos(fs->cur_req));
|
|
swim3_end_request(fs, -EIO, 0);
|
|
fs->state = idle;
|
|
start_request(fs);
|
|
spin_unlock_irqrestore(&swim3_lock, flags);
|
|
}
|
|
|
|
static irqreturn_t swim3_interrupt(int irq, void *dev_id)
|
|
{
|
|
struct floppy_state *fs = (struct floppy_state *) dev_id;
|
|
struct swim3 __iomem *sw = fs->swim3;
|
|
int intr, err, n;
|
|
int stat, resid;
|
|
struct dbdma_regs __iomem *dr;
|
|
struct dbdma_cmd *cp;
|
|
unsigned long flags;
|
|
struct request *req = fs->cur_req;
|
|
|
|
swim3_dbg("* interrupt, state=%d\n", fs->state);
|
|
|
|
spin_lock_irqsave(&swim3_lock, flags);
|
|
intr = in_8(&sw->intr);
|
|
err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
|
|
if ((intr & ERROR_INTR) && fs->state != do_transfer)
|
|
swim3_err("Non-transfer error interrupt: state=%d, dir=%x, intr=%x, err=%x\n",
|
|
fs->state, rq_data_dir(req), intr, err);
|
|
switch (fs->state) {
|
|
case locating:
|
|
if (intr & SEEN_SECTOR) {
|
|
out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
|
|
out_8(&sw->select, RELAX);
|
|
out_8(&sw->intr_enable, 0);
|
|
del_timer(&fs->timeout);
|
|
fs->timeout_pending = 0;
|
|
if (sw->ctrack == 0xff) {
|
|
swim3_err("%s", "Seen sector but cyl=ff?\n");
|
|
fs->cur_cyl = -1;
|
|
if (fs->retries > 5) {
|
|
swim3_end_request(fs, -EIO, 0);
|
|
fs->state = idle;
|
|
start_request(fs);
|
|
} else {
|
|
fs->state = jogging;
|
|
act(fs);
|
|
}
|
|
break;
|
|
}
|
|
fs->cur_cyl = sw->ctrack;
|
|
fs->cur_sector = sw->csect;
|
|
if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
|
|
swim3_err("Expected cyl %d, got %d\n",
|
|
fs->expect_cyl, fs->cur_cyl);
|
|
fs->state = do_transfer;
|
|
act(fs);
|
|
}
|
|
break;
|
|
case seeking:
|
|
case jogging:
|
|
if (sw->nseek == 0) {
|
|
out_8(&sw->control_bic, DO_SEEK);
|
|
out_8(&sw->select, RELAX);
|
|
out_8(&sw->intr_enable, 0);
|
|
del_timer(&fs->timeout);
|
|
fs->timeout_pending = 0;
|
|
if (fs->state == seeking)
|
|
++fs->retries;
|
|
fs->state = settling;
|
|
act(fs);
|
|
}
|
|
break;
|
|
case settling:
|
|
out_8(&sw->intr_enable, 0);
|
|
del_timer(&fs->timeout);
|
|
fs->timeout_pending = 0;
|
|
act(fs);
|
|
break;
|
|
case do_transfer:
|
|
if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
|
|
break;
|
|
out_8(&sw->intr_enable, 0);
|
|
out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
|
|
out_8(&sw->select, RELAX);
|
|
del_timer(&fs->timeout);
|
|
fs->timeout_pending = 0;
|
|
dr = fs->dma;
|
|
cp = fs->dma_cmd;
|
|
if (rq_data_dir(req) == WRITE)
|
|
++cp;
|
|
/*
|
|
* Check that the main data transfer has finished.
|
|
* On writing, the swim3 sometimes doesn't use
|
|
* up all the bytes of the postamble, so we can still
|
|
* see DMA active here. That doesn't matter as long
|
|
* as all the sector data has been transferred.
|
|
*/
|
|
if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
|
|
/* wait a little while for DMA to complete */
|
|
for (n = 0; n < 100; ++n) {
|
|
if (cp->xfer_status != 0)
|
|
break;
|
|
udelay(1);
|
|
barrier();
|
|
}
|
|
}
|
|
/* turn off DMA */
|
|
out_le32(&dr->control, (RUN | PAUSE) << 16);
|
|
stat = le16_to_cpu(cp->xfer_status);
|
|
resid = le16_to_cpu(cp->res_count);
|
|
if (intr & ERROR_INTR) {
|
|
n = fs->scount - 1 - resid / 512;
|
|
if (n > 0) {
|
|
blk_update_request(req, 0, n << 9);
|
|
fs->req_sector += n;
|
|
}
|
|
if (fs->retries < 5) {
|
|
++fs->retries;
|
|
act(fs);
|
|
} else {
|
|
swim3_err("Error %sing block %ld (err=%x)\n",
|
|
rq_data_dir(req) == WRITE? "writ": "read",
|
|
(long)blk_rq_pos(req), err);
|
|
swim3_end_request(fs, -EIO, 0);
|
|
fs->state = idle;
|
|
}
|
|
} else {
|
|
if ((stat & ACTIVE) == 0 || resid != 0) {
|
|
/* musta been an error */
|
|
swim3_err("fd dma error: stat=%x resid=%d\n", stat, resid);
|
|
swim3_err(" state=%d, dir=%x, intr=%x, err=%x\n",
|
|
fs->state, rq_data_dir(req), intr, err);
|
|
swim3_end_request(fs, -EIO, 0);
|
|
fs->state = idle;
|
|
start_request(fs);
|
|
break;
|
|
}
|
|
fs->retries = 0;
|
|
if (swim3_end_request(fs, 0, fs->scount << 9)) {
|
|
fs->req_sector += fs->scount;
|
|
if (fs->req_sector > fs->secpertrack) {
|
|
fs->req_sector -= fs->secpertrack;
|
|
if (++fs->head > 1) {
|
|
fs->head = 0;
|
|
++fs->req_cyl;
|
|
}
|
|
}
|
|
act(fs);
|
|
} else
|
|
fs->state = idle;
|
|
}
|
|
if (fs->state == idle)
|
|
start_request(fs);
|
|
break;
|
|
default:
|
|
swim3_err("Don't know what to do in state %d\n", fs->state);
|
|
}
|
|
spin_unlock_irqrestore(&swim3_lock, flags);
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
/*
|
|
static void fd_dma_interrupt(int irq, void *dev_id)
|
|
{
|
|
}
|
|
*/
|
|
|
|
/* Called under the mutex to grab exclusive access to a drive */
|
|
static int grab_drive(struct floppy_state *fs, enum swim_state state,
|
|
int interruptible)
|
|
{
|
|
unsigned long flags;
|
|
|
|
swim3_dbg("%s", "-> grab drive\n");
|
|
|
|
spin_lock_irqsave(&swim3_lock, flags);
|
|
if (fs->state != idle && fs->state != available) {
|
|
++fs->wanted;
|
|
/* this will enable irqs in order to sleep */
|
|
if (!interruptible)
|
|
wait_event_lock_irq(fs->wait,
|
|
fs->state == available,
|
|
swim3_lock);
|
|
else if (wait_event_interruptible_lock_irq(fs->wait,
|
|
fs->state == available,
|
|
swim3_lock)) {
|
|
--fs->wanted;
|
|
spin_unlock_irqrestore(&swim3_lock, flags);
|
|
return -EINTR;
|
|
}
|
|
--fs->wanted;
|
|
}
|
|
fs->state = state;
|
|
spin_unlock_irqrestore(&swim3_lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void release_drive(struct floppy_state *fs)
|
|
{
|
|
unsigned long flags;
|
|
|
|
swim3_dbg("%s", "-> release drive\n");
|
|
|
|
spin_lock_irqsave(&swim3_lock, flags);
|
|
fs->state = idle;
|
|
start_request(fs);
|
|
spin_unlock_irqrestore(&swim3_lock, flags);
|
|
}
|
|
|
|
static int fd_eject(struct floppy_state *fs)
|
|
{
|
|
int err, n;
|
|
|
|
err = grab_drive(fs, ejecting, 1);
|
|
if (err)
|
|
return err;
|
|
swim3_action(fs, EJECT);
|
|
for (n = 20; n > 0; --n) {
|
|
if (signal_pending(current)) {
|
|
err = -EINTR;
|
|
break;
|
|
}
|
|
swim3_select(fs, RELAX);
|
|
schedule_timeout_interruptible(1);
|
|
if (swim3_readbit(fs, DISK_IN) == 0)
|
|
break;
|
|
}
|
|
swim3_select(fs, RELAX);
|
|
udelay(150);
|
|
fs->ejected = 1;
|
|
release_drive(fs);
|
|
return err;
|
|
}
|
|
|
|
static struct floppy_struct floppy_type =
|
|
{ 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
|
|
|
|
static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode,
|
|
unsigned int cmd, unsigned long param)
|
|
{
|
|
struct floppy_state *fs = bdev->bd_disk->private_data;
|
|
int err;
|
|
|
|
if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
|
|
return -EPERM;
|
|
|
|
if (fs->mdev->media_bay &&
|
|
check_media_bay(fs->mdev->media_bay) != MB_FD)
|
|
return -ENXIO;
|
|
|
|
switch (cmd) {
|
|
case FDEJECT:
|
|
if (fs->ref_count != 1)
|
|
return -EBUSY;
|
|
err = fd_eject(fs);
|
|
return err;
|
|
case FDGETPRM:
|
|
if (copy_to_user((void __user *) param, &floppy_type,
|
|
sizeof(struct floppy_struct)))
|
|
return -EFAULT;
|
|
return 0;
|
|
}
|
|
return -ENOTTY;
|
|
}
|
|
|
|
static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
|
|
unsigned int cmd, unsigned long param)
|
|
{
|
|
int ret;
|
|
|
|
mutex_lock(&swim3_mutex);
|
|
ret = floppy_locked_ioctl(bdev, mode, cmd, param);
|
|
mutex_unlock(&swim3_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int floppy_open(struct block_device *bdev, fmode_t mode)
|
|
{
|
|
struct floppy_state *fs = bdev->bd_disk->private_data;
|
|
struct swim3 __iomem *sw = fs->swim3;
|
|
int n, err = 0;
|
|
|
|
if (fs->ref_count == 0) {
|
|
if (fs->mdev->media_bay &&
|
|
check_media_bay(fs->mdev->media_bay) != MB_FD)
|
|
return -ENXIO;
|
|
out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
|
|
out_8(&sw->control_bic, 0xff);
|
|
out_8(&sw->mode, 0x95);
|
|
udelay(10);
|
|
out_8(&sw->intr_enable, 0);
|
|
out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
|
|
swim3_action(fs, MOTOR_ON);
|
|
fs->write_prot = -1;
|
|
fs->cur_cyl = -1;
|
|
for (n = 0; n < 2 * HZ; ++n) {
|
|
if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
|
|
break;
|
|
if (signal_pending(current)) {
|
|
err = -EINTR;
|
|
break;
|
|
}
|
|
swim3_select(fs, RELAX);
|
|
schedule_timeout_interruptible(1);
|
|
}
|
|
if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
|
|
|| swim3_readbit(fs, DISK_IN) == 0))
|
|
err = -ENXIO;
|
|
swim3_action(fs, SETMFM);
|
|
swim3_select(fs, RELAX);
|
|
|
|
} else if (fs->ref_count == -1 || mode & FMODE_EXCL)
|
|
return -EBUSY;
|
|
|
|
if (err == 0 && (mode & FMODE_NDELAY) == 0
|
|
&& (mode & (FMODE_READ|FMODE_WRITE))) {
|
|
check_disk_change(bdev);
|
|
if (fs->ejected)
|
|
err = -ENXIO;
|
|
}
|
|
|
|
if (err == 0 && (mode & FMODE_WRITE)) {
|
|
if (fs->write_prot < 0)
|
|
fs->write_prot = swim3_readbit(fs, WRITE_PROT);
|
|
if (fs->write_prot)
|
|
err = -EROFS;
|
|
}
|
|
|
|
if (err) {
|
|
if (fs->ref_count == 0) {
|
|
swim3_action(fs, MOTOR_OFF);
|
|
out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
|
|
swim3_select(fs, RELAX);
|
|
}
|
|
return err;
|
|
}
|
|
|
|
if (mode & FMODE_EXCL)
|
|
fs->ref_count = -1;
|
|
else
|
|
++fs->ref_count;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode)
|
|
{
|
|
int ret;
|
|
|
|
mutex_lock(&swim3_mutex);
|
|
ret = floppy_open(bdev, mode);
|
|
mutex_unlock(&swim3_mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void floppy_release(struct gendisk *disk, fmode_t mode)
|
|
{
|
|
struct floppy_state *fs = disk->private_data;
|
|
struct swim3 __iomem *sw = fs->swim3;
|
|
|
|
mutex_lock(&swim3_mutex);
|
|
if (fs->ref_count > 0)
|
|
--fs->ref_count;
|
|
else if (fs->ref_count == -1)
|
|
fs->ref_count = 0;
|
|
if (fs->ref_count == 0) {
|
|
swim3_action(fs, MOTOR_OFF);
|
|
out_8(&sw->control_bic, 0xff);
|
|
swim3_select(fs, RELAX);
|
|
}
|
|
mutex_unlock(&swim3_mutex);
|
|
}
|
|
|
|
static unsigned int floppy_check_events(struct gendisk *disk,
|
|
unsigned int clearing)
|
|
{
|
|
struct floppy_state *fs = disk->private_data;
|
|
return fs->ejected ? DISK_EVENT_MEDIA_CHANGE : 0;
|
|
}
|
|
|
|
static int floppy_revalidate(struct gendisk *disk)
|
|
{
|
|
struct floppy_state *fs = disk->private_data;
|
|
struct swim3 __iomem *sw;
|
|
int ret, n;
|
|
|
|
if (fs->mdev->media_bay &&
|
|
check_media_bay(fs->mdev->media_bay) != MB_FD)
|
|
return -ENXIO;
|
|
|
|
sw = fs->swim3;
|
|
grab_drive(fs, revalidating, 0);
|
|
out_8(&sw->intr_enable, 0);
|
|
out_8(&sw->control_bis, DRIVE_ENABLE);
|
|
swim3_action(fs, MOTOR_ON); /* necessary? */
|
|
fs->write_prot = -1;
|
|
fs->cur_cyl = -1;
|
|
mdelay(1);
|
|
for (n = HZ; n > 0; --n) {
|
|
if (swim3_readbit(fs, SEEK_COMPLETE))
|
|
break;
|
|
if (signal_pending(current))
|
|
break;
|
|
swim3_select(fs, RELAX);
|
|
schedule_timeout_interruptible(1);
|
|
}
|
|
ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
|
|
|| swim3_readbit(fs, DISK_IN) == 0;
|
|
if (ret)
|
|
swim3_action(fs, MOTOR_OFF);
|
|
else {
|
|
fs->ejected = 0;
|
|
swim3_action(fs, SETMFM);
|
|
}
|
|
swim3_select(fs, RELAX);
|
|
|
|
release_drive(fs);
|
|
return ret;
|
|
}
|
|
|
|
static const struct block_device_operations floppy_fops = {
|
|
.open = floppy_unlocked_open,
|
|
.release = floppy_release,
|
|
.ioctl = floppy_ioctl,
|
|
.check_events = floppy_check_events,
|
|
.revalidate_disk= floppy_revalidate,
|
|
};
|
|
|
|
static void swim3_mb_event(struct macio_dev* mdev, int mb_state)
|
|
{
|
|
struct floppy_state *fs = macio_get_drvdata(mdev);
|
|
struct swim3 __iomem *sw;
|
|
|
|
if (!fs)
|
|
return;
|
|
|
|
sw = fs->swim3;
|
|
|
|
if (mb_state != MB_FD)
|
|
return;
|
|
|
|
/* Clear state */
|
|
out_8(&sw->intr_enable, 0);
|
|
in_8(&sw->intr);
|
|
in_8(&sw->error);
|
|
}
|
|
|
|
static int swim3_add_device(struct macio_dev *mdev, int index)
|
|
{
|
|
struct device_node *swim = mdev->ofdev.dev.of_node;
|
|
struct floppy_state *fs = &floppy_states[index];
|
|
int rc = -EBUSY;
|
|
|
|
/* Do this first for message macros */
|
|
memset(fs, 0, sizeof(*fs));
|
|
fs->mdev = mdev;
|
|
fs->index = index;
|
|
|
|
/* Check & Request resources */
|
|
if (macio_resource_count(mdev) < 2) {
|
|
swim3_err("%s", "No address in device-tree\n");
|
|
return -ENXIO;
|
|
}
|
|
if (macio_irq_count(mdev) < 1) {
|
|
swim3_err("%s", "No interrupt in device-tree\n");
|
|
return -ENXIO;
|
|
}
|
|
if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
|
|
swim3_err("%s", "Can't request mmio resource\n");
|
|
return -EBUSY;
|
|
}
|
|
if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
|
|
swim3_err("%s", "Can't request dma resource\n");
|
|
macio_release_resource(mdev, 0);
|
|
return -EBUSY;
|
|
}
|
|
dev_set_drvdata(&mdev->ofdev.dev, fs);
|
|
|
|
if (mdev->media_bay == NULL)
|
|
pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
|
|
|
|
fs->state = idle;
|
|
fs->swim3 = (struct swim3 __iomem *)
|
|
ioremap(macio_resource_start(mdev, 0), 0x200);
|
|
if (fs->swim3 == NULL) {
|
|
swim3_err("%s", "Couldn't map mmio registers\n");
|
|
rc = -ENOMEM;
|
|
goto out_release;
|
|
}
|
|
fs->dma = (struct dbdma_regs __iomem *)
|
|
ioremap(macio_resource_start(mdev, 1), 0x200);
|
|
if (fs->dma == NULL) {
|
|
swim3_err("%s", "Couldn't map dma registers\n");
|
|
iounmap(fs->swim3);
|
|
rc = -ENOMEM;
|
|
goto out_release;
|
|
}
|
|
fs->swim3_intr = macio_irq(mdev, 0);
|
|
fs->dma_intr = macio_irq(mdev, 1);
|
|
fs->cur_cyl = -1;
|
|
fs->cur_sector = -1;
|
|
fs->secpercyl = 36;
|
|
fs->secpertrack = 18;
|
|
fs->total_secs = 2880;
|
|
init_waitqueue_head(&fs->wait);
|
|
|
|
fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
|
|
memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
|
|
fs->dma_cmd[1].command = cpu_to_le16(DBDMA_STOP);
|
|
|
|
if (mdev->media_bay == NULL || check_media_bay(mdev->media_bay) == MB_FD)
|
|
swim3_mb_event(mdev, MB_FD);
|
|
|
|
if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
|
|
swim3_err("%s", "Couldn't request interrupt\n");
|
|
pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
|
|
goto out_unmap;
|
|
return -EBUSY;
|
|
}
|
|
|
|
init_timer(&fs->timeout);
|
|
|
|
swim3_info("SWIM3 floppy controller %s\n",
|
|
mdev->media_bay ? "in media bay" : "");
|
|
|
|
return 0;
|
|
|
|
out_unmap:
|
|
iounmap(fs->dma);
|
|
iounmap(fs->swim3);
|
|
|
|
out_release:
|
|
macio_release_resource(mdev, 0);
|
|
macio_release_resource(mdev, 1);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int swim3_attach(struct macio_dev *mdev,
|
|
const struct of_device_id *match)
|
|
{
|
|
struct gendisk *disk;
|
|
int index, rc;
|
|
|
|
index = floppy_count++;
|
|
if (index >= MAX_FLOPPIES)
|
|
return -ENXIO;
|
|
|
|
/* Add the drive */
|
|
rc = swim3_add_device(mdev, index);
|
|
if (rc)
|
|
return rc;
|
|
/* Now register that disk. Same comment about failure handling */
|
|
disk = disks[index] = alloc_disk(1);
|
|
if (disk == NULL)
|
|
return -ENOMEM;
|
|
disk->queue = blk_init_queue(do_fd_request, &swim3_lock);
|
|
if (disk->queue == NULL) {
|
|
put_disk(disk);
|
|
return -ENOMEM;
|
|
}
|
|
disk->queue->queuedata = &floppy_states[index];
|
|
|
|
if (index == 0) {
|
|
/* If we failed, there isn't much we can do as the driver is still
|
|
* too dumb to remove the device, just bail out
|
|
*/
|
|
if (register_blkdev(FLOPPY_MAJOR, "fd"))
|
|
return 0;
|
|
}
|
|
|
|
disk->major = FLOPPY_MAJOR;
|
|
disk->first_minor = index;
|
|
disk->fops = &floppy_fops;
|
|
disk->private_data = &floppy_states[index];
|
|
disk->flags |= GENHD_FL_REMOVABLE;
|
|
sprintf(disk->disk_name, "fd%d", index);
|
|
set_capacity(disk, 2880);
|
|
add_disk(disk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct of_device_id swim3_match[] =
|
|
{
|
|
{
|
|
.name = "swim3",
|
|
},
|
|
{
|
|
.compatible = "ohare-swim3"
|
|
},
|
|
{
|
|
.compatible = "swim3"
|
|
},
|
|
{ /* end of list */ }
|
|
};
|
|
|
|
static struct macio_driver swim3_driver =
|
|
{
|
|
.driver = {
|
|
.name = "swim3",
|
|
.of_match_table = swim3_match,
|
|
},
|
|
.probe = swim3_attach,
|
|
#ifdef CONFIG_PMAC_MEDIABAY
|
|
.mediabay_event = swim3_mb_event,
|
|
#endif
|
|
#if 0
|
|
.suspend = swim3_suspend,
|
|
.resume = swim3_resume,
|
|
#endif
|
|
};
|
|
|
|
|
|
int swim3_init(void)
|
|
{
|
|
macio_register_driver(&swim3_driver);
|
|
return 0;
|
|
}
|
|
|
|
module_init(swim3_init)
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Paul Mackerras");
|
|
MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);
|