Changes in 4.9.169 x86/power: Fix some ordering bugs in __restore_processor_context() x86/power/64: Use struct desc_ptr for the IDT in struct saved_context x86/power/32: Move SYSENTER MSR restoration to fix_processor_context() x86/power: Make restore_processor_context() sane powerpc/tm: Limit TM code inside PPC_TRANSACTIONAL_MEM kbuild: clang: choose GCC_TOOLCHAIN_DIR not on LD x86: vdso: Use $LD instead of $CC to link x86/vdso: Drop implicit common-page-size linker flag lib/string.c: implement a basic bcmp powerpc: Fix invalid use of register expressions powerpc/64s: Add barrier_nospec powerpc/64s: Add support for ori barrier_nospec patching powerpc: Avoid code patching freed init sections powerpc/64s: Patch barrier_nospec in modules powerpc/64s: Enable barrier_nospec based on firmware settings powerpc: Use barrier_nospec in copy_from_user() powerpc/64: Use barrier_nospec in syscall entry powerpc/64s: Enhance the information in cpu_show_spectre_v1() powerpc64s: Show ori31 availability in spectre_v1 sysfs file not v2 powerpc/64: Disable the speculation barrier from the command line powerpc/64: Make stf barrier PPC_BOOK3S_64 specific. powerpc/64: Add CONFIG_PPC_BARRIER_NOSPEC powerpc/64: Call setup_barrier_nospec() from setup_arch() powerpc/64: Make meltdown reporting Book3S 64 specific powerpc/fsl: Add barrier_nospec implementation for NXP PowerPC Book3E powerpc/fsl: Sanitize the syscall table for NXP PowerPC 32 bit platforms powerpc/asm: Add a patch_site macro & helpers for patching instructions powerpc/64s: Add new security feature flags for count cache flush powerpc/64s: Add support for software count cache flush powerpc/pseries: Query hypervisor for count cache flush settings powerpc/powernv: Query firmware for count cache flush settings powerpc/fsl: Add infrastructure to fixup branch predictor flush powerpc/fsl: Add macro to flush the branch predictor powerpc/fsl: Fix spectre_v2 mitigations reporting powerpc/fsl: Emulate SPRN_BUCSR register powerpc/fsl: Add nospectre_v2 command line argument powerpc/fsl: Flush the branch predictor at each kernel entry (64bit) powerpc/fsl: Flush the branch predictor at each kernel entry (32 bit) powerpc/fsl: Flush branch predictor when entering KVM powerpc/fsl: Enable runtime patching if nospectre_v2 boot arg is used powerpc/fsl: Update Spectre v2 reporting powerpc/fsl: Fixed warning: orphan section `__btb_flush_fixup' powerpc/fsl: Fix the flush of branch predictor. powerpc/security: Fix spectre_v2 reporting arm64: kaslr: Reserve size of ARM64_MEMSTART_ALIGN in linear region tty: mark Siemens R3964 line discipline as BROKEN tty: ldisc: add sysctl to prevent autoloading of ldiscs ipv6: Fix dangling pointer when ipv6 fragment ipv6: sit: reset ip header pointer in ipip6_rcv kcm: switch order of device registration to fix a crash net: rds: force to destroy connection if t_sock is NULL in rds_tcp_kill_sock(). openvswitch: fix flow actions reallocation qmi_wwan: add Olicard 600 sctp: initialize _pad of sockaddr_in before copying to user memory tcp: Ensure DCTCP reacts to losses vrf: check accept_source_route on the original netdevice bnxt_en: Reset device on RX buffer errors. bnxt_en: Improve RX consumer index validity check. net/mlx5e: Add a lock on tir list netns: provide pure entropy for net_hash_mix() net: ethtool: not call vzalloc for zero sized memory request ip6_tunnel: Match to ARPHRD_TUNNEL6 for dev type ALSA: seq: Fix OOB-reads from strlcpy parisc: Detect QEMU earlier in boot process include/linux/bitrev.h: fix constant bitrev ASoC: fsl_esai: fix channel swap issue when stream starts Btrfs: do not allow trimming when a fs is mounted with the nologreplay option block: do not leak memory in bio_copy_user_iov() genirq: Respect IRQCHIP_SKIP_SET_WAKE in irq_chip_set_wake_parent() virtio: Honour 'may_reduce_num' in vring_create_virtqueue ARM: dts: at91: Fix typo in ISC_D0 on PC9 arm64: futex: Fix FUTEX_WAKE_OP atomic ops with non-zero result value parisc: Use cr16 interval timers unconditionally on qemu xen: Prevent buffer overflow in privcmd ioctl sched/fair: Do not re-read ->h_load_next during hierarchical load calculation xtensa: fix return_address PCI: Add function 1 DMA alias quirk for Marvell 9170 SATA controller Linux 4.9.169 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
169 lines
3.5 KiB
ArmAsm
169 lines
3.5 KiB
ArmAsm
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright (C) IBM Corporation, 2012
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*
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* Author: Anton Blanchard <anton@au.ibm.com>
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*/
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#include <asm/page.h>
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#include <asm/ppc_asm.h>
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_GLOBAL(copypage_power7)
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/*
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* We prefetch both the source and destination using enhanced touch
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* instructions. We use a stream ID of 0 for the load side and
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* 1 for the store side. Since source and destination are page
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* aligned we don't need to clear the bottom 7 bits of either
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* address.
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*/
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ori r9,r3,1 /* stream=1 => to */
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#ifdef CONFIG_PPC_64K_PAGES
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lis r7,0x0E01 /* depth=7
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* units/cachelines=512 */
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#else
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lis r7,0x0E00 /* depth=7 */
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ori r7,r7,0x1000 /* units/cachelines=32 */
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#endif
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ori r10,r7,1 /* stream=1 */
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lis r8,0x8000 /* GO=1 */
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clrldi r8,r8,32
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.machine push
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.machine "power4"
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/* setup read stream 0 */
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dcbt 0,r4,0b01000 /* addr from */
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dcbt 0,r7,0b01010 /* length and depth from */
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/* setup write stream 1 */
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dcbtst 0,r9,0b01000 /* addr to */
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dcbtst 0,r10,0b01010 /* length and depth to */
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eieio
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dcbt 0,r8,0b01010 /* all streams GO */
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.machine pop
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#ifdef CONFIG_ALTIVEC
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mflr r0
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std r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
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std r4,-STACKFRAMESIZE+STK_REG(R30)(r1)
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std r0,16(r1)
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stdu r1,-STACKFRAMESIZE(r1)
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bl enter_vmx_copy
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cmpwi r3,0
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ld r0,STACKFRAMESIZE+16(r1)
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ld r3,STK_REG(R31)(r1)
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ld r4,STK_REG(R30)(r1)
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mtlr r0
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li r0,(PAGE_SIZE/128)
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mtctr r0
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beq .Lnonvmx_copy
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addi r1,r1,STACKFRAMESIZE
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li r6,16
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li r7,32
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li r8,48
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li r9,64
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li r10,80
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li r11,96
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li r12,112
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.align 5
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1: lvx v7,0,r4
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lvx v6,r4,r6
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lvx v5,r4,r7
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lvx v4,r4,r8
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lvx v3,r4,r9
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lvx v2,r4,r10
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lvx v1,r4,r11
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lvx v0,r4,r12
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addi r4,r4,128
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stvx v7,0,r3
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stvx v6,r3,r6
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stvx v5,r3,r7
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stvx v4,r3,r8
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stvx v3,r3,r9
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stvx v2,r3,r10
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stvx v1,r3,r11
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stvx v0,r3,r12
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addi r3,r3,128
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bdnz 1b
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b exit_vmx_copy /* tail call optimise */
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#else
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li r0,(PAGE_SIZE/128)
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mtctr r0
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stdu r1,-STACKFRAMESIZE(r1)
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#endif
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.Lnonvmx_copy:
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std r14,STK_REG(R14)(r1)
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std r15,STK_REG(R15)(r1)
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std r16,STK_REG(R16)(r1)
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std r17,STK_REG(R17)(r1)
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std r18,STK_REG(R18)(r1)
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std r19,STK_REG(R19)(r1)
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std r20,STK_REG(R20)(r1)
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1: ld r0,0(r4)
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ld r5,8(r4)
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ld r6,16(r4)
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ld r7,24(r4)
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ld r8,32(r4)
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ld r9,40(r4)
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ld r10,48(r4)
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ld r11,56(r4)
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ld r12,64(r4)
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ld r14,72(r4)
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ld r15,80(r4)
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ld r16,88(r4)
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ld r17,96(r4)
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ld r18,104(r4)
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ld r19,112(r4)
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ld r20,120(r4)
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addi r4,r4,128
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std r0,0(r3)
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std r5,8(r3)
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std r6,16(r3)
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std r7,24(r3)
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std r8,32(r3)
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std r9,40(r3)
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std r10,48(r3)
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std r11,56(r3)
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std r12,64(r3)
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std r14,72(r3)
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std r15,80(r3)
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std r16,88(r3)
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std r17,96(r3)
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std r18,104(r3)
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std r19,112(r3)
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std r20,120(r3)
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addi r3,r3,128
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bdnz 1b
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ld r14,STK_REG(R14)(r1)
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ld r15,STK_REG(R15)(r1)
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ld r16,STK_REG(R16)(r1)
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ld r17,STK_REG(R17)(r1)
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ld r18,STK_REG(R18)(r1)
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ld r19,STK_REG(R19)(r1)
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ld r20,STK_REG(R20)(r1)
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addi r1,r1,STACKFRAMESIZE
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blr
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