e986e9737d
Changes in 4.9.245 powerpc/64s: Define MASKABLE_RELON_EXCEPTION_PSERIES_OOL powerpc/64s: move some exception handlers out of line powerpc/64s: flush L1D on kernel entry powerpc: Add a framework for user access tracking powerpc: Implement user_access_begin and friends powerpc: Fix __clear_user() with KUAP enabled powerpc/uaccess: Evaluate macro arguments once, before user access is allowed powerpc/64s: flush L1D after user accesses i2c: imx: use clk notifier for rate changes i2c: imx: Fix external abort on interrupt in exit paths i2c: mux: pca954x: Add missing pca9546 definition to chip_desc powerpc/8xx: Always fault when _PAGE_ACCESSED is not set Input: sunkbd - avoid use-after-free in teardown paths mac80211: always wind down STA state KVM: x86: clflushopt should be treated as a no-op by emulation ACPI: GED: fix -Wformat Linux 4.9.245 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I688b066e99eeb16270414e0c4cb4dc3bb244486c
109 lines
2.5 KiB
C
109 lines
2.5 KiB
C
#ifndef _ASM_POWERPC_FUTEX_H
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#define _ASM_POWERPC_FUTEX_H
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#ifdef __KERNEL__
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#include <linux/futex.h>
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#include <linux/uaccess.h>
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#include <asm/errno.h>
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#include <asm/synch.h>
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#include <asm/asm-compat.h>
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#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
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__asm__ __volatile ( \
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PPC_ATOMIC_ENTRY_BARRIER \
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"1: lwarx %0,0,%2\n" \
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insn \
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PPC405_ERR77(0, %2) \
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"2: stwcx. %1,0,%2\n" \
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"bne- 1b\n" \
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PPC_ATOMIC_EXIT_BARRIER \
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"li %1,0\n" \
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"3: .section .fixup,\"ax\"\n" \
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"4: li %1,%3\n" \
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"b 3b\n" \
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".previous\n" \
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".section __ex_table,\"a\"\n" \
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".align 3\n" \
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PPC_LONG "1b,4b,2b,4b\n" \
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".previous" \
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: "=&r" (oldval), "=&r" (ret) \
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: "b" (uaddr), "i" (-EFAULT), "r" (oparg) \
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: "cr0", "memory")
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static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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u32 __user *uaddr)
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{
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int oldval = 0, ret;
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allow_write_to_user(uaddr, sizeof(*uaddr));
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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__futex_atomic_op("mr %1,%4\n", ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_ADD:
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__futex_atomic_op("add %1,%0,%4\n", ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_OR:
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__futex_atomic_op("or %1,%0,%4\n", ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_ANDN:
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__futex_atomic_op("andc %1,%0,%4\n", ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_XOR:
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__futex_atomic_op("xor %1,%0,%4\n", ret, oldval, uaddr, oparg);
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break;
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default:
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ret = -ENOSYS;
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}
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pagefault_enable();
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*oval = oldval;
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prevent_write_to_user(uaddr, sizeof(*uaddr));
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return ret;
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}
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static inline int
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futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
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u32 oldval, u32 newval)
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{
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int ret = 0;
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u32 prev;
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
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return -EFAULT;
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allow_write_to_user(uaddr, sizeof(*uaddr));
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__asm__ __volatile__ (
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PPC_ATOMIC_ENTRY_BARRIER
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"1: lwarx %1,0,%3 # futex_atomic_cmpxchg_inatomic\n\
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cmpw 0,%1,%4\n\
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bne- 3f\n"
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PPC405_ERR77(0,%3)
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"2: stwcx. %5,0,%3\n\
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bne- 1b\n"
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PPC_ATOMIC_EXIT_BARRIER
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"3: .section .fixup,\"ax\"\n\
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4: li %0,%6\n\
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b 3b\n\
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.previous\n\
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.section __ex_table,\"a\"\n\
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.align 3\n\
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" PPC_LONG "1b,4b,2b,4b\n\
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.previous" \
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: "+r" (ret), "=&r" (prev), "+m" (*uaddr)
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: "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT)
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: "cc", "memory");
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*uval = prev;
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prevent_write_to_user(uaddr, sizeof(*uaddr));
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return ret;
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_FUTEX_H */
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