109 lines
3.0 KiB
C
109 lines
3.0 KiB
C
/**************************************************************************
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*
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* BRIEF MODULE DESCRIPTION
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* board setup for Ralink RT2880 solution
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*
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* Copyright 2007 Ralink Inc. (bruce_chang@ralinktech.com.tw)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*
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**************************************************************************
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* May 2007 Bruce Chang
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*
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* Initial Release
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*
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*
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*
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**************************************************************************
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*/
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#include <linux/init.h>
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#include <linux/string.h>
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#include <linux/ioport.h>
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#include <asm/cpu.h>
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#include <asm/cpu-info.h>
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#include <asm/bootinfo.h>
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#ifdef CONFIG_DMA_MAYBE_COHERENT
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#include <asm/mips-cm.h>
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#include <asm/dma-coherence.h>
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#endif
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#include <asm/rt2880/prom.h>
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extern void mips_reboot_setup(void);
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const char *get_system_type(void)
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{
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#if defined(CONFIG_RALINK_MT7621)
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return "MediaTek MT7621 SoC";
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#elif defined(CONFIG_RALINK_MT7628)
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return "MediaTek MT7628 SoC";
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#else
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return "MediaTek SoC";
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#endif
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}
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#ifdef CONFIG_DMA_MAYBE_COHERENT
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static inline int plat_enable_iocoherency(void)
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{
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int supported = 0;
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if (mips_cm_numiocu()) {
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pr_info("GCMP IOCU detected\n");
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#if defined(CONFIG_RALINK_MT7621)
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/* MT7621 GCMP reported about IOCU=1, but IOCU switch disabled by default */
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// supported = 1;
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#endif
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}
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return supported;
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}
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static void __init plat_setup_iocoherency(void)
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{
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/*
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* Kernel has been configured with software coherency
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* but we might choose to turn it off and use hardware
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* coherency instead.
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*/
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if (plat_enable_iocoherency()) {
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coherentio = 1;
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hw_coherentio = 1;
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pr_info("Hardware DMA cache coherency enabled\n");
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}
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}
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#endif
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void __init plat_mem_setup(void)
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{
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iomem_resource.start = 0;
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iomem_resource.end = ~0;
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ioport_resource.start = 0;
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ioport_resource.end = 0x1fffffff;
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#ifdef CONFIG_DMA_MAYBE_COHERENT
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plat_setup_iocoherency();
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#endif
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mips_reboot_setup();
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}
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