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kernel-49/arch/mips/bcm63xx/prom.c
Greg Kroah-Hartman 493953d36f Merge 4.9.200 into android-4.9-q
Changes in 4.9.200
	regulator: ti-abb: Fix timeout in ti_abb_wait_txdone/ti_abb_clear_all_txdone
	regulator: pfuze100-regulator: Variable "val" in pfuze100_regulator_probe() could be uninitialized
	ASoC: wm_adsp: Don't generate kcontrols without READ flags
	ASoc: rockchip: i2s: Fix RPM imbalance
	ARM: dts: logicpd-torpedo-som: Remove twl_keypad
	pinctrl: ns2: Fix off by one bugs in ns2_pinmux_enable()
	ARM: mm: fix alignment handler faults under memory pressure
	scsi: scsi_dh_alua: handle RTPG sense code correctly during state transitions
	scsi: sni_53c710: fix compilation error
	scsi: fix kconfig dependency warning related to 53C700_LE_ON_BE
	ARM: dts: imx7s: Correct GPT's ipg clock source
	perf kmem: Fix memory leak in compact_gfp_flags()
	ARM: davinci: dm365: Fix McBSP dma_slave_map entry
	scsi: target: core: Do not overwrite CDB byte 1
	of: unittest: fix memory leak in unittest_data_add
	MIPS: bmips: mark exception vectors as char arrays
	cifs: Fix cifsInodeInfo lock_sem deadlock when reconnect occurs
	dccp: do not leak jiffies on the wire
	net: fix sk_page_frag() recursion from memory reclaim
	net: hisilicon: Fix ping latency when deal with high throughput
	net: Zeroing the structure ethtool_wolinfo in ethtool_get_wol()
	selftests: net: reuseport_dualstack: fix uninitalized parameter
	net: add READ_ONCE() annotation in __skb_wait_for_more_packets()
	net: dsa: fix switch tree list
	net: bcmgenet: reset 40nm EPHY on energy detect
	vxlan: check tun_info options_len properly
	net/mlx4_core: Dynamically set guaranteed amount of counters per VF
	inet: stop leaking jiffies on the wire
	Kbuild: make designated_init attribute fatal
	kbuild: use -fmacro-prefix-map to make __FILE__ a relative path
	kbuild: add -fcf-protection=none when using retpoline flags
	net/flow_dissector: switch to siphash
	dmaengine: qcom: bam_dma: Fix resource leak
	alarmtimer: Change remaining ENOTSUPP to EOPNOTSUPP
	Linux 4.9.200

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
2019-11-12 21:32:00 +03:00

101 lines
2.5 KiB
C

/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
*/
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/smp.h>
#include <asm/bootinfo.h>
#include <asm/bmips.h>
#include <asm/smp-ops.h>
#include <asm/mipsregs.h>
#include <bcm63xx_board.h>
#include <bcm63xx_cpu.h>
#include <bcm63xx_io.h>
#include <bcm63xx_regs.h>
void __init prom_init(void)
{
u32 reg, mask;
bcm63xx_cpu_init();
/* stop any running watchdog */
bcm_wdt_writel(WDT_STOP_1, WDT_CTL_REG);
bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG);
/* disable all hardware blocks clock for now */
if (BCMCPU_IS_3368())
mask = CKCTL_3368_ALL_SAFE_EN;
else if (BCMCPU_IS_6328())
mask = CKCTL_6328_ALL_SAFE_EN;
else if (BCMCPU_IS_6338())
mask = CKCTL_6338_ALL_SAFE_EN;
else if (BCMCPU_IS_6345())
mask = CKCTL_6345_ALL_SAFE_EN;
else if (BCMCPU_IS_6348())
mask = CKCTL_6348_ALL_SAFE_EN;
else if (BCMCPU_IS_6358())
mask = CKCTL_6358_ALL_SAFE_EN;
else if (BCMCPU_IS_6362())
mask = CKCTL_6362_ALL_SAFE_EN;
else if (BCMCPU_IS_6368())
mask = CKCTL_6368_ALL_SAFE_EN;
else
mask = 0;
reg = bcm_perf_readl(PERF_CKCTL_REG);
reg &= ~mask;
bcm_perf_writel(reg, PERF_CKCTL_REG);
/* do low level board init */
board_prom_init();
/* set up SMP */
if (!register_bmips_smp_ops()) {
/*
* BCM6328 might not have its second CPU enabled, while BCM3368
* and BCM6358 need special handling for their shared TLB, so
* disable SMP for now.
*/
if (BCMCPU_IS_6328()) {
reg = bcm_readl(BCM_6328_OTP_BASE +
OTP_USER_BITS_6328_REG(3));
if (reg & OTP_6328_REG3_TP1_DISABLED)
bmips_smp_enabled = 0;
} else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
bmips_smp_enabled = 0;
}
if (!bmips_smp_enabled)
return;
/*
* The bootloader has set up the CPU1 reset vector at
* 0xa000_0200.
* This conflicts with the special interrupt vector (IV).
* The bootloader has also set up CPU1 to respond to the wrong
* IPI interrupt.
* Here we will start up CPU1 in the background and ask it to
* reconfigure itself then go back to sleep.
*/
memcpy((void *)0xa0000200, bmips_smp_movevec, 0x20);
__sync();
set_c0_cause(C_SW0);
cpumask_set_cpu(1, &bmips_booted_mask);
/*
* FIXME: we really should have some sort of hazard barrier here
*/
}
}
void __init prom_free_prom_memory(void)
{
}