43e137091b
Changes in 4.9.310 arm64: errata: Provide macro for major and minor cpu revisions arm64: Remove useless UAO IPI and describe how this gets enabled arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35 arm64: capabilities: Update prototype for enable call back arm64: capabilities: Move errata work around check on boot CPU arm64: capabilities: Move errata processing code arm64: capabilities: Prepare for fine grained capabilities arm64: capabilities: Add flags to handle the conflicts on late CPU arm64: capabilities: Clean up midr range helpers arm64: Add helpers for checking CPU MIDR against a range arm64: capabilities: Add support for checks based on a list of MIDRs clocksource/drivers/arm_arch_timer: Remove fsl-a008585 parameter clocksource/drivers/arm_arch_timer: Introduce generic errata handling infrastructure arm64: arch_timer: Add infrastructure for multiple erratum detection methods arm64: arch_timer: Add erratum handler for CPU-specific capability arm64: arch_timer: Add workaround for ARM erratum 1188873 arm64: arch_timer: avoid unused function warning arm64: Add silicon-errata.txt entry for ARM erratum 1188873 arm64: Make ARM64_ERRATUM_1188873 depend on COMPAT arm64: Add part number for Neoverse N1 arm64: Add part number for Arm Cortex-A77 arm64: Add Neoverse-N2, Cortex-A710 CPU part definition arm64: Add Cortex-X2 CPU part definition arm64: Add helper to decode register from instruction arm64: entry.S: Add ventry overflow sanity checks arm64: entry: Make the trampoline cleanup optional arm64: entry: Free up another register on kpti's tramp_exit path arm64: entry: Move the trampoline data page before the text page arm64: entry: Allow tramp_alias to access symbols after the 4K boundary arm64: entry: Don't assume tramp_vectors is the start of the vectors arm64: entry: Move trampoline macros out of ifdef'd section arm64: entry: Make the kpti trampoline's kpti sequence optional arm64: entry: Allow the trampoline text to occupy multiple pages arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations arm64: Move arm64_update_smccc_conduit() out of SSBD ifdef arm64: entry: Add vectors that have the bhb mitigation sequences arm64: entry: Add macro for reading symbol addresses from the trampoline arm64: Add percpu vectors for EL1 KVM: arm64: Add templates for BHB mitigation sequences arm64: Mitigate spectre style branch history side channels KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated arm64: add ID_AA64ISAR2_EL1 sys register arm64: Use the clearbhb instruction in mitigations Linux 4.9.310 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I689d7634aebe9d9ffba8d72d1d76bb237ca228a4
105 lines
2.8 KiB
C
105 lines
2.8 KiB
C
/*
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* fixmap.h: compile-time virtual memory allocation
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1998 Ingo Molnar
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* Copyright (C) 2013 Mark Salter <msalter@redhat.com>
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*
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* Adapted from arch/x86 version.
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*
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*/
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#ifndef _ASM_ARM64_FIXMAP_H
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#define _ASM_ARM64_FIXMAP_H
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#ifndef __ASSEMBLY__
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#include <linux/kernel.h>
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#include <linux/sizes.h>
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#include <asm/boot.h>
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#include <asm/page.h>
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#include <asm/pgtable-prot.h>
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/*
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* Here we define all the compile-time 'special' virtual
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* addresses. The point is to have a constant address at
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* compile time, but to set the physical address only
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* in the boot process.
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*
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* These 'compile-time allocated' memory buffers are
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* page-sized. Use set_fixmap(idx,phys) to associate
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* physical memory with fixmap indices.
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*
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*/
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enum fixed_addresses {
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FIX_HOLE,
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/*
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* Reserve a virtual window for the FDT that is 2 MB larger than the
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* maximum supported size, and put it at the top of the fixmap region.
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* The additional space ensures that any FDT that does not exceed
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* MAX_FDT_SIZE can be mapped regardless of whether it crosses any
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* 2 MB alignment boundaries.
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*
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* Keep this at the top so it remains 2 MB aligned.
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*/
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#define FIX_FDT_SIZE (MAX_FDT_SIZE + SZ_2M)
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FIX_FDT_END,
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FIX_FDT = FIX_FDT_END + FIX_FDT_SIZE / PAGE_SIZE - 1,
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FIX_EARLYCON_MEM_BASE,
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FIX_TEXT_POKE0,
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#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
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FIX_ENTRY_TRAMP_TEXT3,
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FIX_ENTRY_TRAMP_TEXT2,
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FIX_ENTRY_TRAMP_TEXT1,
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FIX_ENTRY_TRAMP_DATA,
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#define TRAMP_VALIAS (__fix_to_virt(FIX_ENTRY_TRAMP_TEXT1))
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#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
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__end_of_permanent_fixed_addresses,
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/*
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* Temporary boot-time mappings, used by early_ioremap(),
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* before ioremap() is functional.
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*/
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#define NR_FIX_BTMAPS (SZ_256K / PAGE_SIZE)
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#define FIX_BTMAPS_SLOTS 7
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#define TOTAL_FIX_BTMAPS (NR_FIX_BTMAPS * FIX_BTMAPS_SLOTS)
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FIX_BTMAP_END = __end_of_permanent_fixed_addresses,
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FIX_BTMAP_BEGIN = FIX_BTMAP_END + TOTAL_FIX_BTMAPS - 1,
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/*
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* Used for kernel page table creation, so unmapped memory may be used
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* for tables.
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*/
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FIX_PTE,
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FIX_PMD,
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FIX_PUD,
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FIX_PGD,
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__end_of_fixed_addresses
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};
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#define FIXADDR_SIZE (__end_of_permanent_fixed_addresses << PAGE_SHIFT)
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#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
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#define FIXMAP_PAGE_IO __pgprot(PROT_DEVICE_nGnRE)
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void __init early_fixmap_init(void);
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#define __early_set_fixmap __set_fixmap
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#define __late_set_fixmap __set_fixmap
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#define __late_clear_fixmap(idx) __set_fixmap((idx), 0, FIXMAP_PAGE_CLEAR)
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extern void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot);
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#include <asm-generic/fixmap.h>
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_ARM64_FIXMAP_H */
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