224eb4208b
Changes in 4.9.161
mac80211: Free mpath object when rhashtable insertion fails
libceph: handle an empty authorize reply
ceph: avoid repeatedly adding inode to mdsc->snap_flush_list
numa: change get_mempolicy() to use nr_node_ids instead of MAX_NUMNODES
proc, oom: do not report alien mms when setting oom_score_adj
KEYS: allow reaching the keys quotas exactly
mfd: ti_am335x_tscadc: Use PLATFORM_DEVID_AUTO while registering mfd cells
mfd: twl-core: Fix section annotations on {,un}protect_pm_master
mfd: db8500-prcmu: Fix some section annotations
mfd: mt6397: Do not call irq_domain_remove if PMIC unsupported
mfd: ab8500-core: Return zero in get_register_interruptible()
mfd: qcom_rpm: write fw_version to CTRL_REG
mfd: wm5110: Add missing ASRC rate register
mfd: mc13xxx: Fix a missing check of a register-read failure
qed: Fix qed_ll2_post_rx_buffer_notify_fw() by adding a write memory barrier
net: hns: Fix use after free identified by SLUB debug
MIPS: ath79: Enable OF serial ports in the default config
scsi: qla4xxx: check return code of qla4xxx_copy_from_fwddb_param
scsi: isci: initialize shost fully before calling scsi_add_host()
MIPS: jazz: fix 64bit build
net: stmmac: Fix PCI module removal leak
isdn: i4l: isdn_tty: Fix some concurrency double-free bugs
atm: he: fix sign-extension overflow on large shift
leds: lp5523: fix a missing check of return value of lp55xx_read
mlxsw: spectrum_switchdev: Do not treat static FDB entries as sticky
net/mlx5e: Fix wrong (zero) TX drop counter indication for representor
isdn: avm: Fix string plus integer warning from Clang
net: ethernet: stmmac: change dma descriptors to __le32
RDMA/srp: Rework SCSI device reset handling
KEYS: user: Align the payload buffer
KEYS: always initialize keyring_index_key::desc_len
batman-adv: fix uninit-value in batadv_interface_tx()
net/packet: fix 4gb buffer limit due to overflow check
team: avoid complex list operations in team_nl_cmd_options_set()
sit: check if IPv6 enabled before calling ip6_err_gen_icmpv6_unreach()
sctp: call gso_reset_checksum when computing checksum in sctp_gso_segment
net/mlx4_en: Force CHECKSUM_NONE for short ethernet frames
parisc: Fix ptrace syscall number modification
ARCv2: Enable unaligned access in early ASM code
ARC: U-boot: check arguments paranoidly
ARC: define ARCH_SLAB_MINALIGN = 8
hpet: Make cmd parameter of hpet_ioctl_common() unsigned
clocksource: Use GENMASK_ULL in definition of CLOCKSOURCE_MASK
netpoll: Fix device name check in netpoll_setup()
tracing: Use cpumask_available() to check if cpumask variable may be used
x86/boot: Disable the address-of-packed-member compiler warning
drm/i915: Consistently use enum pipe for PCH transcoders
drm/i915: Fix enum pipe vs. enum transcoder for the PCH transcoder
kbuild: move cc-option and cc-disable-warning after incl. arch Makefile
kbuild: clang: fix build failures with sparse check
kbuild: clang: remove crufty HOSTCFLAGS
kbuild: clang: disable unused variable warnings only when constant
kbuild: set no-integrated-as before incl. arch Makefile
kbuild: add -no-integrated-as Clang option unconditionally
irqchip/gic-v3: Convert arm64 GIC accessors to {read,write}_sysreg_s
mm/zsmalloc.c: change stat type parameter to int
mm/zsmalloc.c: fix -Wunneeded-internal-declaration warning
Revert "bridge: do not add port to router list when receives query with source 0.0.0.0"
netfilter: nf_tables: fix flush after rule deletion in the same batch
pinctrl: max77620: Use define directive for max77620_pinconf_param values
phy: tegra: remove redundant self assignment of 'map'
sched/sysctl: Fix attributes of some extern declarations
kbuild: consolidate Clang compiler flags
Linux 4.9.161
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
181 lines
4.4 KiB
C
181 lines
4.4 KiB
C
/*
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* arch/arm64/include/asm/arch_gicv3.h
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*
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* Copyright (C) 2015 ARM Ltd.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_ARCH_GICV3_H
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#define __ASM_ARCH_GICV3_H
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#include <asm/sysreg.h>
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#define ICC_EOIR1_EL1 sys_reg(3, 0, 12, 12, 1)
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#define ICC_DIR_EL1 sys_reg(3, 0, 12, 11, 1)
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#define ICC_IAR1_EL1 sys_reg(3, 0, 12, 12, 0)
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#define ICC_SGI1R_EL1 sys_reg(3, 0, 12, 11, 5)
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#define ICC_PMR_EL1 sys_reg(3, 0, 4, 6, 0)
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#define ICC_CTLR_EL1 sys_reg(3, 0, 12, 12, 4)
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#define ICC_SRE_EL1 sys_reg(3, 0, 12, 12, 5)
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#define ICC_GRPEN1_EL1 sys_reg(3, 0, 12, 12, 7)
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#define ICC_BPR1_EL1 sys_reg(3, 0, 12, 12, 3)
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#define ICC_SRE_EL2 sys_reg(3, 4, 12, 9, 5)
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/*
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* System register definitions
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*/
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#define ICH_VSEIR_EL2 sys_reg(3, 4, 12, 9, 4)
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#define ICH_HCR_EL2 sys_reg(3, 4, 12, 11, 0)
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#define ICH_VTR_EL2 sys_reg(3, 4, 12, 11, 1)
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#define ICH_MISR_EL2 sys_reg(3, 4, 12, 11, 2)
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#define ICH_EISR_EL2 sys_reg(3, 4, 12, 11, 3)
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#define ICH_ELSR_EL2 sys_reg(3, 4, 12, 11, 5)
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#define ICH_VMCR_EL2 sys_reg(3, 4, 12, 11, 7)
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#define __LR0_EL2(x) sys_reg(3, 4, 12, 12, x)
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#define __LR8_EL2(x) sys_reg(3, 4, 12, 13, x)
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#define ICH_LR0_EL2 __LR0_EL2(0)
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#define ICH_LR1_EL2 __LR0_EL2(1)
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#define ICH_LR2_EL2 __LR0_EL2(2)
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#define ICH_LR3_EL2 __LR0_EL2(3)
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#define ICH_LR4_EL2 __LR0_EL2(4)
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#define ICH_LR5_EL2 __LR0_EL2(5)
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#define ICH_LR6_EL2 __LR0_EL2(6)
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#define ICH_LR7_EL2 __LR0_EL2(7)
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#define ICH_LR8_EL2 __LR8_EL2(0)
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#define ICH_LR9_EL2 __LR8_EL2(1)
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#define ICH_LR10_EL2 __LR8_EL2(2)
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#define ICH_LR11_EL2 __LR8_EL2(3)
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#define ICH_LR12_EL2 __LR8_EL2(4)
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#define ICH_LR13_EL2 __LR8_EL2(5)
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#define ICH_LR14_EL2 __LR8_EL2(6)
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#define ICH_LR15_EL2 __LR8_EL2(7)
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#define __AP0Rx_EL2(x) sys_reg(3, 4, 12, 8, x)
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#define ICH_AP0R0_EL2 __AP0Rx_EL2(0)
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#define ICH_AP0R1_EL2 __AP0Rx_EL2(1)
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#define ICH_AP0R2_EL2 __AP0Rx_EL2(2)
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#define ICH_AP0R3_EL2 __AP0Rx_EL2(3)
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#define __AP1Rx_EL2(x) sys_reg(3, 4, 12, 9, x)
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#define ICH_AP1R0_EL2 __AP1Rx_EL2(0)
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#define ICH_AP1R1_EL2 __AP1Rx_EL2(1)
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#define ICH_AP1R2_EL2 __AP1Rx_EL2(2)
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#define ICH_AP1R3_EL2 __AP1Rx_EL2(3)
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#ifndef __ASSEMBLY__
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#include <linux/stringify.h>
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#include <asm/barrier.h>
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#define read_gicreg read_sysreg_s
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#define write_gicreg write_sysreg_s
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/*
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* Low-level accessors
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*
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* These system registers are 32 bits, but we make sure that the compiler
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* sets the GP register's most significant bits to 0 with an explicit cast.
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*/
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static inline void gic_write_eoir(u32 irq)
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{
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write_sysreg_s(irq, ICC_EOIR1_EL1);
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isb();
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}
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static inline void gic_write_dir(u32 irq)
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{
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write_sysreg_s(irq, ICC_DIR_EL1);
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isb();
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}
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static inline u64 gic_read_iar_common(void)
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{
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u64 irqstat;
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irqstat = read_sysreg_s(ICC_IAR1_EL1);
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dsb(sy);
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return irqstat;
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}
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/*
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* Cavium ThunderX erratum 23154
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*
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* The gicv3 of ThunderX requires a modified version for reading the
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* IAR status to ensure data synchronization (access to icc_iar1_el1
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* is not sync'ed before and after).
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*/
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static inline u64 gic_read_iar_cavium_thunderx(void)
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{
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u64 irqstat;
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asm volatile(
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"nop;nop;nop;nop\n\t"
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"nop;nop;nop;nop");
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irqstat = read_sysreg_s(ICC_IAR1_EL1);
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asm volatile(
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"nop;nop;nop;nop");
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mb();
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return irqstat;
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}
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static inline void gic_write_pmr(u32 val)
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{
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write_sysreg_s(val, ICC_PMR_EL1);
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}
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static inline void gic_write_ctlr(u32 val)
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{
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write_sysreg_s(val, ICC_CTLR_EL1);
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isb();
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}
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static inline void gic_write_grpen1(u32 val)
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{
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write_sysreg_s(val, ICC_GRPEN1_EL1);
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isb();
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}
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static inline void gic_write_sgi1r(u64 val)
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{
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write_sysreg_s(val, ICC_SGI1R_EL1);
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}
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static inline u32 gic_read_sre(void)
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{
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return read_sysreg_s(ICC_SRE_EL1);
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}
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static inline void gic_write_sre(u32 val)
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{
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write_sysreg_s(val, ICC_SRE_EL1);
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isb();
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}
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static inline void gic_write_bpr1(u32 val)
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{
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write_sysreg_s(val, ICC_BPR1_EL1);
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}
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#define gic_read_typer(c) readq_relaxed(c)
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#define gic_write_irouter(v, c) writeq_relaxed(v, c)
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_ARCH_GICV3_H */
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