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Greg Kroah-Hartman 6eb893ee9b Merge 4.9.139 into android-4.9
Changes in 4.9.139
	flow_dissector: do not dissect l4 ports for fragments
	ip_tunnel: don't force DF when MTU is locked
	net-gro: reset skb->pkt_type in napi_reuse_skb()
	sctp: not allow to set asoc prsctp_enable by sockopt
	tg3: Add PHY reset for 5717/5719/5720 in change ring and flow control paths
	usbnet: smsc95xx: disable carrier check while suspending
	inet: frags: better deal with smp races
	ipv6: Fix PMTU updates for UDP/raw sockets in presence of VRF
	kbuild: Add better clang cross build support
	kbuild: clang: add -no-integrated-as to KBUILD_[AC]FLAGS
	kbuild: Consolidate header generation from ASM offset information
	kbuild: consolidate redundant sed script ASM offset generation
	kbuild: fix asm-offset generation to work with clang
	kbuild: drop -Wno-unknown-warning-option from clang options
	kbuild, LLVMLinux: Add -Werror to cc-option to support clang
	kbuild: use -Oz instead of -Os when using clang
	kbuild: Add support to generate LLVM assembly files
	modules: mark __inittest/__exittest as __maybe_unused
	x86/kbuild: Use cc-option to enable -falign-{jumps/loops}
	crypto, x86: aesni - fix token pasting for clang
	kbuild: Add __cc-option macro
	x86/build: Use __cc-option for boot code compiler options
	x86/build: Specify stack alignment for clang
	kbuild: clang: Disable 'address-of-packed-member' warning
	crypto: arm64/sha - avoid non-standard inline asm tricks
	x86/boot: #undef memcpy() et al in string.c
	efi/libstub/arm64: Use hidden attribute for struct screen_info reference
	efi/libstub/arm64: Force 'hidden' visibility for section markers
	efi/libstub: Preserve .debug sections after absolute relocation check
	efi/libstub/arm64: Set -fpie when building the EFI stub
	x86/build: Fix stack alignment for CLang
	x86/build: Use cc-option to validate stack alignment parameter
	Kbuild: use -fshort-wchar globally
	arm64: uaccess: suppress spurious clang warning
	ARM: add more CPU part numbers for Cortex and Brahma B15 CPUs
	ARM: bugs: prepare processor bug infrastructure
	ARM: bugs: hook processor bug checking into SMP and suspend paths
	ARM: bugs: add support for per-processor bug checking
	ARM: spectre: add Kconfig symbol for CPUs vulnerable to Spectre
	ARM: spectre-v2: harden branch predictor on context switches
	ARM: spectre-v2: add Cortex A8 and A15 validation of the IBE bit
	ARM: spectre-v2: harden user aborts in kernel space
	ARM: spectre-v2: add firmware based hardening
	ARM: spectre-v2: warn about incorrect context switching functions
	ARM: KVM: invalidate BTB on guest exit for Cortex-A12/A17
	ARM: KVM: invalidate icache on guest exit for Cortex-A15
	ARM: spectre-v2: KVM: invalidate icache on guest exit for Brahma B15
	ARM: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling
	ARM: KVM: report support for SMCCC_ARCH_WORKAROUND_1
	ARM: spectre-v1: add speculation barrier (csdb) macros
	ARM: spectre-v1: add array_index_mask_nospec() implementation
	ARM: spectre-v1: fix syscall entry
	ARM: signal: copy registers using __copy_from_user()
	ARM: vfp: use __copy_from_user() when restoring VFP state
	ARM: oabi-compat: copy semops using __copy_from_user()
	ARM: use __inttype() in get_user()
	ARM: spectre-v1: use get_user() for __get_user()
	ARM: spectre-v1: mitigate user accesses
	Linux 4.9.139

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
2019-02-11 22:55:36 +03:00

105 lines
2.7 KiB
C

#include <linux/init.h>
#include <linux/slab.h>
#include <asm/bugs.h>
#include <asm/cacheflush.h>
#include <asm/idmap.h>
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
#include <asm/memory.h>
#include <asm/smp_plat.h>
#include <asm/suspend.h>
#include <asm/tlbflush.h>
extern int __cpu_suspend(unsigned long, int (*)(unsigned long), u32 cpuid);
extern void cpu_resume_mmu(void);
#ifdef CONFIG_MMU
int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
{
struct mm_struct *mm = current->active_mm;
u32 __mpidr = cpu_logical_map(smp_processor_id());
int ret;
if (!idmap_pgd)
return -EINVAL;
/*
* Provide a temporary page table with an identity mapping for
* the MMU-enable code, required for resuming. On successful
* resume (indicated by a zero return code), we need to switch
* back to the correct page tables.
*/
ret = __cpu_suspend(arg, fn, __mpidr);
if (ret == 0) {
cpu_switch_mm(mm->pgd, mm);
local_flush_bp_all();
local_flush_tlb_all();
check_other_bugs();
}
return ret;
}
#else
int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
{
u32 __mpidr = cpu_logical_map(smp_processor_id());
return __cpu_suspend(arg, fn, __mpidr);
}
#define idmap_pgd NULL
#endif
/*
* This is called by __cpu_suspend() to save the state, and do whatever
* flushing is required to ensure that when the CPU goes to sleep we have
* the necessary data available when the caches are not searched.
*/
void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
{
u32 *ctx = ptr;
*save_ptr = virt_to_phys(ptr);
/* This must correspond to the LDM in cpu_resume() assembly */
*ptr++ = virt_to_phys(idmap_pgd);
*ptr++ = sp;
*ptr++ = virt_to_phys(cpu_do_resume);
cpu_do_suspend(ptr);
flush_cache_louis();
/*
* flush_cache_louis does not guarantee that
* save_ptr and ptr are cleaned to main memory,
* just up to the Level of Unification Inner Shareable.
* Since the context pointer and context itself
* are to be retrieved with the MMU off that
* data must be cleaned from all cache levels
* to main memory using "area" cache primitives.
*/
__cpuc_flush_dcache_area(ctx, ptrsz);
__cpuc_flush_dcache_area(save_ptr, sizeof(*save_ptr));
outer_clean_range(*save_ptr, *save_ptr + ptrsz);
outer_clean_range(virt_to_phys(save_ptr),
virt_to_phys(save_ptr) + sizeof(*save_ptr));
}
extern struct sleep_save_sp sleep_save_sp;
static int cpu_suspend_alloc_sp(void)
{
void *ctx_ptr;
/* ctx_ptr is an array of physical addresses */
ctx_ptr = kcalloc(mpidr_hash_size(), sizeof(u32), GFP_KERNEL);
if (WARN_ON(!ctx_ptr))
return -ENOMEM;
sleep_save_sp.save_ptr_stash = ctx_ptr;
sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr);
sync_cache_w(&sleep_save_sp);
return 0;
}
early_initcall(cpu_suspend_alloc_sp);