6eb893ee9b
Changes in 4.9.139
flow_dissector: do not dissect l4 ports for fragments
ip_tunnel: don't force DF when MTU is locked
net-gro: reset skb->pkt_type in napi_reuse_skb()
sctp: not allow to set asoc prsctp_enable by sockopt
tg3: Add PHY reset for 5717/5719/5720 in change ring and flow control paths
usbnet: smsc95xx: disable carrier check while suspending
inet: frags: better deal with smp races
ipv6: Fix PMTU updates for UDP/raw sockets in presence of VRF
kbuild: Add better clang cross build support
kbuild: clang: add -no-integrated-as to KBUILD_[AC]FLAGS
kbuild: Consolidate header generation from ASM offset information
kbuild: consolidate redundant sed script ASM offset generation
kbuild: fix asm-offset generation to work with clang
kbuild: drop -Wno-unknown-warning-option from clang options
kbuild, LLVMLinux: Add -Werror to cc-option to support clang
kbuild: use -Oz instead of -Os when using clang
kbuild: Add support to generate LLVM assembly files
modules: mark __inittest/__exittest as __maybe_unused
x86/kbuild: Use cc-option to enable -falign-{jumps/loops}
crypto, x86: aesni - fix token pasting for clang
kbuild: Add __cc-option macro
x86/build: Use __cc-option for boot code compiler options
x86/build: Specify stack alignment for clang
kbuild: clang: Disable 'address-of-packed-member' warning
crypto: arm64/sha - avoid non-standard inline asm tricks
x86/boot: #undef memcpy() et al in string.c
efi/libstub/arm64: Use hidden attribute for struct screen_info reference
efi/libstub/arm64: Force 'hidden' visibility for section markers
efi/libstub: Preserve .debug sections after absolute relocation check
efi/libstub/arm64: Set -fpie when building the EFI stub
x86/build: Fix stack alignment for CLang
x86/build: Use cc-option to validate stack alignment parameter
Kbuild: use -fshort-wchar globally
arm64: uaccess: suppress spurious clang warning
ARM: add more CPU part numbers for Cortex and Brahma B15 CPUs
ARM: bugs: prepare processor bug infrastructure
ARM: bugs: hook processor bug checking into SMP and suspend paths
ARM: bugs: add support for per-processor bug checking
ARM: spectre: add Kconfig symbol for CPUs vulnerable to Spectre
ARM: spectre-v2: harden branch predictor on context switches
ARM: spectre-v2: add Cortex A8 and A15 validation of the IBE bit
ARM: spectre-v2: harden user aborts in kernel space
ARM: spectre-v2: add firmware based hardening
ARM: spectre-v2: warn about incorrect context switching functions
ARM: KVM: invalidate BTB on guest exit for Cortex-A12/A17
ARM: KVM: invalidate icache on guest exit for Cortex-A15
ARM: spectre-v2: KVM: invalidate icache on guest exit for Brahma B15
ARM: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling
ARM: KVM: report support for SMCCC_ARCH_WORKAROUND_1
ARM: spectre-v1: add speculation barrier (csdb) macros
ARM: spectre-v1: add array_index_mask_nospec() implementation
ARM: spectre-v1: fix syscall entry
ARM: signal: copy registers using __copy_from_user()
ARM: vfp: use __copy_from_user() when restoring VFP state
ARM: oabi-compat: copy semops using __copy_from_user()
ARM: use __inttype() in get_user()
ARM: spectre-v1: use get_user() for __get_user()
ARM: spectre-v1: mitigate user accesses
Linux 4.9.139
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
80 lines
2.7 KiB
C
80 lines
2.7 KiB
C
/*
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef __ARM_KVM_ASM_H__
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#define __ARM_KVM_ASM_H__
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#include <asm/virt.h>
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#define ARM_EXIT_WITH_ABORT_BIT 31
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#define ARM_EXCEPTION_CODE(x) ((x) & ~(1U << ARM_EXIT_WITH_ABORT_BIT))
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#define ARM_ABORT_PENDING(x) !!((x) & (1U << ARM_EXIT_WITH_ABORT_BIT))
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#define ARM_EXCEPTION_RESET 0
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#define ARM_EXCEPTION_UNDEFINED 1
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#define ARM_EXCEPTION_SOFTWARE 2
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#define ARM_EXCEPTION_PREF_ABORT 3
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#define ARM_EXCEPTION_DATA_ABORT 4
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#define ARM_EXCEPTION_IRQ 5
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#define ARM_EXCEPTION_FIQ 6
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#define ARM_EXCEPTION_HVC 7
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/*
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* The rr_lo_hi macro swaps a pair of registers depending on
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* current endianness. It is used in conjunction with ldrd and strd
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* instructions that load/store a 64-bit value from/to memory to/from
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* a pair of registers which are used with the mrrc and mcrr instructions.
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* If used with the ldrd/strd instructions, the a1 parameter is the first
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* source/destination register and the a2 parameter is the second
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* source/destination register. Note that the ldrd/strd instructions
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* already swap the bytes within the words correctly according to the
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* endianness setting, but the order of the registers need to be effectively
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* swapped when used with the mrrc/mcrr instructions.
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*/
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#ifdef CONFIG_CPU_ENDIAN_BE8
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#define rr_lo_hi(a1, a2) a2, a1
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#else
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#define rr_lo_hi(a1, a2) a1, a2
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#endif
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#define kvm_ksym_ref(kva) (kva)
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#ifndef __ASSEMBLY__
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struct kvm;
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struct kvm_vcpu;
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extern char __kvm_hyp_init[];
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extern char __kvm_hyp_init_end[];
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extern void __kvm_flush_vm_context(void);
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extern void __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa);
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extern void __kvm_tlb_flush_vmid(struct kvm *kvm);
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extern void __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu);
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extern int __kvm_vcpu_run(struct kvm_vcpu *vcpu);
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extern void __init_stage2_translation(void);
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extern void __kvm_hyp_reset(unsigned long);
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extern u64 __vgic_v3_get_ich_vtr_el2(void);
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extern void __vgic_v3_init_lrs(void);
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#endif
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#endif /* __ARM_KVM_ASM_H__ */
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