308 lines
8.7 KiB
C
308 lines
8.7 KiB
C
/*
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* Copyright (C) 2006 Mindspeed Technologies, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_COMCERTO 1
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#define CONFIG_ARM1136 1 /* This is an arm1136j-s CPU core */
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#define CONFIG_COMCERTO_1000 1 /* It's an SoC */
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#define CONFIG_BOARD_C1KM83240 1
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#include <asm/hardware.h>
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/* Mindspeed version */
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#define CONFIG_IDENT_STRING " Mindspeed $Name: uboot_7_00_5 $"
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/*
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* Linux boot configuration
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*/
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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//#define CONFIG_INITRD_TAG 1
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#define LINUX_BOOTPARAM_ADDR (PHYS_SDRAM + MSP_BOTTOM_MEMORY_RESERVED_SIZE + 0x100)
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/*
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* Relocation options
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*/
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#define CONFIG_SKIP_RELOCATE_UBOOT
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//#define CONFIG_SKIP_LOWLEVEL_INIT
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/*
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* RAM configuration
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*/
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/*
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* Memory Mapping
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM DDR_BASEADDR
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#define PHYS_SDRAM_SIZE 0x8000000 /* 128 MB */
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/*
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* Hardware drivers
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*/
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/*
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* UART configuration
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*/
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/* define one of these to choose the UART0 or UART1 as console */
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#define CONFIG_UART0 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600}
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/*
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* Emac Settings
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*/
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#undef CONFIG_COMCERTO_GEMAC
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// GEMAC mode configured by bootstrap pins or SW
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#undef CONFIG_COMCERTO_MII_CFG_BOOTSTRAP
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//#define CONFIG_COMCERTO_MII_CFG_BOOTSTRAP
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#define GEMAC0_PHY_ADDR 0
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#define GEMAC0_CONFIG CONFIG_COMCERTO_USE_RGMII
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#define GEMAC0_MODE (GEMAC_SW_CONF | GEMAC_SW_FULL_DUPLEX | GEMAC_SW_SPEED_1G)
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#define GEMAC0_PHY_FLAGS (GEMAC_PHY_AUTONEG | GEMAC_GEM_DELAY_DISABLE)
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#define GEMAC0_PHYIDX 0
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#define GEMAC1_PHY_ADDR 0 //not used
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#define GEMAC1_CONFIG CONFIG_COMCERTO_USE_RGMII
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#define GEMAC1_MODE (GEMAC_SW_CONF | GEMAC_SW_FULL_DUPLEX | GEMAC_SW_SPEED_1G)
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#define GEMAC1_PHY_FLAGS (GEMAC_NO_PHY | GEMAC_GEM_DELAY_DISABLE)
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#define GEMAC1_PHYIDX 0 //not used
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#undef CONFIG_NET_MULTI
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/*
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* Shell configuration
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*/
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_EDITENV
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_RUN
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//#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "Comcerto-1000 > " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */
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/*
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* User Interface
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*/
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#define CONFIG_ETHADDR 00:aa:bb:cc:dd:ee
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM + 0x01000000) /* default load address */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_LOAD_ADDR /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x800000)
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#define BOARD_LATE_INIT
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#define MSP_BOTTOM_MEMORY_RESERVED_SIZE 0x800000 /* 8 MiB reserved for MSP */
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#define MSP_TOP_MEMORY_RESERVED_SIZE 0x0 /* 0 MiB reserved for MSP */
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/*
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* Network Configuration
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*/
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#define CONFIG_NET_RETRY_COUNT 3
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/*
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* Flash Configuration - Using CFI driver
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*/
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#define CFG_FLASH_AM040_DRIVER 1 /* enable AM040 flash driver */
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//#undef CFG_FLASH_AM040_DRIVER /* disable AM040 flash driver */
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//#define CFG_FLASH_AMLV640U_DRIVER 1 /* enable AMLV640U flash driver */
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#undef CFG_FLASH_AMLV640U_DRIVER /* disable AMLV640U flash driver */
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//#define CFG_FLASH_AMLV640U_SIZE 0x400000 /* (Acessible) Size of the AMLV640U flash device */
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#define CONFIG_FLASH_CFI_DRIVER 1 /* enable CFI driver */
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//#undef CONFIG_FLASH_CFI_DRIVER /* disable CFI driver */
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#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max # of sectors on one chip */
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#undef CONFIG_SYS_FLASH_PROTECTION
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#define PHYS_FLASH1 EXP_CS0_BASEADDR /* Flash Bank #1 */
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#define PHYS_FLASH1_SECT_SIZE 0x00020000 /* 128 KiB sectors */
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
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#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH1 }
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#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
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/*
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* CFI driver
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*/
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#if defined(CONFIG_FLASH_CFI_DRIVER)
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#define CONFIG_SYS_FLASH_CFI 1 /* flash is CFI conformant */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
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#define CONFIG_SYS_FLASH_QUIET_TEST
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#undef CFG_FLASH_COMPLEX_MAPPINGS
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// #define CFG_FLASH_COMPLEX_MAPPINGS
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/*
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* Monitor configuration
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*/
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#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH1
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#define CONFIG_SYS_MONITOR_LEN (1 * PHYS_FLASH1_SECT_SIZE) /* Reserve 128 KiB for Monitor */
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/*
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* Enviroment in flash
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*/
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment 16KiB */
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#endif
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/*
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* I2C support
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*/
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#if defined(CONFIG_CMD_I2C)
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_TCLK CONFIG_SYS_HZ_CLOCK
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#define CONFIG_SYS_I2C_SPEED 40000
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#define CONFIG_SYS_I2C_SLAVE 0
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#if defined(CONFIG_CMD_EEPROM)
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* max 64 byte */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
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#endif
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#endif
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#if defined(CONFIG_ENV_IS_IN_FLASH)
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#define CONFIG_ENV_ADDR (PHYS_FLASH1 + 2 * PHYS_FLASH1_SECT_SIZE) /* Keep 2 sectors for U-boot image */
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#define CONFIG_ENV_SECT_SIZE PHYS_FLASH1_SECT_SIZE
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//#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
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#endif
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#define CONFIG_ENV_OVERWRITE 1
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/*
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* NAND Configuration
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*/
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_SYS_NAND_BASE EXP_CS4_BASEADDR
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_MAX_CHIPS 1
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#define CONFIG_JFFS2_NAND 1
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#ifdef CONFIG_CMD_FLASH
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//TODO
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#else
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/*
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*EEPORM boot loader does the relocate and lowlevel init work
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*/
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#define CONFIG_SKIP_RELOCATE_UBOOT
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#define CONFIG_SKIP_LOWLEVEL_INIT
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/* Environment is in NAND */
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#define CONFIG_ENV_IS_IN_NAND 1
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#define CONFIG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */
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#define CONFIG_SYS_NAND_MAX_CHIPS 1
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#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment 128KiB */
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#endif
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#endif
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/* NAND GPIOs config */
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#define CFG_NAND_BR_GPIO 6
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#define CFG_NAND_CE_GPIO 29
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#define CFG_NAND_CLE_GPIO 31
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#define CFG_NAND_ALE_GPIO 30
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/*
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* JFFS2 Configuration
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*/
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/* mtdparts command line support */
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#define CONFIG_JFFS2_CMDLINE
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#ifdef CONFIG_CMD_JFFS2
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//#define CONFIG_SYS_JFFS2_SORT_FRAGMENTS
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#endif /* CONFIG_CMD_JFFS2 */
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#ifdef CONFIG_CMD_NAND
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#define MTDIDS_DEFAULT "nand0=comcertonand"
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#define MTDPARTS_DEFAULT "mtdparts=comcertonand:256k(u-boot),128k(env),32384k(fs)"
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#define MTDPARTITION_DEFAULT "nand0,2"
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#define ROOT_MTDBLOCK "/dev/mtdblock3"
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#else
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#define MTDIDS_DEFAULT "nor0=comcertoflash.0"
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#define MTDPARTS_DEFAULT "mtdparts=comcertoflash.0:256k(u-boot),128k(env),32384k(fs)"
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#define MTDPARTITION_DEFAULT "nor0,2"
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#define ROOT_MTDBLOCK "/dev/mtdblock2"
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#endif
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#define CFG_REFCLKFREQ 24000000 /* 24 MHz */
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#define CONFIG_SYS_HZ 1000
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#define CFG_PHY_CLOCK 125000000 /* 125 MHz*/
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#define CFG_GEM0_CLOCK 25000000 /* 25 MHz*/
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#define CFG_GEM1_CLOCK 25000000 /* 25 MHz*/
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#define CFG_DDR_16BIT 1
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/*
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* Initial stack configuration
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*/
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#define CONFIG_SYS_INIT_RAM_ADDR 0x0A000000 /* ARAM_BASEADDR Base address */
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#define CONFIG_SYS_INIT_RAM_END 0x00020000 /* 128K */
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#define CFG_ARAM_CODE_SIZE 0x0001A000 /* 104K */
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#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - CFG_ARAM_CODE_SIZE
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/*
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* Malloc/stack configuration
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 4 * 1024)
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
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#define CONFIG_STACKSIZE (2 * 1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#error CONFIG_USE_IRQ not supported
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#endif
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/*
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* DDR Training algorithm
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*/
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#define DDR_TRAINING
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//#undef DDR_TRAINING
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#endif /* __CONFIG_H */
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