122 lines
2.8 KiB
C
122 lines
2.8 KiB
C
#include <common.h>
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#include <command.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <config.h>
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#include <version.h>
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#include <atheros.h>
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extern int ath_ddr_initial_config(uint32_t refresh);
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extern int ath_ddr_find_size(void);
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#ifdef COMPRESSED_UBOOT
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# define prmsg(x) strcpy(s, x)
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# define CHECKBOARD_PARAMS char *s
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#else
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# define prmsg printf
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# define CHECKBOARD_PARAMS void
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#endif
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void
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ath_usb_initial_config(void)
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{
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#define unset(a) (~(a))
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if (RST_BOOTSTRAP_REF_CLK_GET(ath_reg_rd(RST_BOOTSTRAP_ADDRESS)) == 0) {
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ath_reg_wr_nf(SWITCH_CLOCK_SPARE_ADDRESS,
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ath_reg_rd(SWITCH_CLOCK_SPARE_ADDRESS) |
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SWITCH_CLOCK_SPARE_USB_REFCLK_FREQ_SEL_SET(2));
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} else {
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ath_reg_wr_nf(SWITCH_CLOCK_SPARE_ADDRESS,
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ath_reg_rd(SWITCH_CLOCK_SPARE_ADDRESS) |
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SWITCH_CLOCK_SPARE_USB_REFCLK_FREQ_SEL_SET(5));
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}
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udelay(1000);
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ath_reg_wr(RST_RESET_ADDRESS,
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ath_reg_rd(RST_RESET_ADDRESS) |
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RST_RESET_USB_PHY_SUSPEND_OVERRIDE_SET(1));
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udelay(1000);
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ath_reg_wr(RST_RESET_ADDRESS,
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ath_reg_rd(RST_RESET_ADDRESS) &
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unset(RST_RESET_USB_PHY_RESET_SET(1)));
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udelay(1000);
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ath_reg_wr(RST_RESET_ADDRESS,
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ath_reg_rd(RST_RESET_ADDRESS) &
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unset(RST_RESET_USB_PHY_ARESET_SET(1)));
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udelay(1000);
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ath_reg_wr(RST_RESET_ADDRESS,
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ath_reg_rd(RST_RESET_ADDRESS) &
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unset(RST_RESET_USB_HOST_RESET_SET(1)));
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udelay(1000);
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if ((ath_reg_rd(RST_REVISION_ID_ADDRESS) & 0xf) == 0) {
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/* Only for WASP 1.0 */
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ath_reg_wr(0xb8116c84 ,
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ath_reg_rd(0xb8116c84) & unset(1<<20));
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}
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}
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void ath_gpio_config(void)
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{
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#if 0
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/* Disable clock obs */
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ath_reg_wr (AR7240_GPIO_FUNC, (ath_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e0ff));
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/* Enable eth Switch LEDs */
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#ifdef CONFIG_K31
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ath_reg_wr (AR7240_GPIO_FUNC, (ath_reg_rd(AR7240_GPIO_FUNC) | 0xd8));
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#else
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ath_reg_wr (AR7240_GPIO_FUNC, (ath_reg_rd(AR7240_GPIO_FUNC) | 0xfa));
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#endif
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#endif
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}
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int
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ath_mem_config(void)
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{
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unsigned int type, reg32;
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#if !defined(CONFIG_ATH_EMULATION)
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type = ath_ddr_initial_config(CFG_DDR_REFRESH_VAL);
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/* Take WMAC out of reset */
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reg32 = ath_reg_rd(RST_RESET_ADDRESS);
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reg32 = reg32 & ~RST_RESET_RTC_RESET_SET(1);
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ath_reg_wr_nf(RST_RESET_ADDRESS, reg32);
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/* Switching regulator settings */
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ath_reg_wr_nf(0x18116c40, 0x633c8176); /* AR_PHY_PMU1 */
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#if !defined(CONFIG_ATH_NAND_BR)
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if (ath_reg_rd(RST_REVISION_ID_ADDRESS) & 0xf) {
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if (type == 2) {
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// ddr1
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ath_reg_wr_nf(0x18116c44, 0x10000000); /* AR_PHY_PMU2 */
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} else {
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// ddr2 & sdram
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ath_reg_wr_nf(0x18116c44, 0x10380000); /* AR_PHY_PMU2 */
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}
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} else {
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ath_reg_wr_nf(0x18116c44, 0x10380000); /* AR_PHY_PMU2 */
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}
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#endif
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ath_usb_initial_config();
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ath_gpio_config();
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#endif /* !defined(CONFIG_ATH_EMULATION) */
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reg32 = ath_ddr_find_size();
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return reg32;
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}
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long int initdram(int board_type)
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{
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return (ath_mem_config());
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}
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int checkboard(CHECKBOARD_PARAMS)
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{
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prmsg("U-boot Scorpion Emulation\n");
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return 0;
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}
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