804 lines
27 KiB
C
Executable File
804 lines
27 KiB
C
Executable File
/************************************************************************
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*
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* Copyright (C) 2010 Trendchip Technologies, Corp.
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* All Rights Reserved.
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*
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* Trendchip Confidential; Need to Know only.
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* Protected as an unpublished work.
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*
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* The computer program listings, specifications and documentation
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* herein are the property of Trendchip Technologies, Co. and shall
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* not be reproduced, copied, disclosed, or used in whole or in part
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* for any reason without the prior express written permission of
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* Trendchip Technologeis, Co.
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*
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*************************************************************************/
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#ifndef TC_PARTITION_H
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#define TC_PARTITION_H
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#ifdef TCSUPPORT_MTD_ENCHANCEMENT
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/*
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note:
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1.the read base address of reserve area need to compute by (flash total size -flash erase size * reverse block num)
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-the base addrass can be obtained by mtd ioctl
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-for example :flash total size is 32 m,flash erase size is 64k,reverse block num is 1,so the read base address of
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reserve area is 0x3fff0000
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2.reverse block num is according to compile option TCSUPPORT_RESERVEAREA_BLOCK
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TCSUPPORT_RESERVEAREA_BLOCK==1 --------reverse block num is 1
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TCSUPPORT_RESERVEAREA_BLOCK==2 --------reverse block num is 2
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TCSUPPORT_RESERVEAREA_BLOCK==3 --------reverse block num is 3
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TCSUPPORT_RESERVEAREA_BLOCK==4 --------reverse block num is 4
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3.if you modify the size or offset of the certain sector or you add a new sector,you must modify the reserve area table in order to let
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other people be clear.
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*/
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//********************************
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// operation of reserve area //
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//********************************
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#if defined(TCSUPPORT_CPU_EN7512) || defined(TCSUPPORT_CPU_EN7521)
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#ifndef __KERNEL__
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#include <stdio.h>
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#include <fcntl.h>
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#include <sys/ioctl.h>
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#include <mtd/mtd-user.h>
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#endif
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#endif
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#define TC_FLASH_READ_CMD "/userfs/bin/mtd readflash %s %lu %lu %s"
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#define TC_FLASH_WRITE_CMD "/userfs/bin/mtd writeflash %s %lu %lu %s"
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#define TC_FLASH_ERASE_SECTOR_CMD "/userfs/bin/mtd erasesector %lu %s"
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#define RESERVEAREA_NAME "reservearea"
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#if defined(TCSUPPORT_CPU_EN7512) || defined(TCSUPPORT_CPU_EN7521)
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#ifndef __KERNEL__
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static inline int mtd_reservearea_open(const char *mtd, int flags)
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{
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FILE *fp = NULL;
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char dev[128];
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int i;
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if ((fp = fopen("/proc/mtd", "r"))) {
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while (fgets(dev, sizeof(dev), fp)) {
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if (sscanf(dev, "mtd%d:", &i) && strstr(dev, mtd)) {
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snprintf(dev, sizeof(dev), "/dev/mtd%d", i);
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fclose(fp);
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return open(dev, flags);
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}
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}
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fclose(fp);
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}
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return -1;
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}
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#endif
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/* the original NAND_FLASH_BLOCK_SIZE is 0x20000 */
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#define ORIGINAL_NAND_FLASH_BLOCK_SIZE (0x20000)
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static inline unsigned int runtime_flash_block_size(void)
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{
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#ifndef __KERNEL__
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int fd, ret;
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mtd_info_t mtd_info;
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fd = mtd_reservearea_open(RESERVEAREA_NAME, O_RDONLY);
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if(fd < 0) {
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fprintf(stderr, "Couldn't open mtd:%s!\n", RESERVEAREA_NAME);
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return ORIGINAL_NAND_FLASH_BLOCK_SIZE;
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}
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ret = ioctl(fd, MEMGETINFO, &mtd_info);
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close(fd);
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if(ret == 0) {
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return mtd_info.erasesize;
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} else {
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fprintf(stderr, "Couldn't ioctl to %s!\n", RESERVEAREA_NAME);
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return ORIGINAL_NAND_FLASH_BLOCK_SIZE;
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}
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#else /* __KERNEL__ */
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return ORIGINAL_NAND_FLASH_BLOCK_SIZE;
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#endif /* __KERNEL__ */
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}
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#define NAND_FLASH_BLOCK_SIZE runtime_flash_block_size() //this define can be changed baccording to type of nandflash (0x10000/0x20000/0x40000)
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#else /* defined(TCSUPPORT_CPU_EN7512) || defined(TCSUPPORT_CPU_EN7521) */
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#define NAND_FLASH_BLOCK_SIZE (0x20000) //this define can be changed baccording to type of nandflash (0x10000/0x20000/0x40000)
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#endif /* defined(TCSUPPORT_CPU_EN7512) || defined(TCSUPPORT_CPU_EN7521) */
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#if defined(TCSUPPORT_CT)
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//********************************
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// sectors define of reserve area //
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//********************************
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#define EEPROM_RA_AC_SIZE 512
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#define EEPROM_RA_AC_RESERVE_SIZE 512
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#ifdef TCSUPPORT_NAND_FLASH
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#if defined(TCSUPPORT_CT_PON)
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#define RESERVEAREA_ERASE_SIZE 0x40000 //this define should be changed baccording to flash erase size
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#else
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#define RESERVEAREA_ERASE_SIZE 0x10000 //this define should be changed baccording to flash erase size
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#endif
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#else
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#define RESERVEAREA_ERASE_SIZE 0x10000 //this define should be changed baccording to flash erase size
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#endif
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#define RESERVEAREA_BLOCK_BASE 0
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//#if defined( TCSUPPORT_RESERVEAREA_1_BLOCK)
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//#elif defined( TCSUPPORT_RESERVEAREA_2_BLOCK)
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//#elif defined( TCSUPPORT_RESERVEAREA_3_BLOCK)
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#if (TCSUPPORT_RESERVEAREA_BLOCK==1)
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/*
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---------------------------------------------------------------------------------
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@reserve area table@
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|sector name cover area note
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------------------------------------------------------------------------------------
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*/
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#elif (TCSUPPORT_RESERVEAREA_BLOCK==2)
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/*
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---------------------------------------------------------------------------------
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@reserve area table@
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|sector name cover area note
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------------------------------------------------------------------------------------
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*/
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#elif (TCSUPPORT_RESERVEAREA_BLOCK==3)
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/*
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---------------------------------------------------------------------------------
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@reserve area table@
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|sector name cover area note
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------------------------------------------------------------------------------------
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*/
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#elif (TCSUPPORT_RESERVEAREA_BLOCK==4)
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//defined( TCSUPPORT_RESERVEAREA_BLOCK == 4)
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#if defined(TCSUPPORT_CT_E8B_ADSL) && defined(TCSUPPORT_CPU_MT7505)
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/*
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---------------------------------------------------------------------------------
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@reserve area table@
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|sector name cover area note
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|0 backupromfile 0~0xffff 64k
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|1 temp 0x10000~0x1ffff 64k
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|a cerm1 0x10400~0x113ff 4k
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|b cerm2 0x11400~0x123ff 4k
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|c cerm3 0x12400~0x133ff 4k
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|d cerm4 0x13400~0x143ff 4k
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|e username/passwd 0x14400~0x147ff 1K
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|2 syslog 0x20000~0x2ffff 64k
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|3 eeprom 0x30000~0x303ff 1k(reserve 1k,no use 256 bytes)
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|a proline 0x30400~0x313ff 4k
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------------------------------------------------------------------------------------
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*/
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#define RESERVEAREA_TOTAL_SIZE RESERVEAREA_ERASE_SIZE*4
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/*backupromfile*/
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#define BACKUPROMFILE_RA_SIZE 0x10000
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#define BACKUPROMFILE_RA_OFFSET RESERVEAREA_BLOCK_BASE
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/*temp*/
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#define TEMP_RA_SIZE 0x10000
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#define TEMP_RA_OFFSET (BACKUPROMFILE_RA_SIZE+BACKUPROMFILE_RA_OFFSET)
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/*cerm1*/
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#define CERM1_RA_SIZE 0x1000
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#define CERM1_RA_OFFSET (TEMP_RA_OFFSET)
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/*cerm2*/
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#define CERM2_RA_SIZE 0x1000
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#define CERM2_RA_OFFSET (CERM1_RA_SIZE+CERM1_RA_OFFSET)
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/*cerm3*/
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#define CERM3_RA_SIZE 0x1000
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#define CERM3_RA_OFFSET (CERM2_RA_SIZE+CERM2_RA_OFFSET)
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/*cerm4*/
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#define CERM4_RA_SIZE 0x1000
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#define CERM4_RA_OFFSET (CERM3_RA_SIZE+CERM3_RA_OFFSET)
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#if defined(TCSUPPORT_CT_BOOTLOADER_UPGRADE)
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/*username/passwd*/
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#define USERNAMEPASSWD_RA_SIZE 0x400
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#define USERNAMEPASSWD_RA_OFFSET (CERM4_RA_SIZE+CERM4_RA_OFFSET)
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#else
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#define USERNAMEPASSWD_RA_SIZE 0x0
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#define USERNAMEPASSWD_RA_OFFSET (CERM4_RA_SIZE+CERM4_RA_OFFSET)
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#endif
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/*syslog*/
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#define SYSLOG_RA_SIZE 0x10000
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#define SYSLOG_RA_OFFSET (TEMP_RA_SIZE+TEMP_RA_OFFSET)
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/*eeprom*/
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#define EEPROM_RA_SIZE 0x400
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#define EEPROM_RA_OFFSET (SYSLOG_RA_SIZE+SYSLOG_RA_OFFSET)
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#ifdef TCSUPPORT_PRODUCTIONLINE
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#define PROLINE_CWMPPARA_RA_SIZE 0x1000
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#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_SIZE+EEPROM_RA_OFFSET)
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#else
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#define PROLINE_CWMPPARA_RA_SIZE 0x0
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#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_SIZE+EEPROM_RA_OFFSET)
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#endif
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#else
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/*
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---------------------------------------------------------------------------------
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@reserve area table@
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|sector name cover area note
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|0 backupromfile 0~0xffff 64k
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|1 defaultromfile 0x10000~0x1ffff 64k
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|2 syslog 0x20000~0x2ffff 64k
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|3 eeprom 0x30000~0x303ff 1k(reserve 1k,no use 256 bytes)
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|4 cerm1 0x30400~0x313ff 4k
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|5 cerm2 0x31400~0x323ff 4k
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|6 cerm3 0x32400~0x333ff 4k
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|7 cerm4 0x33400~0x343ff 4k
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|8 username/passwd 0x34400~0x347ff 1K
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------------------------------------------------------------------------------------
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*/
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#define RESERVEAREA_TOTAL_SIZE RESERVEAREA_ERASE_SIZE*4
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/*backupromfile*/
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#define BACKUPROMFILE_RA_SIZE 0x10000
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#define BACKUPROMFILE_RA_OFFSET RESERVEAREA_BLOCK_BASE
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/*defaultromfile*/
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#define DEFAULTROMFILE_RA_SIZE 0x10000
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#define DEFAULTROMFILE_RA_OFFSET (BACKUPROMFILE_RA_OFFSET+BACKUPROMFILE_RA_SIZE)
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/*syslog*/
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#define SYSLOG_RA_SIZE 0x10000
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#define SYSLOG_RA_OFFSET (DEFAULTROMFILE_RA_OFFSET+DEFAULTROMFILE_RA_SIZE)
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/*eeprom*/
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#define EEPROM_RA_SIZE 0x400
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#define EEPROM_RA_OFFSET (SYSLOG_RA_OFFSET+SYSLOG_RA_SIZE)
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/*cerm1*/
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#define CERM1_RA_SIZE 0x1000
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#define CERM1_RA_OFFSET (EEPROM_RA_SIZE+EEPROM_RA_OFFSET)
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/*cerm2*/
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#define CERM2_RA_SIZE 0x1000
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#define CERM2_RA_OFFSET (CERM1_RA_SIZE+CERM1_RA_OFFSET)
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/*cerm3*/
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#define CERM3_RA_SIZE 0x1000
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#define CERM3_RA_OFFSET (CERM2_RA_SIZE+CERM2_RA_OFFSET)
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/*cerm4*/
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#define CERM4_RA_SIZE 0x1000
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#define CERM4_RA_OFFSET (CERM3_RA_SIZE+CERM3_RA_OFFSET)
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#if defined(TCSUPPORT_CT_BOOTLOADER_UPGRADE)
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/*username/passwd*/
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#define USERNAMEPASSWD_RA_SIZE 0x400
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#define USERNAMEPASSWD_RA_OFFSET (CERM4_RA_SIZE+CERM4_RA_OFFSET)
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#else
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#define USERNAMEPASSWD_RA_SIZE 0x0
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#define USERNAMEPASSWD_RA_OFFSET (CERM4_RA_SIZE+CERM4_RA_OFFSET)
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#endif
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#ifdef TCSUPPORT_PRODUCTIONLINE
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#if defined(TCSUPPORT_C7)
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#define PROLINE_CWMPPARA_RA_SIZE 0x1000
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#else
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#define PROLINE_CWMPPARA_RA_SIZE 0x180
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#endif
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#define PROLINE_CWMPPARA_RA_OFFSET (USERNAMEPASSWD_RA_SIZE+USERNAMEPASSWD_RA_OFFSET)
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#else
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#define PROLINE_CWMPPARA_RA_SIZE 0x0
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#define PROLINE_CWMPPARA_RA_OFFSET (USERNAMEPASSWD_RA_SIZE+USERNAMEPASSWD_RA_OFFSET)
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#endif
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#endif
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#else
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//defined( TCSUPPORT_RESERVEAREA_BLOCK ==7)
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#ifdef TCSUPPORT_NAND_FLASH
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#if defined(TCSUPPORT_CT_PON)
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/*
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---------------------------------------------------------------------------------
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@reserve area table 7 BLOCK@
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|sector name cover area note
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|1 backupromfile 0~0x3ffff 256k
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|2 defaultromfile 0x40000~0x7ffff 256k
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|3 syslog 0x80000~0xBffff 256k
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|4 proline 0xc0000~0xfffff 256k
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|5 temp 0x100000~0x13ffff 256k
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|5.1 cerm1 0x100000~0x100fff 4k
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|5.2 cerm2 0x101000~0x101fff 4k
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|5.3 cerm3 0x102000~0x102fff 4k
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|5.4 cerm4 0x103000~0x103fff 4k
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|6 block6 0x140000~0x17ffff 256k
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|6.1 eeprom 0x140000~0x1403ff 1k(reserve 1k,no use 256 bytes)
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|6.2 bob.conf 0x140400~0x14049f 160bytes
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|7 block7 0x180000~0x1bffff 256k
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|7.1 imgbootflag 0x180000~0x18003f 64bytes
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|7.2 11ac 0x180040~0x18023f 512bytes
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|7.3 11ac reserved 0x180240~0x18043f 512bytes
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------------------------------------------------------------------------------------
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*/
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#define RESERVEAREA_TOTAL_SIZE RESERVEAREA_ERASE_SIZE*7
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/*backupromfile*/
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#define BACKUPROMFILE_RA_SIZE 0x40000
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#define BACKUPROMFILE_RA_OFFSET RESERVEAREA_BLOCK_BASE
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/*defaultromfile*/
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#define DEFAULTROMFILE_RA_SIZE 0x40000
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#define DEFAULTROMFILE_RA_OFFSET (BACKUPROMFILE_RA_OFFSET+BACKUPROMFILE_RA_SIZE)
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/*syslog*/
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#define SYSLOG_RA_SIZE 0x40000
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#define SYSLOG_RA_OFFSET (DEFAULTROMFILE_RA_OFFSET+DEFAULTROMFILE_RA_SIZE)
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/*product para*/
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#define PROLINE_CWMPPARA_RA_SIZE 0x40000
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#define PROLINE_CWMPPARA_RA_OFFSET (SYSLOG_RA_OFFSET+SYSLOG_RA_SIZE)
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/*temp data*/
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#define TEMP_RA_SIZE 0x40000
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#define TEMP_RA_OFFSET (PROLINE_CWMPPARA_RA_OFFSET+PROLINE_CWMPPARA_RA_SIZE)
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/*cerm1*/
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#define CERM1_RA_SIZE 0x1000
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#define CERM1_RA_OFFSET (TEMP_RA_OFFSET)
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/*cerm2*/
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#define CERM2_RA_SIZE 0x1000
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#define CERM2_RA_OFFSET (CERM1_RA_OFFSET+CERM1_RA_SIZE)
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/*cerm3*/
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#define CERM3_RA_SIZE 0x1000
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#define CERM3_RA_OFFSET (CERM2_RA_OFFSET+CERM2_RA_SIZE)
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/*cerm4*/
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#define CERM4_RA_SIZE 0x1000
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#define CERM4_RA_OFFSET (CERM3_RA_OFFSET+CERM3_RA_SIZE)
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/*eeprom*/
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#define EEPROM_RA_SIZE 0x400
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#define EEPROM_RA_OFFSET (TEMP_RA_OFFSET+TEMP_RA_SIZE)
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/*bob info*/
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#define BOB_RA_SIZE 0xa0
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#define BOB_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
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/*image boot flag*/
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#define IMG_BOOT_FLAG_SIZE 1
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#define IMG_BOOT_FLAG_OFFSET (EEPROM_RA_OFFSET + RESERVEAREA_ERASE_SIZE)
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#define IMG_BOOT_FLAG_RESERVE_SIZE 63
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#define IMG_BOOT_FLAG_RESERVE_OFFSET (IMG_BOOT_FLAG_OFFSET + IMG_BOOT_FLAG_SIZE)
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#define EEPROM_RA_AC_OFFSET (IMG_BOOT_FLAG_RESERVE_OFFSET+IMG_BOOT_FLAG_RESERVE_SIZE)
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#define EEPROM_RA_AC_RESERVE_OFFSET (EEPROM_RA_AC_OFFSET+EEPROM_RA_AC_SIZE)
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#else
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/*
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---------------------------------------------------------------------------------
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@reserve area table@
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|sector name cover area note
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|0 backupromfile 0~0xffff 64k
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|1 defaultromfile 0x10000~0x1ffff 64k
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|2 syslog 0x20000~0x2ffff 64k
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|3 proline 0x30000~0x3ffff 64k
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|4 temp 0x40000~0x4ffff 64k
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|5 cerm1 0x40000~0x40fff 4k
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|6 cerm2 0x41000~0x41fff 4k
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|7 cerm3 0x42000~0x42fff 4k
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|8 cerm4 0x43000~0x43fff 4k
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|9 eeprom 0x50000~0x503ff 1k(reserve 1k,no use 256 bytes)
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|10 imgbootflag 0x60000~0x6ffff 64k
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------------------------------------------------------------------------------------
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*/
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#define RESERVEAREA_TOTAL_SIZE RESERVEAREA_ERASE_SIZE*7
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/*backupromfile*/
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#define BACKUPROMFILE_RA_SIZE 0x10000
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#define BACKUPROMFILE_RA_OFFSET RESERVEAREA_BLOCK_BASE
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/*defaultromfile*/
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#define DEFAULTROMFILE_RA_SIZE 0x10000
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#define DEFAULTROMFILE_RA_OFFSET (BACKUPROMFILE_RA_OFFSET+BACKUPROMFILE_RA_SIZE)
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/*syslog*/
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#define SYSLOG_RA_SIZE 0x10000
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#define SYSLOG_RA_OFFSET (DEFAULTROMFILE_RA_OFFSET+DEFAULTROMFILE_RA_SIZE)
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/*product para*/
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#define PROLINE_CWMPPARA_RA_SIZE 0x10000
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#define PROLINE_CWMPPARA_RA_OFFSET (SYSLOG_RA_OFFSET+SYSLOG_RA_SIZE)
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/*temp data*/
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#define TEMP_RA_SIZE 0x10000
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#define TEMP_RA_OFFSET (PROLINE_CWMPPARA_RA_OFFSET+PROLINE_CWMPPARA_RA_SIZE)
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/*cerm1*/
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#define CERM1_RA_SIZE 0x1000
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#define CERM1_RA_OFFSET (TEMP_RA_OFFSET)
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/*cerm2*/
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#define CERM2_RA_SIZE 0x1000
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#define CERM2_RA_OFFSET (CERM1_RA_OFFSET+CERM1_RA_SIZE)
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/*cerm3*/
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#define CERM3_RA_SIZE 0x1000
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#define CERM3_RA_OFFSET (CERM2_RA_OFFSET+CERM2_RA_SIZE)
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/*cerm4*/
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#define CERM4_RA_SIZE 0x1000
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#define CERM4_RA_OFFSET (CERM3_RA_OFFSET+CERM3_RA_SIZE)
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/*eeprom*/
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#define EEPROM_RA_SIZE 0x400
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#define EEPROM_RA_OFFSET (TEMP_RA_OFFSET+TEMP_RA_SIZE)
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/*bob info*/
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#define BOB_RA_SIZE 0xa0
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#define BOB_RA_OFFSET (0x600)
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/*image boot flag*/
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#define IMG_BOOT_FLAG_SIZE 1
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#define IMG_BOOT_FLAG_OFFSET (EEPROM_RA_OFFSET + RESERVEAREA_ERASE_SIZE)
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#endif
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#else
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/*
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---------------------------------------------------------------------------------
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@reserve area table@
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|sector name cover area note
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|0 backupromfile 0~0xffff 64k
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|1 defaultromfile 0x10000~0x1ffff 64k
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|2 syslog 0x20000~0x2ffff 64k
|
|
|3 proline 0x30000~0x3ffff 64k
|
|
|4 temp 0x40000~0x4ffff 64k
|
|
|5 cerm1 0x40000~0x40fff 4k
|
|
|6 cerm2 0x41000~0x41fff 4k
|
|
|7 cerm3 0x42000~0x42fff 4k
|
|
|8 cerm4 0x43000~0x43fff 4k
|
|
|9 eeprom 0x50000~0x503ff 1k(reserve 1k,no use 256 bytes)
|
|
|10 imgbootflag 0x60000~0x6ffff 64k
|
|
------------------------------------------------------------------------------------
|
|
*/
|
|
#define RESERVEAREA_TOTAL_SIZE RESERVEAREA_ERASE_SIZE*7
|
|
/*backupromfile*/
|
|
#define BACKUPROMFILE_RA_SIZE 0x10000
|
|
#define BACKUPROMFILE_RA_OFFSET RESERVEAREA_BLOCK_BASE
|
|
/*defaultromfile*/
|
|
#define DEFAULTROMFILE_RA_SIZE 0x10000
|
|
#define DEFAULTROMFILE_RA_OFFSET (BACKUPROMFILE_RA_OFFSET+BACKUPROMFILE_RA_SIZE)
|
|
/*syslog*/
|
|
#define SYSLOG_RA_SIZE 0x10000
|
|
#define SYSLOG_RA_OFFSET (DEFAULTROMFILE_RA_OFFSET+DEFAULTROMFILE_RA_SIZE)
|
|
/*product para*/
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x10000
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (SYSLOG_RA_OFFSET+SYSLOG_RA_SIZE)
|
|
/*temp data*/
|
|
#define TEMP_RA_SIZE 0x10000
|
|
#define TEMP_RA_OFFSET (PROLINE_CWMPPARA_RA_OFFSET+PROLINE_CWMPPARA_RA_SIZE)
|
|
/*cerm1*/
|
|
#define CERM1_RA_SIZE 0x1000
|
|
#define CERM1_RA_OFFSET (TEMP_RA_OFFSET)
|
|
/*cerm2*/
|
|
#define CERM2_RA_SIZE 0x1000
|
|
#define CERM2_RA_OFFSET (CERM1_RA_OFFSET+CERM1_RA_SIZE)
|
|
/*cerm3*/
|
|
#define CERM3_RA_SIZE 0x1000
|
|
#define CERM3_RA_OFFSET (CERM2_RA_OFFSET+CERM2_RA_SIZE)
|
|
/*cerm4*/
|
|
#define CERM4_RA_SIZE 0x1000
|
|
#define CERM4_RA_OFFSET (CERM3_RA_OFFSET+CERM3_RA_SIZE)
|
|
/*eeprom*/
|
|
#define EEPROM_RA_SIZE 0x400
|
|
#define EEPROM_RA_OFFSET (TEMP_RA_OFFSET+TEMP_RA_SIZE)
|
|
/*bob info*/
|
|
#define BOB_RA_SIZE 0xa0
|
|
#define BOB_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
|
|
/*image boot flag*/
|
|
#define IMG_BOOT_FLAG_SIZE 1
|
|
#define IMG_BOOT_FLAG_OFFSET (EEPROM_RA_OFFSET + RESERVEAREA_ERASE_SIZE)
|
|
#endif
|
|
#endif
|
|
#else
|
|
//********************************
|
|
// sectors define of reserve area //
|
|
//********************************
|
|
#ifdef TCSUPPORT_NAND_BMT
|
|
#define RESERVEAREA_ERASE_SIZE NAND_FLASH_BLOCK_SIZE //this define should be changed baccording to flash erase size
|
|
#else
|
|
#define RESERVEAREA_ERASE_SIZE 0x10000 //this define should be changed baccording to flash erase size
|
|
#endif
|
|
#define RESERVEAREA_BLOCK_BASE 0
|
|
|
|
//#if defined( TCSUPPORT_RESERVEAREA_1_BLOCK)
|
|
|
|
//#elif defined( TCSUPPORT_RESERVEAREA_2_BLOCK)
|
|
|
|
//#elif defined( TCSUPPORT_RESERVEAREA_3_BLOCK)
|
|
|
|
#if (TCSUPPORT_RESERVEAREA_BLOCK==1)
|
|
/*
|
|
---------------------------------------------------------------------------------
|
|
@reserve area table@
|
|
|sector name cover area note
|
|
|0 eeprom 0x00000~0x003ff 1k(reserve 1k,no use 256 bytes)
|
|
|1 cwmppara 0x00400~0x00600 512 Bytes
|
|
|2 not use now 0x00601~0x00fff (4k-1k-512 Bytes)
|
|
|3 mrd 0x01000~0x01fff 4k
|
|
|4 rom-t 0x02000~0x0ffff 56k
|
|
------------------------------------------------------------------------------------
|
|
*/
|
|
#define RESERVEAREA_TOTAL_SIZE RESERVEAREA_ERASE_SIZE*1
|
|
|
|
/*eeprom*/
|
|
#define EEPROM_RA_SIZE 0x400
|
|
#define EEPROM_RA_OFFSET RESERVEAREA_BLOCK_BASE
|
|
|
|
/*device information*/
|
|
#ifdef TCSUPPORT_PRODUCTIONLINE
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x200
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
|
|
#else
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x0
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
|
|
#endif
|
|
|
|
#define MRD_RA_SIZE 0x1000
|
|
#define MRD_RA_OFFSET (EEPROM_RA_OFFSET + 0x1000)
|
|
|
|
#define ROM_T_RA_SIZE 0xe000
|
|
#define ROM_T_RA_OFFSET (MRD_RA_OFFSET+MRD_RA_SIZE)
|
|
|
|
#elif (TCSUPPORT_RESERVEAREA_BLOCK==2)
|
|
/*
|
|
---------------------------------------------------------------------------------
|
|
@reserve area table@
|
|
|sector name cover area note
|
|
|0 backupromfile 0~0xffff 64k
|
|
|1 syslog 0x10000~0x10000
|
|
|2 eeprom 0x10000~0x103ff 1k(reserve 1k,no use 256 bytes)
|
|
|3 cwmppara 0x00400~0x00600 512 Bytes
|
|
|4 not use now 0x00601~0x00fff (4k-1k-512 Bytes)
|
|
|5 mrd 0x01000~0x01fff 4k
|
|
|6 rom-t 0x02000~0x0ffff 56k
|
|
------------------------------------------------------------------------------------
|
|
*/
|
|
#define RESERVEAREA_TOTAL_SIZE RESERVEAREA_ERASE_SIZE*2
|
|
/*backupromfile*/
|
|
#define BACKUPROMFILE_RA_SIZE 0x10000
|
|
#define BACKUPROMFILE_RA_OFFSET RESERVEAREA_BLOCK_BASE
|
|
/*defaultromfile*/
|
|
//#define DEFAULTROMFILE_RA_SIZE 0x0
|
|
//#define DEFAULTROMFILE_RA_OFFSET (BACKUPROMFILE_RA_OFFSET+BACKUPROMFILE_RA_SIZE)
|
|
/*syslog*/
|
|
#define SYSLOG_RA_SIZE 0x0
|
|
//#define SYSLOG_RA_OFFSET (DEFAULTROMFILE_RA_OFFSET+DEFAULTROMFILE_RA_SIZE)
|
|
#define SYSLOG_RA_OFFSET (BACKUPROMFILE_RA_OFFSET+BACKUPROMFILE_RA_SIZE)
|
|
/*eeprom*/
|
|
#define EEPROM_RA_SIZE 0x400
|
|
#define EEPROM_RA_OFFSET (SYSLOG_RA_OFFSET+SYSLOG_RA_SIZE)
|
|
|
|
/*device information*/
|
|
#ifdef TCSUPPORT_PRODUCTIONLINE
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x200
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
|
|
#else
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x0
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
|
|
#endif
|
|
|
|
#define MRD_RA_SIZE 0x1000
|
|
#define MRD_RA_OFFSET (EEPROM_RA_OFFSET + 0x1000)
|
|
|
|
#define ROM_T_RA_SIZE 0xe000
|
|
#define ROM_T_RA_OFFSET (MRD_RA_OFFSET+MRD_RA_SIZE)
|
|
|
|
#elif (TCSUPPORT_RESERVEAREA_BLOCK==3)
|
|
/*
|
|
---------------------------------------------------------------------------------
|
|
@reserve area table@
|
|
|sector name cover area note
|
|
|0 backupromfile 0~0xffff 64k
|
|
|1 defaultromfile 0x10000~0x1ffff 64k
|
|
|2 eeprom 0x20000~0x203ff 1k(reserve 1k,no use 256 bytes)
|
|
|3 cwmppara 0x00400~0x00600 384 Bytes
|
|
|4 not use now 0x00601~0x00fff (4k-1k-512 Bytes)
|
|
|5 mrd 0x01000~0x01fff 4k
|
|
|6 rom-t 0x02000~0x0ffff 56k
|
|
------------------------------------------------------------------------------------
|
|
*/
|
|
#define RESERVEAREA_TOTAL_SIZE RESERVEAREA_ERASE_SIZE*3
|
|
/*backupromfile*/
|
|
#define BACKUPROMFILE_RA_SIZE 0x10000
|
|
#define BACKUPROMFILE_RA_OFFSET RESERVEAREA_BLOCK_BASE
|
|
/*defaultromfile*/
|
|
#define DEFAULTROMFILE_RA_SIZE 0x10000
|
|
#define DEFAULTROMFILE_RA_OFFSET (BACKUPROMFILE_RA_OFFSET+BACKUPROMFILE_RA_SIZE)
|
|
/*eeprom*/
|
|
#define EEPROM_RA_SIZE 0x400
|
|
#define EEPROM_RA_OFFSET (DEFAULTROMFILE_RA_SIZE+DEFAULTROMFILE_RA_OFFSET)
|
|
|
|
/*device information*/
|
|
#ifdef TCSUPPORT_PRODUCTIONLINE
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x200
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
|
|
#else
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x0
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
|
|
#endif
|
|
|
|
#define MRD_RA_SIZE 0x1000
|
|
#define MRD_RA_OFFSET (EEPROM_RA_OFFSET + 0x1000)
|
|
|
|
#define ROM_T_RA_SIZE 0xe000
|
|
#define ROM_T_RA_OFFSET (MRD_RA_OFFSET+MRD_RA_SIZE)
|
|
|
|
//#else
|
|
#elif (TCSUPPORT_RESERVEAREA_BLOCK==4)
|
|
//defined( TCSUPPORT_RESERVEAREA_BLOCK == 4)
|
|
#ifdef TCSUPPORT_NAND_BMT
|
|
|
|
/*
|
|
---------------------------------------------------------------------------------
|
|
@reserve area table@
|
|
|sector name cover area note
|
|
|0 backupromfile 0~0x1ffff 128k
|
|
|1 defaultromfile 0x20000~0x3ffff 128k
|
|
|2 syslog 0x40000~0x5ffff 128k
|
|
|3 eeprom 0x60000~0x603ff 1k(reserve 1k,no use 256 bytes)
|
|
|4 cwmppara 0x60400~0x60600 512 Bytes
|
|
|5 not use now 0x60601~0x60fff (4k-1k-512 Bytes)
|
|
|6 mrd 0x61000~0x61fff 4k
|
|
|7 rom-t 0x62000~0x6ffff 56k
|
|
------------------------------------------------------------------------------------
|
|
*/
|
|
#define RESERVEAREA_TOTAL_SIZE RESERVEAREA_ERASE_SIZE*4
|
|
#ifdef TCSUPPORT_WLAN_AC
|
|
#define MAX_EEPROM_BIN_FILE_SIZE 512
|
|
#endif
|
|
/*backupromfile*/
|
|
#define BACKUPROMFILE_RA_SIZE RESERVEAREA_ERASE_SIZE
|
|
#define BACKUPROMFILE_RA_OFFSET RESERVEAREA_BLOCK_BASE
|
|
/*defaultromfile*/
|
|
#define DEFAULTROMFILE_RA_SIZE RESERVEAREA_ERASE_SIZE
|
|
#define DEFAULTROMFILE_RA_OFFSET (BACKUPROMFILE_RA_OFFSET+BACKUPROMFILE_RA_SIZE)
|
|
/*syslog*/
|
|
#define SYSLOG_RA_SIZE RESERVEAREA_ERASE_SIZE
|
|
#define SYSLOG_RA_OFFSET (DEFAULTROMFILE_RA_OFFSET+DEFAULTROMFILE_RA_SIZE)
|
|
/*eeprom*/
|
|
#define EEPROM_RA_SIZE 0x400
|
|
#define EEPROM_RA_OFFSET (SYSLOG_RA_OFFSET+SYSLOG_RA_SIZE)
|
|
#ifdef TCSUPPORT_WLAN_AC
|
|
#ifndef TCSUPPORT_EEPROM_ACEXT
|
|
#define EEPROM_RA_AC_OFFSET (EEPROM_RA_OFFSET+MAX_EEPROM_BIN_FILE_SIZE)
|
|
#endif
|
|
#endif
|
|
|
|
/*device information*/
|
|
#ifdef TCSUPPORT_PRODUCTIONLINE
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x200
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
|
|
#else
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x0
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
|
|
#endif
|
|
/*for MT7615 use cause the size of MT7615 EEPROM is 1k*/
|
|
#ifdef TCSUPPORT_WLAN_AC
|
|
#ifdef TCSUPPORT_EEPROM_ACEXT
|
|
#define EEPROM_RA_AC_OFFSET (PROLINE_CWMPPARA_RA_OFFSET+PROLINE_CWMPPARA_RA_SIZE)
|
|
#endif
|
|
#endif
|
|
|
|
#define MRD_RA_SIZE 0x1000
|
|
#define MRD_RA_OFFSET (EEPROM_RA_OFFSET + 0x1000)
|
|
|
|
#define ROM_T_RA_SIZE 0xe000
|
|
#define ROM_T_RA_OFFSET (MRD_RA_OFFSET+MRD_RA_SIZE)
|
|
|
|
|
|
#else
|
|
|
|
/*
|
|
---------------------------------------------------------------------------------
|
|
@reserve area table@
|
|
|sector name cover area note
|
|
|0 backupromfile 0~0xffff 64k
|
|
|1 defaultromfile 0x10000~0x1ffff 64k
|
|
|2 syslog 0x20000~0x2ffff 64k
|
|
|3 eeprom 0x30000~0x303ff 1k(reserve 1k,no use 256 bytes)
|
|
|4 cwmppara 0x00400~0x00600 512 Bytes
|
|
|5 not use now 0x00601~0x00fff (4k-1k-512 Bytes)
|
|
|6 mrd 0x01000~0x01fff 4k
|
|
|7 rom-t 0x02000~0x0ffff 56k
|
|
------------------------------------------------------------------------------------
|
|
*/
|
|
#define RESERVEAREA_TOTAL_SIZE RESERVEAREA_ERASE_SIZE*4
|
|
#ifdef TCSUPPORT_WLAN_AC
|
|
#define MAX_EEPROM_BIN_FILE_SIZE 512
|
|
#endif
|
|
/*backupromfile*/
|
|
#define BACKUPROMFILE_RA_SIZE 0x10000
|
|
#define BACKUPROMFILE_RA_OFFSET RESERVEAREA_BLOCK_BASE
|
|
/*defaultromfile*/
|
|
#define DEFAULTROMFILE_RA_SIZE 0x10000
|
|
#define DEFAULTROMFILE_RA_OFFSET (BACKUPROMFILE_RA_OFFSET+BACKUPROMFILE_RA_SIZE)
|
|
/*syslog*/
|
|
#define SYSLOG_RA_SIZE 0x10000
|
|
#define SYSLOG_RA_OFFSET (DEFAULTROMFILE_RA_OFFSET+DEFAULTROMFILE_RA_SIZE)
|
|
/*eeprom*/
|
|
#define EEPROM_RA_SIZE 0x400
|
|
#define EEPROM_RA_OFFSET (SYSLOG_RA_OFFSET+SYSLOG_RA_SIZE)
|
|
#ifdef TCSUPPORT_WLAN_AC
|
|
#ifndef TCSUPPORT_EEPROM_ACEXT
|
|
#define EEPROM_RA_AC_OFFSET (EEPROM_RA_OFFSET+MAX_EEPROM_BIN_FILE_SIZE)
|
|
#endif
|
|
#endif
|
|
|
|
/*device information*/
|
|
#ifdef TCSUPPORT_PRODUCTIONLINE
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x200
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
|
|
#else
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x0
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (EEPROM_RA_OFFSET+EEPROM_RA_SIZE)
|
|
#endif
|
|
|
|
/*for MT7615 use cause the size of MT7615 EEPROM is 1k*/
|
|
#ifdef TCSUPPORT_WLAN_AC
|
|
#ifdef TCSUPPORT_EEPROM_ACEXT
|
|
#define EEPROM_RA_AC_OFFSET (PROLINE_CWMPPARA_RA_OFFSET+PROLINE_CWMPPARA_RA_SIZE)
|
|
#endif
|
|
#endif
|
|
|
|
#define MRD_RA_SIZE 0x1000
|
|
#define MRD_RA_OFFSET (EEPROM_RA_OFFSET + 0x1000)
|
|
|
|
#define ROM_T_RA_SIZE 0xe000
|
|
#define ROM_T_RA_OFFSET (MRD_RA_OFFSET+MRD_RA_SIZE)
|
|
#endif
|
|
|
|
|
|
#else
|
|
//defined( TCSUPPORT_RESERVEAREA_BLOCK == 5)
|
|
#ifdef TCSUPPORT_NAND_BMT
|
|
/*
|
|
---------------------------------------------------------------------------------
|
|
@reserve area table@
|
|
|sector name cover area note
|
|
|0 backupromfile 0~0x3ffff 256k
|
|
|1 gpon_bob 0x40000~0x5ffff 128k
|
|
|2 syslog 0x60000~0x7ffff 128k
|
|
|3 eeprom 0x80000~0x803ff 1k(reserve 1k,no use 256 bytes)
|
|
|4 cerm1 0x80400~0x813ff 4k
|
|
|5 cerm2 0x81400~0x823ff 4k
|
|
|6 cerm3 0x82400~0x833ff 4k
|
|
|7 cerm4 0x83400~0x843ff 4k
|
|
|8 username/passwd 0x84400~0x847ff 1K
|
|
|9 mrd 0x80000~0x80fff 4k
|
|
|10 imgbootflag 0x85800~0x85801
|
|
|
|
------------------------------------------------------------------------------------
|
|
*/
|
|
#define RESERVEAREA_TOTAL_SIZE RESERVEAREA_ERASE_SIZE*5
|
|
/*backupromfile*/
|
|
#define BACKUPROMFILE_RA_SIZE NAND_FLASH_BLOCK_SIZE*2
|
|
#define BACKUPROMFILE_RA_OFFSET RESERVEAREA_BLOCK_BASE
|
|
/*defaultromfile*/
|
|
#define GPON_BOB_SIZE NAND_FLASH_BLOCK_SIZE
|
|
#define GPON_BOB_OFFSET (BACKUPROMFILE_RA_OFFSET+BACKUPROMFILE_RA_SIZE)
|
|
/*syslog*/
|
|
#define SYSLOG_RA_SIZE NAND_FLASH_BLOCK_SIZE
|
|
#define SYSLOG_RA_OFFSET (GPON_BOB_OFFSET+GPON_BOB_SIZE)
|
|
/*eeprom*/
|
|
#define EEPROM_RA_SIZE 0x400
|
|
#define EEPROM_RA_OFFSET (SYSLOG_RA_OFFSET+SYSLOG_RA_SIZE)
|
|
/*cerm1*/
|
|
#define CERM1_RA_SIZE 0x1000
|
|
#define CERM1_RA_OFFSET (EEPROM_RA_SIZE+EEPROM_RA_OFFSET)
|
|
/*cerm2*/
|
|
#define CERM2_RA_SIZE 0x1000
|
|
#define CERM2_RA_OFFSET (CERM1_RA_SIZE+CERM1_RA_OFFSET)
|
|
/*cerm3*/
|
|
#define CERM3_RA_SIZE 0x1000
|
|
#define CERM3_RA_OFFSET (CERM2_RA_SIZE+CERM2_RA_OFFSET)
|
|
/*cerm4*/
|
|
#define CERM4_RA_SIZE 0x1000
|
|
#define CERM4_RA_OFFSET (CERM3_RA_SIZE+CERM3_RA_OFFSET)
|
|
#if defined(TCSUPPORT_CT_BOOTLOADER_UPGRADE)
|
|
/*username/passwd*/
|
|
#define USERNAMEPASSWD_RA_SIZE 0x400
|
|
#define USERNAMEPASSWD_RA_OFFSET (CERM4_RA_SIZE+CERM4_RA_OFFSET)
|
|
#else
|
|
#define USERNAMEPASSWD_RA_SIZE 0x0
|
|
#define USERNAMEPASSWD_RA_OFFSET (CERM4_RA_SIZE+CERM4_RA_OFFSET)
|
|
#endif
|
|
#ifdef TCSUPPORT_PRODUCTIONLINE
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x180
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (USERNAMEPASSWD_RA_SIZE+USERNAMEPASSWD_RA_OFFSET)
|
|
#else
|
|
#define PROLINE_CWMPPARA_RA_SIZE 0x0
|
|
#define PROLINE_CWMPPARA_RA_OFFSET (USERNAMEPASSWD_RA_SIZE+USERNAMEPASSWD_RA_OFFSET)
|
|
#endif
|
|
|
|
#define MRD_RA_SIZE 0x1000
|
|
#define MRD_RA_OFFSET (EEPROM_RA_OFFSET + 0x1000)
|
|
|
|
/*image boot flag*/
|
|
#define IMG_BOOT_FLAG_SIZE 1
|
|
#define IMG_BOOT_FLAG_OFFSET (PROLINE_CWMPPARA_RA_SIZE+PROLINE_CWMPPARA_RA_OFFSET)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif
|
|
|
|
#ifdef TCSUPPORT_NAND_BADBLOCK_CHECK
|
|
/*syslog*/
|
|
#define SYSLOG_RA_SIZE 0x20000
|
|
#define SYSLOG_RA_OFFSET RESERVEAREA_BLOCK_BASE
|
|
|
|
/*backupromfile*/
|
|
#define BACKUPROMFILE_RA_SIZE 0x20000
|
|
#define BACKUPROMFILE_RA_OFFSET (SYSLOG_RA_OFFSET + SYSLOG_RA_SIZE * 11)
|
|
|
|
/*eeprom*/
|
|
#define EEPROM_RA_SIZE 0x400
|
|
#define EEPROM_RA_OFFSET (BACKUPROMFILE_RA_OFFSET + BACKUPROMFILE_RA_SIZE * 15)
|
|
#endif
|
|
|
|
#endif
|
|
#endif
|
|
#endif
|