767 lines
23 KiB
C
Executable File
767 lines
23 KiB
C
Executable File
/*
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* CS4270 ALSA SoC (ASoC) codec driver
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*
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* Author: Timur Tabi <timur@freescale.com>
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*
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* Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
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* under the terms of the GNU General Public License version 2. This
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* program is licensed "as is" without any warranty of any kind, whether
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* express or implied.
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*
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* This is an ASoC device driver for the Cirrus Logic CS4270 codec.
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*
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* Current features/limitations:
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*
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* - Software mode is supported. Stand-alone mode is not supported.
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* - Only I2C is supported, not SPI
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* - Support for master and slave mode
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* - The machine driver's 'startup' function must call
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* cs4270_set_dai_sysclk() with the value of MCLK.
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* - Only I2S and left-justified modes are supported
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* - Power management is supported
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <linux/i2c.h>
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#include <linux/delay.h>
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#include <linux/regulator/consumer.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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/*
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* The codec isn't really big-endian or little-endian, since the I2S
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* interface requires data to be sent serially with the MSbit first.
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* However, to support BE and LE I2S devices, we specify both here. That
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* way, ALSA will always match the bit patterns.
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*/
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#define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
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SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
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SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
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SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
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SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
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SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
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/* CS4270 registers addresses */
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#define CS4270_CHIPID 0x01 /* Chip ID */
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#define CS4270_PWRCTL 0x02 /* Power Control */
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#define CS4270_MODE 0x03 /* Mode Control */
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#define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
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#define CS4270_TRANS 0x05 /* Transition Control */
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#define CS4270_MUTE 0x06 /* Mute Control */
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#define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
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#define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
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#define CS4270_FIRSTREG 0x01
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#define CS4270_LASTREG 0x08
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#define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
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#define CS4270_I2C_INCR 0x80
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/* Bit masks for the CS4270 registers */
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#define CS4270_CHIPID_ID 0xF0
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#define CS4270_CHIPID_REV 0x0F
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#define CS4270_PWRCTL_FREEZE 0x80
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#define CS4270_PWRCTL_PDN_ADC 0x20
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#define CS4270_PWRCTL_PDN_DAC 0x02
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#define CS4270_PWRCTL_PDN 0x01
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#define CS4270_PWRCTL_PDN_ALL \
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(CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
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#define CS4270_MODE_SPEED_MASK 0x30
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#define CS4270_MODE_1X 0x00
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#define CS4270_MODE_2X 0x10
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#define CS4270_MODE_4X 0x20
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#define CS4270_MODE_SLAVE 0x30
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#define CS4270_MODE_DIV_MASK 0x0E
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#define CS4270_MODE_DIV1 0x00
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#define CS4270_MODE_DIV15 0x02
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#define CS4270_MODE_DIV2 0x04
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#define CS4270_MODE_DIV3 0x06
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#define CS4270_MODE_DIV4 0x08
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#define CS4270_MODE_POPGUARD 0x01
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#define CS4270_FORMAT_FREEZE_A 0x80
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#define CS4270_FORMAT_FREEZE_B 0x40
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#define CS4270_FORMAT_LOOPBACK 0x20
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#define CS4270_FORMAT_DAC_MASK 0x18
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#define CS4270_FORMAT_DAC_LJ 0x00
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#define CS4270_FORMAT_DAC_I2S 0x08
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#define CS4270_FORMAT_DAC_RJ16 0x18
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#define CS4270_FORMAT_DAC_RJ24 0x10
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#define CS4270_FORMAT_ADC_MASK 0x01
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#define CS4270_FORMAT_ADC_LJ 0x00
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#define CS4270_FORMAT_ADC_I2S 0x01
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#define CS4270_TRANS_ONE_VOL 0x80
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#define CS4270_TRANS_SOFT 0x40
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#define CS4270_TRANS_ZERO 0x20
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#define CS4270_TRANS_INV_ADC_A 0x08
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#define CS4270_TRANS_INV_ADC_B 0x10
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#define CS4270_TRANS_INV_DAC_A 0x02
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#define CS4270_TRANS_INV_DAC_B 0x04
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#define CS4270_TRANS_DEEMPH 0x01
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#define CS4270_MUTE_AUTO 0x20
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#define CS4270_MUTE_ADC_A 0x08
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#define CS4270_MUTE_ADC_B 0x10
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#define CS4270_MUTE_POLARITY 0x04
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#define CS4270_MUTE_DAC_A 0x01
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#define CS4270_MUTE_DAC_B 0x02
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/* Power-on default values for the registers
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*
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* This array contains the power-on default values of the registers, with the
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* exception of the "CHIPID" register (01h). The lower four bits of that
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* register contain the hardware revision, so it is treated as volatile.
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*/
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static const struct reg_default cs4270_reg_defaults[] = {
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{ 2, 0x00 },
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{ 3, 0x30 },
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{ 4, 0x00 },
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{ 5, 0x60 },
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{ 6, 0x20 },
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{ 7, 0x00 },
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{ 8, 0x00 },
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};
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static const char *supply_names[] = {
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"va", "vd", "vlc"
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};
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/* Private data for the CS4270 */
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struct cs4270_private {
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struct regmap *regmap;
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unsigned int mclk; /* Input frequency of the MCLK pin */
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unsigned int mode; /* The mode (I2S or left-justified) */
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unsigned int slave_mode;
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unsigned int manual_mute;
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/* power domain regulators */
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struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
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};
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static const struct snd_soc_dapm_widget cs4270_dapm_widgets[] = {
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SND_SOC_DAPM_INPUT("AINL"),
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SND_SOC_DAPM_INPUT("AINR"),
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SND_SOC_DAPM_OUTPUT("AOUTL"),
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SND_SOC_DAPM_OUTPUT("AOUTR"),
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};
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static const struct snd_soc_dapm_route cs4270_dapm_routes[] = {
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{ "Capture", NULL, "AINA" },
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{ "Capture", NULL, "AINB" },
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{ "AOUTA", NULL, "Playback" },
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{ "AOUTB", NULL, "Playback" },
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};
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/**
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* struct cs4270_mode_ratios - clock ratio tables
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* @ratio: the ratio of MCLK to the sample rate
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* @speed_mode: the Speed Mode bits to set in the Mode Control register for
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* this ratio
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* @mclk: the Ratio Select bits to set in the Mode Control register for this
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* ratio
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*
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* The data for this chart is taken from Table 5 of the CS4270 reference
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* manual.
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*
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* This table is used to determine how to program the Mode Control register.
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* It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
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* rates the CS4270 currently supports.
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*
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* @speed_mode is the corresponding bit pattern to be written to the
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* MODE bits of the Mode Control Register
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*
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* @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
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* the Mode Control Register.
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*
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* In situations where a single ratio is represented by multiple speed
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* modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
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* double-speed instead of quad-speed. However, the CS4270 errata states
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* that divide-By-1.5 can cause failures, so we avoid that mode where
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* possible.
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*
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* Errata: There is an errata for the CS4270 where divide-by-1.5 does not
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* work if Vd is 3.3V. If this effects you, select the
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* CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
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* never select any sample rates that require divide-by-1.5.
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*/
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struct cs4270_mode_ratios {
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unsigned int ratio;
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u8 speed_mode;
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u8 mclk;
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};
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static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
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{64, CS4270_MODE_4X, CS4270_MODE_DIV1},
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#ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
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{96, CS4270_MODE_4X, CS4270_MODE_DIV15},
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#endif
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{128, CS4270_MODE_2X, CS4270_MODE_DIV1},
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{192, CS4270_MODE_4X, CS4270_MODE_DIV3},
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{256, CS4270_MODE_1X, CS4270_MODE_DIV1},
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{384, CS4270_MODE_2X, CS4270_MODE_DIV3},
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{512, CS4270_MODE_1X, CS4270_MODE_DIV2},
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{768, CS4270_MODE_1X, CS4270_MODE_DIV3},
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{1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
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};
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/* The number of MCLK/LRCK ratios supported by the CS4270 */
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#define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
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static bool cs4270_reg_is_readable(struct device *dev, unsigned int reg)
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{
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return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);
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}
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static bool cs4270_reg_is_volatile(struct device *dev, unsigned int reg)
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{
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/* Unreadable registers are considered volatile */
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if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
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return 1;
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return reg == CS4270_CHIPID;
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}
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/**
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* cs4270_set_dai_sysclk - determine the CS4270 samples rates.
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* @codec_dai: the codec DAI
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* @clk_id: the clock ID (ignored)
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* @freq: the MCLK input frequency
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* @dir: the clock direction (ignored)
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*
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* This function is used to tell the codec driver what the input MCLK
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* frequency is.
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*
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* The value of MCLK is used to determine which sample rates are supported
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* by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
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* supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
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*
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* This function calculates the nine ratios and determines which ones match
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* a standard sample rate. If there's a match, then it is added to the list
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* of supported sample rates.
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*
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* This function must be called by the machine driver's 'startup' function,
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* otherwise the list of supported sample rates will not be available in
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* time for ALSA.
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*
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* For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
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* theoretically possible sample rates to be enabled. Call it again with a
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* proper value set one the external clock is set (most probably you would do
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* that from a machine's driver 'hw_param' hook.
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*/
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static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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cs4270->mclk = freq;
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return 0;
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}
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/**
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* cs4270_set_dai_fmt - configure the codec for the selected audio format
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* @codec_dai: the codec DAI
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* @format: a SND_SOC_DAIFMT_x value indicating the data format
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*
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* This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
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* codec accordingly.
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*
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* Currently, this function only supports SND_SOC_DAIFMT_I2S and
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* SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
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* data for playback only, but ASoC currently does not support different
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* formats for playback vs. record.
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*/
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static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
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unsigned int format)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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/* set DAI format */
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switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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case SND_SOC_DAIFMT_LEFT_J:
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cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
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break;
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default:
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dev_err(codec->dev, "invalid dai format\n");
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return -EINVAL;
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}
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/* set master/slave audio interface */
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switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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cs4270->slave_mode = 1;
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break;
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case SND_SOC_DAIFMT_CBM_CFM:
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cs4270->slave_mode = 0;
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break;
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default:
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/* all other modes are unsupported by the hardware */
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dev_err(codec->dev, "Unknown master/slave configuration\n");
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return -EINVAL;
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}
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return 0;
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}
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/**
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* cs4270_hw_params - program the CS4270 with the given hardware parameters.
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* @substream: the audio stream
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* @params: the hardware parameters to set
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* @dai: the SOC DAI (ignored)
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*
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* This function programs the hardware with the values provided.
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* Specifically, the sample rate and the data format.
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*
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* The .ops functions are used to provide board-specific data, like input
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* frequencies, to this driver. This function takes that information,
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* combines it with the hardware parameters provided, and programs the
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* hardware accordingly.
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*/
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static int cs4270_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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int ret;
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unsigned int i;
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unsigned int rate;
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unsigned int ratio;
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int reg;
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/* Figure out which MCLK/LRCK ratio to use */
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rate = params_rate(params); /* Sampling rate, in Hz */
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ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
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for (i = 0; i < NUM_MCLK_RATIOS; i++) {
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if (cs4270_mode_ratios[i].ratio == ratio)
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break;
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}
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if (i == NUM_MCLK_RATIOS) {
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/* We did not find a matching ratio */
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dev_err(codec->dev, "could not find matching ratio\n");
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return -EINVAL;
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}
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/* Set the sample rate */
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reg = snd_soc_read(codec, CS4270_MODE);
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reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
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reg |= cs4270_mode_ratios[i].mclk;
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if (cs4270->slave_mode)
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reg |= CS4270_MODE_SLAVE;
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else
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reg |= cs4270_mode_ratios[i].speed_mode;
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ret = snd_soc_write(codec, CS4270_MODE, reg);
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if (ret < 0) {
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dev_err(codec->dev, "i2c write failed\n");
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return ret;
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}
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/* Set the DAI format */
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reg = snd_soc_read(codec, CS4270_FORMAT);
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reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
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switch (cs4270->mode) {
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case SND_SOC_DAIFMT_I2S:
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reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
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break;
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default:
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dev_err(codec->dev, "unknown dai format\n");
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return -EINVAL;
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}
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ret = snd_soc_write(codec, CS4270_FORMAT, reg);
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if (ret < 0) {
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dev_err(codec->dev, "i2c write failed\n");
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return ret;
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}
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return ret;
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}
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/**
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* cs4270_dai_mute - enable/disable the CS4270 external mute
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* @dai: the SOC DAI
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* @mute: 0 = disable mute, 1 = enable mute
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*
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* This function toggles the mute bits in the MUTE register. The CS4270's
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* mute capability is intended for external muting circuitry, so if the
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* board does not have the MUTEA or MUTEB pins connected to such circuitry,
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* then this function will do nothing.
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*/
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static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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int reg6;
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reg6 = snd_soc_read(codec, CS4270_MUTE);
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if (mute)
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reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
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else {
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reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
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reg6 |= cs4270->manual_mute;
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}
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return snd_soc_write(codec, CS4270_MUTE, reg6);
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}
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/**
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* cs4270_soc_put_mute - put callback for the 'Master Playback switch'
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* alsa control.
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* @kcontrol: mixer control
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* @ucontrol: control element information
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*
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* This function basically passes the arguments on to the generic
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* snd_soc_put_volsw() function and saves the mute information in
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* our private data structure. This is because we want to prevent
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* cs4270_dai_mute() neglecting the user's decision to manually
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* mute the codec's output.
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*
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* Returns 0 for success.
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*/
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static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
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struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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int left = !ucontrol->value.integer.value[0];
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int right = !ucontrol->value.integer.value[1];
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cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
|
|
(right ? CS4270_MUTE_DAC_B : 0);
|
|
|
|
return snd_soc_put_volsw(kcontrol, ucontrol);
|
|
}
|
|
|
|
/* A list of non-DAPM controls that the CS4270 supports */
|
|
static const struct snd_kcontrol_new cs4270_snd_controls[] = {
|
|
SOC_DOUBLE_R("Master Playback Volume",
|
|
CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
|
|
SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
|
|
SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
|
|
SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
|
|
SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
|
|
SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
|
|
SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
|
|
SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
|
|
SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
|
|
snd_soc_get_volsw, cs4270_soc_put_mute),
|
|
};
|
|
|
|
static const struct snd_soc_dai_ops cs4270_dai_ops = {
|
|
.hw_params = cs4270_hw_params,
|
|
.set_sysclk = cs4270_set_dai_sysclk,
|
|
.set_fmt = cs4270_set_dai_fmt,
|
|
.digital_mute = cs4270_dai_mute,
|
|
};
|
|
|
|
static struct snd_soc_dai_driver cs4270_dai = {
|
|
.name = "cs4270-hifi",
|
|
.playback = {
|
|
.stream_name = "Playback",
|
|
.channels_min = 2,
|
|
.channels_max = 2,
|
|
.rates = SNDRV_PCM_RATE_CONTINUOUS,
|
|
.rate_min = 4000,
|
|
.rate_max = 216000,
|
|
.formats = CS4270_FORMATS,
|
|
},
|
|
.capture = {
|
|
.stream_name = "Capture",
|
|
.channels_min = 2,
|
|
.channels_max = 2,
|
|
.rates = SNDRV_PCM_RATE_CONTINUOUS,
|
|
.rate_min = 4000,
|
|
.rate_max = 216000,
|
|
.formats = CS4270_FORMATS,
|
|
},
|
|
.ops = &cs4270_dai_ops,
|
|
};
|
|
|
|
/**
|
|
* cs4270_probe - ASoC probe function
|
|
* @pdev: platform device
|
|
*
|
|
* This function is called when ASoC has all the pieces it needs to
|
|
* instantiate a sound driver.
|
|
*/
|
|
static int cs4270_probe(struct snd_soc_codec *codec)
|
|
{
|
|
struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
|
|
int ret;
|
|
|
|
/* Disable auto-mute. This feature appears to be buggy. In some
|
|
* situations, auto-mute will not deactivate when it should, so we want
|
|
* this feature disabled by default. An application (e.g. alsactl) can
|
|
* re-enabled it by using the controls.
|
|
*/
|
|
ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0);
|
|
if (ret < 0) {
|
|
dev_err(codec->dev, "i2c write failed\n");
|
|
return ret;
|
|
}
|
|
|
|
/* Disable automatic volume control. The hardware enables, and it
|
|
* causes volume change commands to be delayed, sometimes until after
|
|
* playback has started. An application (e.g. alsactl) can
|
|
* re-enabled it by using the controls.
|
|
*/
|
|
ret = snd_soc_update_bits(codec, CS4270_TRANS,
|
|
CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);
|
|
if (ret < 0) {
|
|
dev_err(codec->dev, "i2c write failed\n");
|
|
return ret;
|
|
}
|
|
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
|
|
cs4270->supplies);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* cs4270_remove - ASoC remove function
|
|
* @pdev: platform device
|
|
*
|
|
* This function is the counterpart to cs4270_probe().
|
|
*/
|
|
static int cs4270_remove(struct snd_soc_codec *codec)
|
|
{
|
|
struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
|
|
|
|
return 0;
|
|
};
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
/* This suspend/resume implementation can handle both - a simple standby
|
|
* where the codec remains powered, and a full suspend, where the voltage
|
|
* domain the codec is connected to is teared down and/or any other hardware
|
|
* reset condition is asserted.
|
|
*
|
|
* The codec's own power saving features are enabled in the suspend callback,
|
|
* and all registers are written back to the hardware when resuming.
|
|
*/
|
|
|
|
static int cs4270_soc_suspend(struct snd_soc_codec *codec)
|
|
{
|
|
struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
|
|
int reg, ret;
|
|
|
|
reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
|
|
if (reg < 0)
|
|
return reg;
|
|
|
|
ret = snd_soc_write(codec, CS4270_PWRCTL, reg);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
|
|
cs4270->supplies);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cs4270_soc_resume(struct snd_soc_codec *codec)
|
|
{
|
|
struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
|
|
int reg, ret;
|
|
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
|
|
cs4270->supplies);
|
|
if (ret != 0)
|
|
return ret;
|
|
|
|
/* In case the device was put to hard reset during sleep, we need to
|
|
* wait 500ns here before any I2C communication. */
|
|
ndelay(500);
|
|
|
|
/* first restore the entire register cache ... */
|
|
regcache_sync(cs4270->regmap);
|
|
|
|
/* ... then disable the power-down bits */
|
|
reg = snd_soc_read(codec, CS4270_PWRCTL);
|
|
reg &= ~CS4270_PWRCTL_PDN_ALL;
|
|
|
|
return snd_soc_write(codec, CS4270_PWRCTL, reg);
|
|
}
|
|
#else
|
|
#define cs4270_soc_suspend NULL
|
|
#define cs4270_soc_resume NULL
|
|
#endif /* CONFIG_PM */
|
|
|
|
/*
|
|
* ASoC codec driver structure
|
|
*/
|
|
static const struct snd_soc_codec_driver soc_codec_device_cs4270 = {
|
|
.probe = cs4270_probe,
|
|
.remove = cs4270_remove,
|
|
.suspend = cs4270_soc_suspend,
|
|
.resume = cs4270_soc_resume,
|
|
|
|
.controls = cs4270_snd_controls,
|
|
.num_controls = ARRAY_SIZE(cs4270_snd_controls),
|
|
.dapm_widgets = cs4270_dapm_widgets,
|
|
.num_dapm_widgets = ARRAY_SIZE(cs4270_dapm_widgets),
|
|
.dapm_routes = cs4270_dapm_routes,
|
|
.num_dapm_routes = ARRAY_SIZE(cs4270_dapm_routes),
|
|
};
|
|
|
|
/*
|
|
* cs4270_of_match - the device tree bindings
|
|
*/
|
|
static const struct of_device_id cs4270_of_match[] = {
|
|
{ .compatible = "cirrus,cs4270", },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, cs4270_of_match);
|
|
|
|
static const struct regmap_config cs4270_regmap = {
|
|
.reg_bits = 8,
|
|
.val_bits = 8,
|
|
.max_register = CS4270_LASTREG,
|
|
.reg_defaults = cs4270_reg_defaults,
|
|
.num_reg_defaults = ARRAY_SIZE(cs4270_reg_defaults),
|
|
.cache_type = REGCACHE_RBTREE,
|
|
|
|
.readable_reg = cs4270_reg_is_readable,
|
|
.volatile_reg = cs4270_reg_is_volatile,
|
|
};
|
|
|
|
/**
|
|
* cs4270_i2c_probe - initialize the I2C interface of the CS4270
|
|
* @i2c_client: the I2C client object
|
|
* @id: the I2C device ID (ignored)
|
|
*
|
|
* This function is called whenever the I2C subsystem finds a device that
|
|
* matches the device ID given via a prior call to i2c_add_driver().
|
|
*/
|
|
static int cs4270_i2c_probe(struct i2c_client *i2c_client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct device_node *np = i2c_client->dev.of_node;
|
|
struct cs4270_private *cs4270;
|
|
unsigned int val;
|
|
int ret, i;
|
|
|
|
cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private),
|
|
GFP_KERNEL);
|
|
if (!cs4270)
|
|
return -ENOMEM;
|
|
|
|
/* get the power supply regulators */
|
|
for (i = 0; i < ARRAY_SIZE(supply_names); i++)
|
|
cs4270->supplies[i].supply = supply_names[i];
|
|
|
|
ret = devm_regulator_bulk_get(&i2c_client->dev,
|
|
ARRAY_SIZE(cs4270->supplies),
|
|
cs4270->supplies);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* See if we have a way to bring the codec out of reset */
|
|
if (np) {
|
|
enum of_gpio_flags flags;
|
|
int gpio = of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
|
|
|
|
if (gpio_is_valid(gpio)) {
|
|
ret = devm_gpio_request_one(&i2c_client->dev, gpio,
|
|
flags & OF_GPIO_ACTIVE_LOW ?
|
|
GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH,
|
|
"cs4270 reset");
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
cs4270->regmap = devm_regmap_init_i2c(i2c_client, &cs4270_regmap);
|
|
if (IS_ERR(cs4270->regmap))
|
|
return PTR_ERR(cs4270->regmap);
|
|
|
|
/* Verify that we have a CS4270 */
|
|
ret = regmap_read(cs4270->regmap, CS4270_CHIPID, &val);
|
|
if (ret < 0) {
|
|
dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
|
|
i2c_client->addr);
|
|
return ret;
|
|
}
|
|
/* The top four bits of the chip ID should be 1100. */
|
|
if ((val & 0xF0) != 0xC0) {
|
|
dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
|
|
i2c_client->addr);
|
|
return -ENODEV;
|
|
}
|
|
|
|
dev_info(&i2c_client->dev, "found device at i2c address %X\n",
|
|
i2c_client->addr);
|
|
dev_info(&i2c_client->dev, "hardware revision %X\n", val & 0xF);
|
|
|
|
i2c_set_clientdata(i2c_client, cs4270);
|
|
|
|
ret = snd_soc_register_codec(&i2c_client->dev,
|
|
&soc_codec_device_cs4270, &cs4270_dai, 1);
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* cs4270_i2c_remove - remove an I2C device
|
|
* @i2c_client: the I2C client object
|
|
*
|
|
* This function is the counterpart to cs4270_i2c_probe().
|
|
*/
|
|
static int cs4270_i2c_remove(struct i2c_client *i2c_client)
|
|
{
|
|
snd_soc_unregister_codec(&i2c_client->dev);
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* cs4270_id - I2C device IDs supported by this driver
|
|
*/
|
|
static const struct i2c_device_id cs4270_id[] = {
|
|
{"cs4270", 0},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, cs4270_id);
|
|
|
|
/*
|
|
* cs4270_i2c_driver - I2C device identification
|
|
*
|
|
* This structure tells the I2C subsystem how to identify and support a
|
|
* given I2C device type.
|
|
*/
|
|
static struct i2c_driver cs4270_i2c_driver = {
|
|
.driver = {
|
|
.name = "cs4270",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = cs4270_of_match,
|
|
},
|
|
.id_table = cs4270_id,
|
|
.probe = cs4270_i2c_probe,
|
|
.remove = cs4270_i2c_remove,
|
|
};
|
|
|
|
module_i2c_driver(cs4270_i2c_driver);
|
|
|
|
MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
|
|
MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
|
|
MODULE_LICENSE("GPL");
|