1473 lines
22 KiB
ArmAsm
Executable File
1473 lines
22 KiB
ArmAsm
Executable File
.file 1 "i2c.c"
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.section .mdebug.abi32
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.previous
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.nan legacy
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.gnu_attribute 4, 3
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.local i2cMasterBaseAddr
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.comm i2cMasterBaseAddr,4,4
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.text
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.align 2
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.globl ioWritePhyReg8
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.set nomips16
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.set nomicromips
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.ent ioWritePhyReg8
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.type ioWritePhyReg8, @function
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ioWritePhyReg8:
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.frame $sp,32,$31 # vars= 8, regs= 1/0, args= 16, gp= 0
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.mask 0x80000000,-4
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.fmask 0x00000000,0
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.set noreorder
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.set nomacro
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addiu $sp,$sp,-32
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sw $31,28($sp)
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move $3,$4
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move $2,$5
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sh $3,32($sp)
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sb $2,36($sp)
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lhu $2,32($sp)
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srl $2,$2,8
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andi $2,$2,0xffff
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andi $2,$2,0x00ff
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sb $2,16($sp)
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lhu $2,32($sp)
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andi $2,$2,0x00ff
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sb $2,17($sp)
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lbu $2,36($sp)
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sb $2,18($sp)
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li $4,96 # 0x60
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li $5,3 # 0x3
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addiu $2,$sp,16
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move $6,$2
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lui $2,%hi(i2c_write_data)
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addiu $2,$2,%lo(i2c_write_data)
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jalr $2
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nop
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lw $31,28($sp)
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addiu $sp,$sp,32
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j $31
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nop
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.set macro
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.set reorder
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.end ioWritePhyReg8
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.size ioWritePhyReg8, .-ioWritePhyReg8
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.align 2
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.globl ioReadPhyReg32
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.set nomips16
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.set nomicromips
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.ent ioReadPhyReg32
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.type ioReadPhyReg32, @function
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ioReadPhyReg32:
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.frame $sp,40,$31 # vars= 16, regs= 1/0, args= 16, gp= 0
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.mask 0x80000000,-4
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.fmask 0x00000000,0
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.set noreorder
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.set nomacro
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addiu $sp,$sp,-40
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sw $31,36($sp)
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move $2,$4
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sh $2,40($sp)
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sw $0,16($sp)
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lhu $2,40($sp)
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srl $2,$2,8
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andi $2,$2,0xffff
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andi $2,$2,0x00ff
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sb $2,28($sp)
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lhu $2,40($sp)
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andi $2,$2,0x00ff
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sb $2,29($sp)
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addiu $2,$sp,28
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li $4,96 # 0x60
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li $5,2 # 0x2
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li $6,4 # 0x4
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move $7,$2
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lui $2,%hi(i2c_write_read_data)
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addiu $2,$2,%lo(i2c_write_read_data)
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jalr $2
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nop
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sw $2,24($sp)
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lw $2,24($sp)
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bne $2,$0,$L4
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nop
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sw $0,20($sp)
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j $L5
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nop
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$L6:
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lw $2,20($sp)
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addiu $3,$sp,16
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addu $2,$3,$2
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lbu $2,12($2)
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move $3,$2
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lw $2,20($sp)
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sll $2,$2,3
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sll $2,$3,$2
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move $3,$2
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lw $2,16($sp)
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or $2,$2,$3
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sw $2,16($sp)
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lw $2,20($sp)
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addiu $2,$2,1
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sw $2,20($sp)
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$L5:
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lw $2,20($sp)
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slt $2,$2,4
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bne $2,$0,$L6
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nop
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$L4:
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lw $2,16($sp)
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lw $31,36($sp)
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addiu $sp,$sp,40
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j $31
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nop
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.set macro
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.set reorder
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.end ioReadPhyReg32
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.size ioReadPhyReg32, .-ioReadPhyReg32
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.align 2
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.globl ioWritePhyReg32
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.set nomips16
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.set nomicromips
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.ent ioWritePhyReg32
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.type ioWritePhyReg32, @function
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ioWritePhyReg32:
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.frame $sp,40,$31 # vars= 16, regs= 1/0, args= 16, gp= 0
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.mask 0x80000000,-4
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.fmask 0x00000000,0
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.set noreorder
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.set nomacro
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addiu $sp,$sp,-40
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sw $31,36($sp)
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move $2,$4
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sw $5,44($sp)
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sh $2,40($sp)
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lhu $2,40($sp)
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srl $2,$2,8
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andi $2,$2,0xffff
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andi $2,$2,0x00ff
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sb $2,20($sp)
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lhu $2,40($sp)
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andi $2,$2,0x00ff
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sb $2,21($sp)
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sw $0,16($sp)
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j $L9
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nop
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$L10:
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lw $2,16($sp)
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addiu $2,$2,2
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lw $3,16($sp)
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sll $3,$3,3
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lw $4,44($sp)
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srl $3,$4,$3
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andi $3,$3,0x00ff
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addiu $4,$sp,16
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addu $2,$4,$2
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sb $3,4($2)
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lw $2,16($sp)
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addiu $2,$2,1
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sw $2,16($sp)
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$L9:
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lw $2,16($sp)
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slt $2,$2,4
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bne $2,$0,$L10
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nop
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addiu $2,$sp,20
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li $4,96 # 0x60
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li $5,6 # 0x6
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move $6,$2
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lui $2,%hi(i2c_write_data)
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addiu $2,$2,%lo(i2c_write_data)
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jalr $2
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nop
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lw $31,36($sp)
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addiu $sp,$sp,40
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j $31
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nop
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.set macro
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.set reorder
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.end ioWritePhyReg32
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.size ioWritePhyReg32, .-ioWritePhyReg32
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.rdata
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.align 2
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$LC0:
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.ascii "CSR: 0004 Slave Address Register: \011\011%.4x\012\000"
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.align 2
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$LC1:
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.ascii "CSR: 0010 Control Register: \011\011\011%.4x\012\000"
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.align 2
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$LC2:
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.ascii "CSR: 0014 Transfer Length Register: \011%.4x\012\000"
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.align 2
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$LC3:
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.ascii "CSR: 0018 Translation Length Register: \011%.4x\012\000"
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.align 2
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$LC4:
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.ascii "CSR: 001C Delay Register: \011\011\011\011%.4x\012\000"
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.align 2
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$LC5:
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.ascii "CSR: 0020 Timeing Control Register: \011%.4x\012\000"
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.align 2
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$LC6:
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.ascii "CSR: 0030 FIFO Status Register: \011\011%.4x\012\000"
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.align 2
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$LC7:
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.ascii "CSR: 0040 IO Config Register:\011\011\011%.4x\012\000"
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.align 2
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$LC8:
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.ascii "CSR: 0048 High Speed Mode Register:\011\011%.4x\012\000"
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.align 2
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$LC9:
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.ascii "CSR: 0064 Debug Status Register:\011\011%.4x\012\000"
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.align 2
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$LC10:
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.ascii "CSR: 0064 Debug Control Register:\011\011%.4x\012\000"
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.text
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.align 2
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.set nomips16
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.set nomicromips
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.ent __print_csr
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.type __print_csr, @function
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__print_csr:
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.frame $sp,32,$31 # vars= 8, regs= 1/0, args= 16, gp= 0
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.mask 0x80000000,-4
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.fmask 0x00000000,0
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.set noreorder
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.set nomacro
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addiu $sp,$sp,-32
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sw $31,28($sp)
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lui $2,%hi(i2cMasterBaseAddr)
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lw $2,%lo(i2cMasterBaseAddr)($2)
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sw $2,16($sp)
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lw $2,16($sp)
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addiu $2,$2,4
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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nop
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move $3,$2
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lui $2,%hi($LC0)
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addiu $4,$2,%lo($LC0)
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move $5,$3
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lui $2,%hi(printk)
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addiu $2,$2,%lo(printk)
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jalr $2
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nop
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lw $2,16($sp)
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addiu $2,$2,16
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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nop
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move $3,$2
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lui $2,%hi($LC1)
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addiu $4,$2,%lo($LC1)
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move $5,$3
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lui $2,%hi(printk)
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addiu $2,$2,%lo(printk)
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jalr $2
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nop
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lw $2,16($sp)
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addiu $2,$2,20
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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nop
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move $3,$2
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lui $2,%hi($LC2)
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addiu $4,$2,%lo($LC2)
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move $5,$3
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lui $2,%hi(printk)
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addiu $2,$2,%lo(printk)
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jalr $2
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nop
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lw $2,16($sp)
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addiu $2,$2,24
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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nop
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move $3,$2
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lui $2,%hi($LC3)
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addiu $4,$2,%lo($LC3)
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move $5,$3
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lui $2,%hi(printk)
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addiu $2,$2,%lo(printk)
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jalr $2
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nop
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lw $2,16($sp)
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addiu $2,$2,28
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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nop
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move $3,$2
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lui $2,%hi($LC4)
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addiu $4,$2,%lo($LC4)
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move $5,$3
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lui $2,%hi(printk)
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addiu $2,$2,%lo(printk)
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jalr $2
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nop
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lw $2,16($sp)
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addiu $2,$2,32
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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nop
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move $3,$2
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lui $2,%hi($LC5)
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addiu $4,$2,%lo($LC5)
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move $5,$3
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lui $2,%hi(printk)
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addiu $2,$2,%lo(printk)
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jalr $2
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nop
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lw $2,16($sp)
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addiu $2,$2,48
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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nop
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move $3,$2
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lui $2,%hi($LC6)
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addiu $4,$2,%lo($LC6)
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move $5,$3
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lui $2,%hi(printk)
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addiu $2,$2,%lo(printk)
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jalr $2
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nop
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lw $2,16($sp)
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addiu $2,$2,64
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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nop
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move $3,$2
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lui $2,%hi($LC7)
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addiu $4,$2,%lo($LC7)
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move $5,$3
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lui $2,%hi(printk)
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addiu $2,$2,%lo(printk)
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jalr $2
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nop
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lw $2,16($sp)
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addiu $2,$2,72
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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nop
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move $3,$2
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lui $2,%hi($LC8)
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addiu $4,$2,%lo($LC8)
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move $5,$3
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lui $2,%hi(printk)
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addiu $2,$2,%lo(printk)
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jalr $2
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nop
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lw $2,16($sp)
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addiu $2,$2,100
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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nop
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move $3,$2
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lui $2,%hi($LC9)
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addiu $4,$2,%lo($LC9)
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move $5,$3
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lui $2,%hi(printk)
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addiu $2,$2,%lo(printk)
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jalr $2
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nop
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lw $2,16($sp)
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addiu $2,$2,104
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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nop
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move $3,$2
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lui $2,%hi($LC10)
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addiu $4,$2,%lo($LC10)
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move $5,$3
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lui $2,%hi(printk)
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addiu $2,$2,%lo(printk)
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jalr $2
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nop
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move $2,$0
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lw $31,28($sp)
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addiu $sp,$sp,32
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j $31
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nop
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.set macro
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.set reorder
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.end __print_csr
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.size __print_csr, .-__print_csr
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.align 2
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.set nomips16
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.set nomicromips
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.ent i2c_write_read_data
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.type i2c_write_read_data, @function
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i2c_write_read_data:
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.frame $sp,56,$31 # vars= 32, regs= 2/0, args= 16, gp= 0
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.mask 0x80010000,-4
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.fmask 0x00000000,0
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addiu $sp,$sp,-56
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sw $31,52($sp)
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sw $16,48($sp)
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move $2,$4
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sw $5,60($sp)
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sw $6,64($sp)
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sw $7,68($sp)
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sb $2,56($sp)
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lui $2,%hi(i2cMasterBaseAddr)
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lw $2,%lo(i2cMasterBaseAddr)($2)
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sw $2,28($sp)
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sw $0,16($sp)
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li $2,65535 # 0xffff
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sw $2,24($sp)
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lbu $2,56($sp)
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sll $2,$2,1
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sb $2,56($sp)
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lbu $3,56($sp)
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lw $2,28($sp)
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addiu $2,$2,4
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move $4,$3
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move $5,$2
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lui $2,%hi(iowrite32)
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addiu $2,$2,%lo(iowrite32)
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jalr $2
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lw $2,28($sp)
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addiu $2,$2,20
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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move $3,$2
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li $2,-7937 # 0xffffffffffffe0ff
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and $2,$3,$2
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sw $2,32($sp)
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lw $2,64($sp)
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sll $2,$2,8
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andi $2,$2,0x1f00
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lw $3,32($sp)
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or $2,$3,$2
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sw $2,32($sp)
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lw $2,28($sp)
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addiu $2,$2,20
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lw $4,32($sp)
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move $5,$2
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lui $2,%hi(iowrite32)
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addiu $2,$2,%lo(iowrite32)
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jalr $2
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lw $2,28($sp)
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addiu $2,$2,20
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move $4,$2
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lui $2,%hi(ioread32)
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addiu $2,$2,%lo(ioread32)
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jalr $2
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move $3,$2
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li $2,-256 # 0xffffffffffffff00
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and $2,$3,$2
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sw $2,36($sp)
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lw $2,60($sp)
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andi $2,$2,0xff
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lw $3,36($sp)
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or $2,$3,$2
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sw $2,36($sp)
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lw $2,28($sp)
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addiu $2,$2,20
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lw $4,36($sp)
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move $5,$2
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lui $2,%hi(iowrite32)
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addiu $2,$2,%lo(iowrite32)
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jalr $2
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lw $2,28($sp)
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addiu $2,$2,24
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|
li $4,2 # 0x2
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move $5,$2
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lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
lw $2,28($sp)
|
|
addiu $2,$2,56
|
|
li $4,1 # 0x1
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
lw $2,28($sp)
|
|
addiu $2,$2,16
|
|
move $4,$2
|
|
lui $2,%hi(ioread32)
|
|
addiu $2,$2,%lo(ioread32)
|
|
jalr $2
|
|
move $3,$2
|
|
li $2,-127 # 0xffffffffffffff81
|
|
and $2,$3,$2
|
|
sw $2,40($sp)
|
|
lw $2,40($sp)
|
|
ori $2,$2,0x3a
|
|
sw $2,40($sp)
|
|
lw $2,28($sp)
|
|
addiu $2,$2,16
|
|
lw $4,40($sp)
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
sw $0,20($sp)
|
|
j $L15
|
|
$L16:
|
|
lw $2,20($sp)
|
|
lw $3,68($sp)
|
|
addu $2,$3,$2
|
|
lbu $2,0($2)
|
|
move $3,$2
|
|
lw $2,28($sp)
|
|
move $4,$3
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
lw $2,20($sp)
|
|
addiu $2,$2,1
|
|
sw $2,20($sp)
|
|
$L15:
|
|
lw $3,20($sp)
|
|
lw $2,60($sp)
|
|
sltu $2,$3,$2
|
|
bne $2,$0,$L16
|
|
#APP
|
|
# 116 "/opt/bba/EN7526G_3.18Kernel_SDK/modules/private/xpon_phy/src/i2c.c" 1
|
|
.set push
|
|
.set noreorder
|
|
.set mips2
|
|
sync
|
|
.set pop
|
|
# 0 "" 2
|
|
#NO_APP
|
|
lw $2,28($sp)
|
|
addiu $2,$2,36
|
|
li $4,1 # 0x1
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
$L22:
|
|
lw $2,28($sp)
|
|
addiu $2,$2,12
|
|
move $4,$2
|
|
lui $2,%hi(ioread32)
|
|
addiu $2,$2,%lo(ioread32)
|
|
jalr $2
|
|
sh $2,44($sp)
|
|
lhu $2,44($sp)
|
|
andi $2,$2,0x1
|
|
beq $2,$0,$L17
|
|
j $L18
|
|
$L17:
|
|
lhu $2,44($sp)
|
|
andi $2,$2,0x4
|
|
beq $2,$0,$L19
|
|
li $2,-14 # 0xfffffffffffffff2
|
|
sw $2,16($sp)
|
|
j $L18
|
|
$L19:
|
|
lhu $2,44($sp)
|
|
andi $2,$2,0x2
|
|
beq $2,$0,$L20
|
|
li $2,-14 # 0xfffffffffffffff2
|
|
sw $2,16($sp)
|
|
j $L18
|
|
$L20:
|
|
lw $2,24($sp)
|
|
bne $2,$0,$L21
|
|
li $2,-14 # 0xfffffffffffffff2
|
|
sw $2,16($sp)
|
|
j $L18
|
|
$L21:
|
|
lw $2,24($sp)
|
|
addiu $2,$2,-1
|
|
sw $2,24($sp)
|
|
j $L22
|
|
$L18:
|
|
lw $2,28($sp)
|
|
addiu $2,$2,12
|
|
li $4,7 # 0x7
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
lw $2,16($sp)
|
|
bne $2,$0,$L23
|
|
sw $0,20($sp)
|
|
j $L24
|
|
$L25:
|
|
lw $2,20($sp)
|
|
lw $3,68($sp)
|
|
addu $16,$3,$2
|
|
lw $2,28($sp)
|
|
move $4,$2
|
|
lui $2,%hi(ioread32)
|
|
addiu $2,$2,%lo(ioread32)
|
|
jalr $2
|
|
andi $2,$2,0x00ff
|
|
sb $2,0($16)
|
|
lw $2,20($sp)
|
|
addiu $2,$2,1
|
|
sw $2,20($sp)
|
|
$L24:
|
|
lw $2,20($sp)
|
|
slt $2,$2,4
|
|
bne $2,$0,$L25
|
|
$L23:
|
|
lw $2,16($sp)
|
|
lw $31,52($sp)
|
|
lw $16,48($sp)
|
|
addiu $sp,$sp,56
|
|
j $31
|
|
.end i2c_write_read_data
|
|
.size i2c_write_read_data, .-i2c_write_read_data
|
|
.align 2
|
|
.set nomips16
|
|
.set nomicromips
|
|
.ent i2c_write_data
|
|
.type i2c_write_data, @function
|
|
i2c_write_data:
|
|
.frame $sp,56,$31 # vars= 32, regs= 1/0, args= 16, gp= 0
|
|
.mask 0x80000000,-4
|
|
.fmask 0x00000000,0
|
|
addiu $sp,$sp,-56
|
|
sw $31,52($sp)
|
|
move $2,$4
|
|
sw $5,60($sp)
|
|
sw $6,64($sp)
|
|
sb $2,56($sp)
|
|
lui $2,%hi(i2cMasterBaseAddr)
|
|
lw $2,%lo(i2cMasterBaseAddr)($2)
|
|
sw $2,28($sp)
|
|
li $2,65535 # 0xffff
|
|
sw $2,24($sp)
|
|
lbu $2,56($sp)
|
|
sll $2,$2,1
|
|
sb $2,56($sp)
|
|
lbu $3,56($sp)
|
|
lw $2,28($sp)
|
|
addiu $2,$2,4
|
|
move $4,$3
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
lw $2,28($sp)
|
|
addiu $2,$2,20
|
|
move $4,$2
|
|
lui $2,%hi(ioread32)
|
|
addiu $2,$2,%lo(ioread32)
|
|
jalr $2
|
|
move $3,$2
|
|
li $2,-7937 # 0xffffffffffffe0ff
|
|
and $2,$3,$2
|
|
sw $2,32($sp)
|
|
lw $2,32($sp)
|
|
ori $2,$2,0x100
|
|
sw $2,32($sp)
|
|
lw $2,28($sp)
|
|
addiu $2,$2,20
|
|
lw $4,32($sp)
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
lw $2,28($sp)
|
|
addiu $2,$2,20
|
|
move $4,$2
|
|
lui $2,%hi(ioread32)
|
|
addiu $2,$2,%lo(ioread32)
|
|
jalr $2
|
|
move $3,$2
|
|
li $2,-256 # 0xffffffffffffff00
|
|
and $2,$3,$2
|
|
sw $2,36($sp)
|
|
lw $2,60($sp)
|
|
andi $2,$2,0xff
|
|
lw $3,36($sp)
|
|
or $2,$3,$2
|
|
sw $2,36($sp)
|
|
lw $2,28($sp)
|
|
addiu $2,$2,20
|
|
lw $4,36($sp)
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
lw $2,28($sp)
|
|
addiu $2,$2,24
|
|
li $4,1 # 0x1
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
lw $2,28($sp)
|
|
addiu $2,$2,56
|
|
li $4,1 # 0x1
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
lw $2,28($sp)
|
|
addiu $2,$2,16
|
|
move $4,$2
|
|
lui $2,%hi(ioread32)
|
|
addiu $2,$2,%lo(ioread32)
|
|
jalr $2
|
|
move $3,$2
|
|
li $2,-127 # 0xffffffffffffff81
|
|
and $2,$3,$2
|
|
sw $2,40($sp)
|
|
lw $2,40($sp)
|
|
ori $2,$2,0x28
|
|
sw $2,40($sp)
|
|
lw $2,28($sp)
|
|
addiu $2,$2,16
|
|
lw $4,40($sp)
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
sw $0,20($sp)
|
|
j $L28
|
|
$L29:
|
|
lw $2,20($sp)
|
|
lw $3,64($sp)
|
|
addu $2,$3,$2
|
|
lbu $2,0($2)
|
|
move $3,$2
|
|
lw $2,28($sp)
|
|
move $4,$3
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
lw $2,20($sp)
|
|
addiu $2,$2,1
|
|
sw $2,20($sp)
|
|
$L28:
|
|
lw $3,20($sp)
|
|
lw $2,60($sp)
|
|
sltu $2,$3,$2
|
|
bne $2,$0,$L29
|
|
#APP
|
|
# 173 "/opt/bba/EN7526G_3.18Kernel_SDK/modules/private/xpon_phy/src/i2c.c" 1
|
|
.set push
|
|
.set noreorder
|
|
.set mips2
|
|
sync
|
|
.set pop
|
|
# 0 "" 2
|
|
#NO_APP
|
|
lw $2,28($sp)
|
|
addiu $2,$2,36
|
|
li $4,1 # 0x1
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
$L35:
|
|
lw $2,28($sp)
|
|
addiu $2,$2,12
|
|
move $4,$2
|
|
lui $2,%hi(ioread32)
|
|
addiu $2,$2,%lo(ioread32)
|
|
jalr $2
|
|
sh $2,44($sp)
|
|
lhu $2,44($sp)
|
|
andi $2,$2,0x1
|
|
beq $2,$0,$L30
|
|
j $L31
|
|
$L30:
|
|
lhu $2,44($sp)
|
|
andi $2,$2,0x4
|
|
beq $2,$0,$L32
|
|
li $2,-14 # 0xfffffffffffffff2
|
|
sw $2,16($sp)
|
|
j $L31
|
|
$L32:
|
|
lhu $2,44($sp)
|
|
andi $2,$2,0x2
|
|
beq $2,$0,$L33
|
|
li $2,-14 # 0xfffffffffffffff2
|
|
sw $2,16($sp)
|
|
j $L31
|
|
$L33:
|
|
lw $2,24($sp)
|
|
bne $2,$0,$L34
|
|
li $2,-14 # 0xfffffffffffffff2
|
|
sw $2,16($sp)
|
|
j $L31
|
|
$L34:
|
|
lw $2,24($sp)
|
|
addiu $2,$2,-1
|
|
sw $2,24($sp)
|
|
j $L35
|
|
$L31:
|
|
lw $2,28($sp)
|
|
addiu $2,$2,12
|
|
li $4,7 # 0x7
|
|
move $5,$2
|
|
lui $2,%hi(iowrite32)
|
|
addiu $2,$2,%lo(iowrite32)
|
|
jalr $2
|
|
lw $2,16($sp)
|
|
lw $31,52($sp)
|
|
addiu $sp,$sp,56
|
|
j $31
|
|
.end i2c_write_data
|
|
.size i2c_write_data, .-i2c_write_data
|
|
.rdata
|
|
.align 2
|
|
$LC11:
|
|
.ascii "%s %x %x\000"
|
|
.align 2
|
|
$LC12:
|
|
.ascii "read\000"
|
|
.align 2
|
|
$LC13:
|
|
.ascii "Read REG:%.4x: %.8x\012\000"
|
|
.align 2
|
|
$LC14:
|
|
.ascii "write\000"
|
|
.align 2
|
|
$LC15:
|
|
.ascii "show\000"
|
|
.text
|
|
.align 2
|
|
.set nomips16
|
|
.set nomicromips
|
|
.ent i2c_write_proc
|
|
.type i2c_write_proc, @function
|
|
i2c_write_proc:
|
|
.frame $sp,208,$31 # vars= 176, regs= 2/0, args= 24, gp= 0
|
|
.mask 0x80010000,-4
|
|
.fmask 0x00000000,0
|
|
addiu $sp,$sp,-208
|
|
sw $31,204($sp)
|
|
sw $16,200($sp)
|
|
sw $4,208($sp)
|
|
sw $5,212($sp)
|
|
sw $6,216($sp)
|
|
sw $7,220($sp)
|
|
lw $2,216($sp)
|
|
sltu $2,$2,64
|
|
bne $2,$0,$L38
|
|
li $2,-22 # 0xffffffffffffffea
|
|
j $L51
|
|
$L38:
|
|
addiu $2,$sp,92
|
|
sw $2,28($sp)
|
|
lw $2,212($sp)
|
|
sw $2,32($sp)
|
|
lw $2,216($sp)
|
|
sw $2,24($sp)
|
|
move $2,$28
|
|
lw $3,24($2)
|
|
sw $0,88($sp)
|
|
lw $2,88($sp)
|
|
bne $3,$2,$L41
|
|
lw $4,28($sp)
|
|
lw $5,32($sp)
|
|
lw $6,24($sp)
|
|
#APP
|
|
# 208 "/opt/bba/EN7526G_3.18Kernel_SDK/modules/private/xpon_phy/src/i2c.c" 1
|
|
.set noreorder
|
|
.set noat
|
|
la $1, __copy_user
|
|
jalr $1
|
|
.set at
|
|
.set noat
|
|
addu $1, $5, $6
|
|
.set at
|
|
.set reorder
|
|
# 0 "" 2
|
|
#NO_APP
|
|
move $2,$6
|
|
sw $2,24($sp)
|
|
j $L42
|
|
$L41:
|
|
lw $2,32($sp)
|
|
sw $2,36($sp)
|
|
lw $2,24($sp)
|
|
sw $2,40($sp)
|
|
move $2,$28
|
|
lw $2,24($2)
|
|
sw $2,44($sp)
|
|
lw $3,36($sp)
|
|
lw $2,40($sp)
|
|
addu $3,$3,$2
|
|
lw $2,36($sp)
|
|
or $3,$3,$2
|
|
lw $2,40($sp)
|
|
or $3,$3,$2
|
|
lw $2,44($sp)
|
|
and $2,$3,$2
|
|
sw $2,48($sp)
|
|
lw $2,48($sp)
|
|
sltu $2,$2,1
|
|
andi $2,$2,0x00ff
|
|
sltu $2,$0,$2
|
|
andi $2,$2,0x00ff
|
|
beq $2,$0,$L42
|
|
lw $4,28($sp)
|
|
lw $5,32($sp)
|
|
lw $6,24($sp)
|
|
#APP
|
|
# 208 "/opt/bba/EN7526G_3.18Kernel_SDK/modules/private/xpon_phy/src/i2c.c" 1
|
|
.set noreorder
|
|
.set noat
|
|
la $1, __copy_user
|
|
jalr $1
|
|
.set at
|
|
.set noat
|
|
addu $1, $5, $6
|
|
.set at
|
|
.set reorder
|
|
# 0 "" 2
|
|
#NO_APP
|
|
move $2,$6
|
|
sw $2,24($sp)
|
|
$L42:
|
|
lw $2,24($sp)
|
|
beq $2,$0,$L44
|
|
li $2,-14 # 0xfffffffffffffff2
|
|
j $L51
|
|
$L44:
|
|
addiu $4,$sp,92
|
|
addiu $6,$sp,156
|
|
addiu $3,$sp,188
|
|
addiu $2,$sp,192
|
|
sw $2,16($sp)
|
|
lui $2,%hi($LC11)
|
|
addiu $5,$2,%lo($LC11)
|
|
move $7,$3
|
|
lui $2,%hi(sscanf)
|
|
addiu $2,$2,%lo(sscanf)
|
|
jalr $2
|
|
addiu $2,$sp,156
|
|
sw $2,52($sp)
|
|
lui $2,%hi($LC12)
|
|
addiu $2,$2,%lo($LC12)
|
|
sw $2,56($sp)
|
|
lw $3,52($sp)
|
|
lw $2,56($sp)
|
|
#APP
|
|
# 77 "./arch/mips/include/asm/string.h" 1
|
|
.set noreorder
|
|
.set noat
|
|
lbu $4,($3)
|
|
1: lbu $1,($2)
|
|
addiu $3,1
|
|
bne $1,$4,2f
|
|
addiu $2,1
|
|
bnez $4,1b
|
|
lbu $4,($3)
|
|
move $4,$1
|
|
2: subu $4,$1
|
|
3: .set at
|
|
.set reorder
|
|
# 0 "" 2
|
|
#NO_APP
|
|
sw $3,52($sp)
|
|
sw $2,56($sp)
|
|
sw $4,60($sp)
|
|
lw $2,60($sp)
|
|
bne $2,$0,$L46
|
|
lw $16,188($sp)
|
|
lw $2,188($sp)
|
|
andi $2,$2,0xffff
|
|
move $4,$2
|
|
lui $2,%hi(ioReadPhyReg32)
|
|
addiu $2,$2,%lo(ioReadPhyReg32)
|
|
jalr $2
|
|
move $3,$2
|
|
lui $2,%hi($LC13)
|
|
addiu $4,$2,%lo($LC13)
|
|
move $5,$16
|
|
move $6,$3
|
|
lui $2,%hi(printk)
|
|
addiu $2,$2,%lo(printk)
|
|
jalr $2
|
|
j $L47
|
|
$L46:
|
|
addiu $2,$sp,156
|
|
sw $2,64($sp)
|
|
lui $2,%hi($LC14)
|
|
addiu $2,$2,%lo($LC14)
|
|
sw $2,68($sp)
|
|
lw $3,64($sp)
|
|
lw $2,68($sp)
|
|
#APP
|
|
# 77 "./arch/mips/include/asm/string.h" 1
|
|
.set noreorder
|
|
.set noat
|
|
lbu $4,($3)
|
|
1: lbu $1,($2)
|
|
addiu $3,1
|
|
bne $1,$4,2f
|
|
addiu $2,1
|
|
bnez $4,1b
|
|
lbu $4,($3)
|
|
move $4,$1
|
|
2: subu $4,$1
|
|
3: .set at
|
|
.set reorder
|
|
# 0 "" 2
|
|
#NO_APP
|
|
sw $3,64($sp)
|
|
sw $2,68($sp)
|
|
sw $4,72($sp)
|
|
lw $2,72($sp)
|
|
bne $2,$0,$L49
|
|
lw $2,188($sp)
|
|
andi $2,$2,0xffff
|
|
move $3,$2
|
|
lw $2,192($sp)
|
|
move $4,$3
|
|
move $5,$2
|
|
lui $2,%hi(ioWritePhyReg32)
|
|
addiu $2,$2,%lo(ioWritePhyReg32)
|
|
jalr $2
|
|
j $L47
|
|
$L49:
|
|
addiu $2,$sp,156
|
|
sw $2,76($sp)
|
|
lui $2,%hi($LC15)
|
|
addiu $2,$2,%lo($LC15)
|
|
sw $2,80($sp)
|
|
lw $3,76($sp)
|
|
lw $2,80($sp)
|
|
#APP
|
|
# 77 "./arch/mips/include/asm/string.h" 1
|
|
.set noreorder
|
|
.set noat
|
|
lbu $4,($3)
|
|
1: lbu $1,($2)
|
|
addiu $3,1
|
|
bne $1,$4,2f
|
|
addiu $2,1
|
|
bnez $4,1b
|
|
lbu $4,($3)
|
|
move $4,$1
|
|
2: subu $4,$1
|
|
3: .set at
|
|
.set reorder
|
|
# 0 "" 2
|
|
#NO_APP
|
|
sw $3,76($sp)
|
|
sw $2,80($sp)
|
|
sw $4,84($sp)
|
|
lw $2,84($sp)
|
|
bne $2,$0,$L47
|
|
lui $2,%hi(__print_csr)
|
|
addiu $2,$2,%lo(__print_csr)
|
|
jalr $2
|
|
$L47:
|
|
lw $2,216($sp)
|
|
$L51:
|
|
lw $31,204($sp)
|
|
lw $16,200($sp)
|
|
addiu $sp,$sp,208
|
|
j $31
|
|
.end i2c_write_proc
|
|
.size i2c_write_proc, .-i2c_write_proc
|
|
.rdata
|
|
.align 2
|
|
$LC16:
|
|
.ascii "ioremap the I2C base address failed.\012\000"
|
|
.align 2
|
|
$LC17:
|
|
.ascii "i2c\000"
|
|
.text
|
|
.align 2
|
|
.globl i2c_init
|
|
.set nomips16
|
|
.set nomicromips
|
|
.ent i2c_init
|
|
.type i2c_init, @function
|
|
i2c_init:
|
|
.frame $sp,72,$31 # vars= 40, regs= 4/0, args= 16, gp= 0
|
|
.mask 0x80070000,-4
|
|
.fmask 0x00000000,0
|
|
.set noreorder
|
|
.set nomacro
|
|
addiu $sp,$sp,-72
|
|
sw $31,68($sp)
|
|
sw $18,64($sp)
|
|
sw $17,60($sp)
|
|
sw $16,56($sp)
|
|
sw $0,16($sp)
|
|
lui $16,%hi(cpu_data)
|
|
addiu $16,$16,%lo(cpu_data)
|
|
lw $17,12($16)
|
|
lw $16,8($16)
|
|
andi $14,$16,0
|
|
li $18,8388608 # 0x800000
|
|
and $15,$17,$18
|
|
move $16,$14
|
|
or $16,$16,$15
|
|
beq $16,$0,$L53
|
|
nop
|
|
|
|
lui $14,%hi(cpu_data)
|
|
addiu $14,$14,%lo(cpu_data)
|
|
lw $14,36($14)
|
|
andi $14,$14,0xce
|
|
bne $14,$0,$L53
|
|
nop
|
|
|
|
lui $2,%hi(cpu_data)
|
|
addiu $2,$2,%lo(cpu_data)
|
|
lw $3,12($2)
|
|
lw $2,8($2)
|
|
andi $12,$2,0
|
|
li $4,8388608 # 0x800000
|
|
and $13,$3,$4
|
|
move $2,$12
|
|
or $2,$2,$13
|
|
beq $2,$0,$L55
|
|
nop
|
|
|
|
lui $2,%hi(cpu_data)
|
|
addiu $2,$2,%lo(cpu_data)
|
|
lw $2,36($2)
|
|
andi $2,$2,0xce
|
|
bne $2,$0,$L55
|
|
nop
|
|
|
|
lui $2,%hi(cpu_data)
|
|
addiu $2,$2,%lo(cpu_data)
|
|
lw $3,12($2)
|
|
lw $2,8($2)
|
|
andi $10,$2,0
|
|
li $4,8388608 # 0x800000
|
|
and $11,$3,$4
|
|
move $2,$10
|
|
or $2,$2,$11
|
|
beq $2,$0,$L57
|
|
nop
|
|
|
|
lui $2,%hi(cpu_data)
|
|
addiu $2,$2,%lo(cpu_data)
|
|
lw $2,36($2)
|
|
andi $2,$2,0xce
|
|
beq $2,$0,$L59
|
|
nop
|
|
|
|
$L57:
|
|
li $2,1 # 0x1
|
|
j $L60
|
|
nop
|
|
|
|
$L59:
|
|
move $2,$0
|
|
$L60:
|
|
addiu $2,$2,9
|
|
li $3,2 # 0x2
|
|
sll $2,$3,$2
|
|
j $L66
|
|
nop
|
|
|
|
$L55:
|
|
lui $2,%hi(cpu_data)
|
|
addiu $2,$2,%lo(cpu_data)
|
|
lw $3,12($2)
|
|
lw $2,8($2)
|
|
andi $8,$2,0
|
|
li $4,8388608 # 0x800000
|
|
and $9,$3,$4
|
|
move $2,$8
|
|
or $2,$2,$9
|
|
beq $2,$0,$L62
|
|
nop
|
|
|
|
lui $2,%hi(cpu_data)
|
|
addiu $2,$2,%lo(cpu_data)
|
|
lw $2,36($2)
|
|
andi $2,$2,0xce
|
|
beq $2,$0,$L64
|
|
nop
|
|
|
|
$L62:
|
|
li $2,1 # 0x1
|
|
j $L65
|
|
nop
|
|
|
|
$L64:
|
|
move $2,$0
|
|
$L65:
|
|
addiu $2,$2,8
|
|
li $3,2 # 0x2
|
|
sll $2,$3,$2
|
|
j $L66
|
|
nop
|
|
|
|
$L53:
|
|
lui $8,%hi(cpu_data)
|
|
addiu $8,$8,%lo(cpu_data)
|
|
lw $9,12($8)
|
|
lw $8,8($8)
|
|
andi $6,$8,0
|
|
li $10,8388608 # 0x800000
|
|
and $7,$9,$10
|
|
move $8,$6
|
|
or $8,$8,$7
|
|
beq $8,$0,$L67
|
|
nop
|
|
|
|
lui $6,%hi(cpu_data)
|
|
addiu $6,$6,%lo(cpu_data)
|
|
lw $6,36($6)
|
|
andi $6,$6,0xce
|
|
bne $6,$0,$L67
|
|
nop
|
|
|
|
lui $2,%hi(cpu_data)
|
|
addiu $2,$2,%lo(cpu_data)
|
|
lw $3,12($2)
|
|
lw $2,8($2)
|
|
andi $4,$2,0
|
|
li $6,8388608 # 0x800000
|
|
and $5,$3,$6
|
|
move $2,$4
|
|
or $2,$2,$5
|
|
beq $2,$0,$L69
|
|
nop
|
|
|
|
lui $2,%hi(cpu_data)
|
|
addiu $2,$2,%lo(cpu_data)
|
|
lw $2,36($2)
|
|
andi $2,$2,0xce
|
|
beq $2,$0,$L71
|
|
nop
|
|
|
|
$L69:
|
|
li $2,1 # 0x1
|
|
j $L72
|
|
nop
|
|
|
|
$L71:
|
|
move $2,$0
|
|
$L72:
|
|
addiu $2,$2,8
|
|
li $3,2 # 0x2
|
|
sll $2,$3,$2
|
|
j $L66
|
|
nop
|
|
|
|
$L67:
|
|
lui $4,%hi(cpu_data)
|
|
addiu $4,$4,%lo(cpu_data)
|
|
lw $5,12($4)
|
|
lw $4,8($4)
|
|
andi $2,$4,0
|
|
li $6,8388608 # 0x800000
|
|
and $3,$5,$6
|
|
move $4,$2
|
|
or $4,$4,$3
|
|
beq $4,$0,$L74
|
|
nop
|
|
|
|
lui $2,%hi(cpu_data)
|
|
addiu $2,$2,%lo(cpu_data)
|
|
lw $2,36($2)
|
|
andi $2,$2,0xce
|
|
beq $2,$0,$L76
|
|
nop
|
|
|
|
$L74:
|
|
li $2,1 # 0x1
|
|
j $L77
|
|
nop
|
|
|
|
$L76:
|
|
move $2,$0
|
|
$L77:
|
|
addiu $2,$2,7
|
|
li $3,2 # 0x2
|
|
sll $2,$3,$2
|
|
$L66:
|
|
li $3,532611072 # 0x1fbf0000
|
|
ori $3,$3,0x300
|
|
sw $3,24($sp)
|
|
li $3,255 # 0xff
|
|
sw $3,28($sp)
|
|
sw $2,32($sp)
|
|
lw $2,24($sp)
|
|
sw $2,36($sp)
|
|
lw $2,28($sp)
|
|
sw $2,40($sp)
|
|
lw $2,32($sp)
|
|
sw $2,44($sp)
|
|
move $2,$0
|
|
sw $2,48($sp)
|
|
lw $2,48($sp)
|
|
beq $2,$0,$L79
|
|
nop
|
|
|
|
lw $2,48($sp)
|
|
j $L80
|
|
nop
|
|
|
|
$L79:
|
|
lw $4,24($sp)
|
|
lw $5,28($sp)
|
|
lw $6,32($sp)
|
|
lui $2,%hi(__ioremap)
|
|
addiu $2,$2,%lo(__ioremap)
|
|
jalr $2
|
|
nop
|
|
|
|
$L80:
|
|
move $3,$2
|
|
lui $2,%hi(i2cMasterBaseAddr)
|
|
sw $3,%lo(i2cMasterBaseAddr)($2)
|
|
lui $2,%hi(i2cMasterBaseAddr)
|
|
lw $2,%lo(i2cMasterBaseAddr)($2)
|
|
bne $2,$0,$L81
|
|
nop
|
|
|
|
lui $2,%hi($LC16)
|
|
addiu $4,$2,%lo($LC16)
|
|
lui $2,%hi(printk)
|
|
addiu $2,$2,%lo(printk)
|
|
jalr $2
|
|
nop
|
|
|
|
li $2,-14 # 0xfffffffffffffff2
|
|
j $L82
|
|
nop
|
|
|
|
$L81:
|
|
lui $2,%hi($LC17)
|
|
addiu $4,$2,%lo($LC17)
|
|
move $5,$0
|
|
move $6,$0
|
|
lui $2,%hi(create_proc_entry)
|
|
addiu $2,$2,%lo(create_proc_entry)
|
|
jalr $2
|
|
nop
|
|
|
|
sw $2,20($sp)
|
|
lw $2,20($sp)
|
|
beq $2,$0,$L83
|
|
nop
|
|
|
|
lw $2,20($sp)
|
|
lui $3,%hi(i2c_write_proc)
|
|
addiu $3,$3,%lo(i2c_write_proc)
|
|
sw $3,60($2)
|
|
$L83:
|
|
lw $2,16($sp)
|
|
$L82:
|
|
lw $31,68($sp)
|
|
lw $18,64($sp)
|
|
lw $17,60($sp)
|
|
lw $16,56($sp)
|
|
addiu $sp,$sp,72
|
|
j $31
|
|
nop
|
|
|
|
.set macro
|
|
.set reorder
|
|
.end i2c_init
|
|
.size i2c_init, .-i2c_init
|
|
.align 2
|
|
.globl i2c_exit
|
|
.set nomips16
|
|
.set nomicromips
|
|
.ent i2c_exit
|
|
.type i2c_exit, @function
|
|
i2c_exit:
|
|
.frame $sp,32,$31 # vars= 8, regs= 1/0, args= 16, gp= 0
|
|
.mask 0x80000000,-4
|
|
.fmask 0x00000000,0
|
|
.set noreorder
|
|
.set nomacro
|
|
addiu $sp,$sp,-32
|
|
sw $31,28($sp)
|
|
lui $2,%hi($LC17)
|
|
addiu $4,$2,%lo($LC17)
|
|
move $5,$0
|
|
lui $2,%hi(remove_proc_entry)
|
|
addiu $2,$2,%lo(remove_proc_entry)
|
|
jalr $2
|
|
nop
|
|
|
|
lui $2,%hi(i2cMasterBaseAddr)
|
|
lw $2,%lo(i2cMasterBaseAddr)($2)
|
|
sw $2,16($sp)
|
|
lw $2,16($sp)
|
|
sw $2,20($sp)
|
|
move $2,$0
|
|
bne $2,$0,$L84
|
|
nop
|
|
|
|
lw $4,16($sp)
|
|
lui $2,%hi(__iounmap)
|
|
addiu $2,$2,%lo(__iounmap)
|
|
jalr $2
|
|
nop
|
|
|
|
$L84:
|
|
lw $31,28($sp)
|
|
addiu $sp,$sp,32
|
|
j $31
|
|
nop
|
|
|
|
.set macro
|
|
.set reorder
|
|
.end i2c_exit
|
|
.size i2c_exit, .-i2c_exit
|
|
.ident "GCC: (Buildroot 2015.08.1) 4.9.3"
|