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TP-Link_Archer-XR500v/EN7526G_3.18Kernel_SDK/linux-3.18.21/arch/parisc/math-emu/fcnvfut.c
2024-07-22 01:58:46 -03:00

333 lines
7.8 KiB
C
Executable File

/*
* Linux/PA-RISC Project (http://www.parisc-linux.org/)
*
* Floating-point emulation code
* Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* BEGIN_DESC
*
* File:
* @(#) pa/spmath/fcnvfut.c $Revision: 1.1 $
*
* Purpose:
* Floating-point to Unsigned Fixed-point Converts with Truncation
*
* External Interfaces:
* dbl_to_dbl_fcnvfut(srcptr,nullptr,dstptr,status)
* dbl_to_sgl_fcnvfut(srcptr,nullptr,dstptr,status)
* sgl_to_dbl_fcnvfut(srcptr,nullptr,dstptr,status)
* sgl_to_sgl_fcnvfut(srcptr,nullptr,dstptr,status)
*
* Internal Interfaces:
*
* Theory:
* <<please update with a overview of the operation of this file>>
*
* END_DESC
*/
#include "float.h"
#include "sgl_float.h"
#include "dbl_float.h"
#include "cnv_float.h"
/************************************************************************
* Floating-point to Unsigned Fixed-point Converts with Truncation *
************************************************************************/
/*
* Convert single floating-point to single fixed-point format
* with truncated result
*/
/*ARGSUSED*/
int
sgl_to_sgl_fcnvfut (sgl_floating_point * srcptr, unsigned int *nullptr,
unsigned int *dstptr, unsigned int *status)
{
register unsigned int src, result;
register int src_exponent;
src = *srcptr;
src_exponent = Sgl_exponent(src) - SGL_BIAS;
/*
* Test for overflow
*/
if (src_exponent > SGL_FX_MAX_EXP + 1) {
if (Sgl_isone_sign(src)) {
result = 0;
} else {
result = 0xffffffff;
}
if (Is_invalidtrap_enabled()) {
return(INVALIDEXCEPTION);
}
Set_invalidflag();
*dstptr = result;
return(NOEXCEPTION);
}
/*
* Generate result
*/
if (src_exponent >= 0) {
/*
* Check sign.
* If negative, trap unimplemented.
*/
if (Sgl_isone_sign(src)) {
result = 0;
if (Is_invalidtrap_enabled()) {
return(INVALIDEXCEPTION);
}
Set_invalidflag();
*dstptr = result;
return(NOEXCEPTION);
}
Sgl_clear_signexponent_set_hidden(src);
Suint_from_sgl_mantissa(src,src_exponent,result);
*dstptr = result;
/* check for inexact */
if (Sgl_isinexact_to_unsigned(src,src_exponent)) {
if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
else Set_inexactflag();
}
}
else {
*dstptr = 0;
/* check for inexact */
if (Sgl_isnotzero_exponentmantissa(src)) {
if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
else Set_inexactflag();
}
}
return(NOEXCEPTION);
}
/*
* Single Floating-point to Double Unsigned Fixed
*/
/*ARGSUSED*/
int
sgl_to_dbl_fcnvfut (sgl_floating_point * srcptr, unsigned int *nullptr,
dbl_unsigned * dstptr, unsigned int *status)
{
register int src_exponent;
register unsigned int src, resultp1, resultp2;
src = *srcptr;
src_exponent = Sgl_exponent(src) - SGL_BIAS;
/*
* Test for overflow
*/
if (src_exponent > DBL_FX_MAX_EXP + 1) {
if (Sgl_isone_sign(src)) {
resultp1 = resultp2 = 0;
} else {
resultp1 = resultp2 = 0xffffffff;
}
if (Is_invalidtrap_enabled()) {
return(INVALIDEXCEPTION);
}
Set_invalidflag();
Duint_copytoptr(resultp1,resultp2,dstptr);
return(NOEXCEPTION);
}
/*
* Generate result
*/
if (src_exponent >= 0) {
/*
* Check sign.
* If negative, trap unimplemented.
*/
if (Sgl_isone_sign(src)) {
resultp1 = resultp2 = 0;
if (Is_invalidtrap_enabled()) {
return(INVALIDEXCEPTION);
}
Set_invalidflag();
Duint_copytoptr(resultp1,resultp2,dstptr);
return(NOEXCEPTION);
}
Sgl_clear_signexponent_set_hidden(src);
Duint_from_sgl_mantissa(src,src_exponent,resultp1,resultp2);
Duint_copytoptr(resultp1,resultp2,dstptr);
/* check for inexact */
if (Sgl_isinexact_to_unsigned(src,src_exponent)) {
if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
else Set_inexactflag();
}
}
else {
Duint_setzero(resultp1,resultp2);
Duint_copytoptr(resultp1,resultp2,dstptr);
/* check for inexact */
if (Sgl_isnotzero_exponentmantissa(src)) {
if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
else Set_inexactflag();
}
}
return(NOEXCEPTION);
}
/*
* Double Floating-point to Single Unsigned Fixed
*/
/*ARGSUSED*/
int
dbl_to_sgl_fcnvfut (dbl_floating_point * srcptr, unsigned int *nullptr,
unsigned int *dstptr, unsigned int *status)
{
register unsigned int srcp1, srcp2, result;
register int src_exponent;
Dbl_copyfromptr(srcptr,srcp1,srcp2);
src_exponent = Dbl_exponent(srcp1) - DBL_BIAS;
/*
* Test for overflow
*/
if (src_exponent > SGL_FX_MAX_EXP + 1) {
if (Dbl_isone_sign(srcp1)) {
result = 0;
} else {
result = 0xffffffff;
}
if (Is_invalidtrap_enabled()) {
return(INVALIDEXCEPTION);
}
Set_invalidflag();
*dstptr = result;
return(NOEXCEPTION);
}
/*
* Generate result
*/
if (src_exponent >= 0) {
/*
* Check sign.
* If negative, trap unimplemented.
*/
if (Dbl_isone_sign(srcp1)) {
result = 0;
if (Is_invalidtrap_enabled()) {
return(INVALIDEXCEPTION);
}
Set_invalidflag();
*dstptr = result;
return(NOEXCEPTION);
}
Dbl_clear_signexponent_set_hidden(srcp1);
Suint_from_dbl_mantissa(srcp1,srcp2,src_exponent,result);
*dstptr = result;
/* check for inexact */
if (Dbl_isinexact_to_unsigned(srcp1,srcp2,src_exponent)) {
if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
else Set_inexactflag();
}
}
else {
*dstptr = 0;
/* check for inexact */
if (Dbl_isnotzero_exponentmantissa(srcp1,srcp2)) {
if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
else Set_inexactflag();
}
}
return(NOEXCEPTION);
}
/*
* Double Floating-point to Double Unsigned Fixed
*/
/*ARGSUSED*/
int
dbl_to_dbl_fcnvfut (dbl_floating_point * srcptr, unsigned int *nullptr,
dbl_unsigned * dstptr, unsigned int *status)
{
register int src_exponent;
register unsigned int srcp1, srcp2, resultp1, resultp2;
Dbl_copyfromptr(srcptr,srcp1,srcp2);
src_exponent = Dbl_exponent(srcp1) - DBL_BIAS;
/*
* Test for overflow
*/
if (src_exponent > DBL_FX_MAX_EXP + 1) {
if (Dbl_isone_sign(srcp1)) {
resultp1 = resultp2 = 0;
} else {
resultp1 = resultp2 = 0xffffffff;
}
if (Is_invalidtrap_enabled()) {
return(INVALIDEXCEPTION);
}
Set_invalidflag();
Duint_copytoptr(resultp1,resultp2,dstptr);
return(NOEXCEPTION);
}
/*
* Generate result
*/
if (src_exponent >= 0) {
/*
* Check sign.
* If negative, trap unimplemented.
*/
if (Dbl_isone_sign(srcp1)) {
resultp1 = resultp2 = 0;
if (Is_invalidtrap_enabled()) {
return(INVALIDEXCEPTION);
}
Set_invalidflag();
Duint_copytoptr(resultp1,resultp2,dstptr);
return(NOEXCEPTION);
}
Dbl_clear_signexponent_set_hidden(srcp1);
Duint_from_dbl_mantissa(srcp1,srcp2,src_exponent,
resultp1,resultp2);
Duint_copytoptr(resultp1,resultp2,dstptr);
/* check for inexact */
if (Dbl_isinexact_to_unsigned(srcp1,srcp2,src_exponent)) {
if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
else Set_inexactflag();
}
}
else {
Duint_setzero(resultp1,resultp2);
Duint_copytoptr(resultp1,resultp2,dstptr);
/* check for inexact */
if (Dbl_isnotzero_exponentmantissa(srcp1,srcp2)) {
if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
else Set_inexactflag();
}
}
return(NOEXCEPTION);
}