269 lines
6.3 KiB
C
Executable File
269 lines
6.3 KiB
C
Executable File
#ifndef RT63165_NAND_H
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#define RT63165_NAND_H
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#define EIO 5 /* I/O error */
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#define EINVAL 22 /* Invalid argument */
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#define ENOMEM 12 /* Out of memory */
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#define EFAULT 14 /* Out of accessible address space */
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#define EBADMSG 74 /* Not a data message */
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#define EUCLEAN 117 /* Structure needs cleaning */
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#define CONFIG_NUMCHIPS 1
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/* frankliao deleted 20100916 */
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//1#include "gdma.h"
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#define ra_inl(addr) (*(volatile unsigned int *)(addr))
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#define ra_outl(addr, value) (*(volatile unsigned int *)(addr) = (value))
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#define ra_aor(addr, a_mask, o_value) ra_outl(addr, (ra_inl(addr) & (a_mask)) | (o_value))
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/* FOR ID frankliao added 20101012 */
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#define NAND_CMD1_READID 0x90
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#define NAND_CONF_READID 0x410101
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/* NAND Reg Verify Type */
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#define REG_DEF_CHK 1
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#define REG_RW_CHK 2
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/* Flash Type */
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#define STANDARD_SMALL_FLASH (0)
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#define STANDARD_LARGE_FLASH (1)
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#define NONE (-1)
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/* Manufacturers */
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#define MANUFACTURER_ST3A (0x20)
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#define MANUFACTURER_ST4A (0x0020)
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#define MANUFACTURER_MIRCON (0x2c)
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#define MANUFACTURER_ZENTEL (0x92)
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#define MANUFACTURER_SAMSUNG (0xec)
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/* SPANSION support */
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#define MANUFACTURER_SPANSION (0x01)
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/* Device ID */
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#define ST128W3A (0x73)
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#define ST512W3A (0x76)
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#define MT29F2G08AAD (0xda)
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#define MT29F4G08AAC (0xdc)
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#define A5U1GA31ATS (0xf1)
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#define K9F1G08U0D (0xf1)
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/* SPANSION support */
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#define S34ML01G1 (0xf1)
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#define S34ML02G1 (0xda)
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#define S34ML04G1 (0xdc)
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/* SIZE BIT*/
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#define SIZE_512MiB_BIT (29)
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#define SIZE_256MiB_BIT (28)
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#define SIZE_128MiB_BIT (27)
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#define SIZE_64MiB_BIT (26)
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#define SIZE_16MiB_BIT (24)
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#define SIZE_128KiB_BIT (17)
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#define SIZE_16KiB_BIT (14)
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#define SIZE_2KiB_BIT (11)
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#define SIZE_4KiB_BIT (12)
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#define SIZE_512iB_BIT (9)
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#define SIZE_64iB_BIT (6)
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#define SIZE_16iB_BIT (4)
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/* SIZE BYTE */
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#define SIZE_512MiB_BYTES (512)
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#define SIZE_16iB_BYTES (16)
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#define SIZE_2KiB_BYTES (2048)
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#define SIZE_64iB_BYTES (64)
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#define NFC_BASE (0xbfbe0000)
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#define NFC_CTRL (NFC_BASE + 0x10)
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#define NFC_CONF (NFC_BASE + 0x14)
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#define NFC_CMD1 (NFC_BASE + 0x18)
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#define NFC_CMD2 (NFC_BASE + 0x1c)
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#define NFC_CMD3 (NFC_BASE + 0x20)
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#define NFC_ADDR (NFC_BASE + 0x24)
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#define NFC_DATA (NFC_BASE + 0x28)
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#define NFC_STATUS (NFC_BASE + 0x30)
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#define NFC_INT_EN (NFC_BASE + 0x34)
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#define NFC_INT_ST (NFC_BASE + 0x38)
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#ifdef RT63165
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#define NFC_ECC (NFC_BASE + 0x2c)
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#define NFC_ADDRII (NFC_BASE + 0x3c)
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#define NFC_ECCII (NFC_BASE + 0x40)
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#define NFC_ECCIII (NFC_BASE + 0x44)
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#define NFC_ECCIV (NFC_BASE + 0x48)
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#define NFC_ECC_STII (NFC_BASE + 0x4c)
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#define NFC_ECC_STIII (NFC_BASE + 0x50)
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#define NFC_CTRLII (NFC_BASE + 0x54)
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#else
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#define NFC_CTRLII (NFC_BASE + 0x3c)
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#define NFC_ECC (NFC_BASE + 0x40)
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#define NFC_ECCII (NFC_BASE + 0x44)
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#define NFC_ECCIII (NFC_BASE + 0x48)
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#define NFC_ECCIV (NFC_BASE + 0x4c)
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#define NFC_ECC_ST (NFC_BASE + 0x50)
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#define NFC_ECC_STII (NFC_BASE + 0x54)
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#define NFC_ECC_STIII (NFC_BASE + 0x58)
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#define NFC_ECC_STIV (NFC_BASE + 0x5c)
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#define NFC_ADDRII (NFC_BASE + 0x60)
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#endif
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enum _int_stat {
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INT_ST_ND_DONE = 1<<0,
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INT_ST_TX_BUF_RDY = 1<<1,
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INT_ST_RX_BUF_RDY = 1<<2,
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INT_ST_ECC_ERR = 1<<3,
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INT_ST_TX_TRAS_ERR = 1<<4,
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INT_ST_RX_TRAS_ERR = 1<<5,
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INT_ST_TX_KICK_ERR = 1<<6,
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INT_ST_RX_KICK_ERR = 1<<7
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};
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#define SMALL_FLASH_ECC_BYTES 3 //! ecc has 3 bytes
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#define SMALL_FLASH_ECC_OFFSET 5 //! ecc starts from offset 5.
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#define LARGE_FLASH_ECC_BYTES 12 //! ecc has 12 bytes
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#if defined (TCSUPPORT_NAND_BADBLOCK_CHECK) || defined (TCSUPPORT_NAND_RT63368)
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#define LARGE_FLASH_ECC_OFFSET 5
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#else
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#define LARGE_FLASH_ECC_OFFSET 52 //! ecc starts from offset 52.
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#endif
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#ifdef TCSUPPORT_NAND_RT63368
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#define ECC_NO_ERR 0
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#define ECC_ONE_BIT_ERR -6
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#define ECC_DATA_ERR -7
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#define ECC_CODE_ERR -8
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#define ECC_NFC_CONFLICT -9
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#endif
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#ifdef TCSUPPORT_NAND_BADBLOCK_CHECK
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#define TCROMFILE_BLOCK_NUM 13
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#define TCBKROMFILE_BLOCK_NUM 13
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#define TCLINUX_BLOCK_NUM 256
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#define TCROMFILE_START 7
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#define TCROMFILE_END (TCROMFILE_START + TCROMFILE_BLOCK_NUM)
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#define TCLINUX_BLOCK_START 20
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#define TCLINUX_BLOCK_END (TCLINUX_BLOCK_START + TCLINUX_BLOCK_NUM)
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#define TCLINUX_SLAVE_BLOCK_START 276
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#define TCLINUX_SLAVE_BLOCK_END (TCLINUX_SLAVE_BLOCK_START + TCLINUX_BLOCK_NUM)
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#define TCBKROMFILE_START 1007
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#define TCBKROMFILE_END (TCBKROMFILE_START + TCBKROMFILE_BLOCK_NUM)
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#endif
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/* Status bits */
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#define NAND_STATUS_FAIL 0x01
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#define NAND_STATUS_FAIL_N1 0x02
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#define NAND_STATUS_TRUE_READY 0x20
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#define NAND_STATUS_READY 0x40
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#define NAND_STATUS_WP 0x80
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typedef enum {
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FL_READY,
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FL_READING,
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FL_WRITING,
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FL_ERASING,
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FL_SYNCING,
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FL_CACHEDPRG,
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FL_PM_SUSPENDED,
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} nand_state_t;
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/*************************************************************/
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typedef enum _ra_flags {
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FLAG_NONE = 0,
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FLAG_ECC_EN = (1<<0),
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FLAG_USE_GDMA = (1<<1),
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FLAG_VERIFY = (1<<2),
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} RA_FLAGS;
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#if 0
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#define BBTTAG_BITS 2
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#define BBTTAG_BITS_MASK ((1<<BBTTAG_BITS) -1)
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enum BBT_TAG {
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BBT_TAG_UNKNOWN = 0, //2'b01
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BBT_TAG_GOOD = 3, //2'b11
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BBT_TAG_BAD = 2, //2'b10
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BBT_TAG_RES = 1, //2'b01
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};
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#endif
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struct nand_opcode {
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const int type;
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const int read1;
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const int read2;
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const int readB;
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const int readoob;
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const int pageprog1;
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const int pageprog2;
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const int writeoob;
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const int erase1;
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const int erase2;
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const int status;
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const int reset;
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};
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struct nand_info {
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const int mfr_id;
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const int dev_id;
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const char *name;
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const int numchips;
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const int chip_shift;
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const int page_shift;
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const int erase_shift;
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const int oob_shift;
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const int badblockpos;
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const int opcode_type;
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};
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struct ra_nand_chip {
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struct nand_info *flash;
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struct nand_ecclayout *oob;
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struct nand_opcode *opcode;
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int state;
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unsigned int buffers_page;
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char *buffers; //[CFG_PAGESIZE + CFG_PAGE_OOBSIZE];
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char *readback_buffers;
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unsigned char *bbt;
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#if defined (WORKAROUND_RX_BUF_OV)
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unsigned int sandbox_page; // steal a page (block) for read ECC verification
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#endif
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};
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struct nand_oobfree {
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unsigned int offset;
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unsigned int length;
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};
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#define MTD_MAX_OOBFREE_ENTRIES 8
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struct nand_ecclayout {
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unsigned int eccbytes;
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unsigned int eccpos[64];
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unsigned int oobavail;
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struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
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};
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#endif
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