mirror of
https://github.com/bkerler/edl
synced 2024-11-22 05:16:24 +00:00
7f14a79019
Remove Some useless Codes Replace '2018-2023' to '2018-2024'
251 lines
8.8 KiB
Python
Executable File
251 lines
8.8 KiB
Python
Executable File
#!/usr/bin/env python3
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# -*- coding: utf-8 -*-
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# (c) B.Kerler 2018-2024 under GPLv3 license
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# If you use my code, make sure you refer to my name
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#
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# !!!!! If you use this code in commercial products, your product is automatically
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# GPLv3 and has to be open sourced under GPLv3 as well. !!!!!
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from capstone import *
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from keystone import *
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from binascii import unhexlify
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import argparse
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def asm(code, cpu, mode, bigendian):
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if bigendian:
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little = KS_MODE_BIG_ENDIAN # big-endian mode
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else:
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little = KS_MODE_LITTLE_ENDIAN # little-endian mode (default mode)
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print("CPU: %s, MODE: %s" % (cpu, mode))
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ks = None
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if cpu == "arm":
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# ARM architecture (including Thumb, Thumb-2)
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if mode == "arm":
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ks = Ks(KS_ARCH_ARM, KS_MODE_ARM + little) # ARM mode
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elif mode == "thumb":
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ks = Ks(KS_ARCH_ARM, KS_MODE_THUMB + little) # THUMB mode (including Thumb-2)
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elif mode == "mclass":
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ks = Ks(KS_ARCH_ARM, KS_MODE_THUMB + little)
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elif mode == "v8":
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ks = Ks(KS_ARCH_ARM, KS_MODE_ARM + KS_MODE_V8 + little)
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elif cpu == "arm64":
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# ARM-64, also called AArch64
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ks = Ks(KS_ARCH_ARM64, little) # ARM mode
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elif cpu == "mips":
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# Mips architecture
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if mode == "micro":
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ks = Ks(KS_ARCH_MIPS, KS_MODE_MICRO + little) # MicroMips mode
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elif mode == "3":
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ks = Ks(KS_ARCH_MIPS, KS_MODE_MIPS3 + little) # Mips III ISA
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elif mode == "32R6":
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ks = Ks(KS_ARCH_MIPS, KS_MODE_MIPS32R6 + little) # Mips32r6 ISA
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elif mode == "32":
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ks = Ks(KS_ARCH_MIPS, KS_MODE_MIPS32 + little) # Mips32 ISA
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elif mode == "64":
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ks = Ks(KS_ARCH_MIPS, KS_MODE_MIPS64 + little) # Mips64 ISA
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elif cpu == "x86":
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# X86 architecture (including x86 & x86-64)
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if mode == "16":
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ks = Ks(KS_ARCH_X86, KS_MODE_16 + little) # 16-bit mode
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elif mode == "32":
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ks = Ks(KS_ARCH_X86, KS_MODE_32 + little) # 32-bit mode
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elif mode == "64":
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ks = Ks(KS_ARCH_X86, KS_MODE_64 + little) # 64-bit mode
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elif cpu == "ppc":
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# PowerPC architecture (currently unsupported)
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if mode == "32":
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ks = Ks(KS_ARCH_PPC, KS_MODE_PPC32 + little) # 32-bit mode
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elif mode == "64":
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ks = Ks(KS_ARCH_PPC, KS_MODE_PPC64 + little) # 64-bit mode
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elif mode == "qpx":
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ks = Ks(KS_ARCH_PPC, KS_MODE_QPX + little) # Quad Processing eXtensions mode
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elif cpu == "sparc":
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# Sparc architecture
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if mode == "32":
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ks = Ks(KS_ARCH_SPARC, KS_MODE_SPARC32 + little) # 32-bit mode
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elif mode == "64":
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ks = Ks(KS_ARCH_SPARC, KS_MODE_SPARC64 + little) # 64-bit mode
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elif mode == "v9":
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ks = Ks(KS_ARCH_SPARC, KS_MODE_V9 + little) # SparcV9 mode
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elif cpu == "systemz":
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ks = Ks(KS_ARCH_SYSTEMZ, KS_MODE_BIG_ENDIAN) # SystemZ architecture (S390X)
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elif cpu == "hexagon":
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ks = Ks(KS_ARCH_HEXAGON, KS_MODE_LITTLE_ENDIAN) # QDSP6 Hexagon Qualcomm
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if ks is None:
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print("CPU and/or Mode not supported!")
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exit(0)
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encoding, count = ks.asm(code)
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return encoding
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def disasm(code, cpu, mode, bigendian, size):
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cs = None
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if bigendian:
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little = CS_MODE_BIG_ENDIAN # big-endian mode
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else:
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little = CS_MODE_LITTLE_ENDIAN # little-endian mode (default mode)
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if cpu == "arm":
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if mode == "arm":
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cs = Cs(CS_ARCH_ARM, CS_MODE_ARM + little) # ARM mode
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elif mode == "thumb":
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cs = Cs(CS_ARCH_ARM, CS_MODE_THUMB + little) # THUMB mode (including Thumb-2)
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elif mode == "mclass":
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cs = Cs(CS_ARCH_ARM, CS_MODE_THUMB + CS_MODE_MCLASS + little) # ARM Cortex-M
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elif mode == "v8":
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cs = Cs(CS_ARCH_ARM, CS_MODE_ARM + CS_MODE_V8 + little) # ARMv8 A32 encodings for ARM
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elif cpu == "arm64":
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cs = Cs(CS_ARCH_ARM64, CS_MODE_ARM + little)
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elif cpu == "mips":
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if mode == "micro":
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cs = Cs(CS_ARCH_MIPS, CS_MODE_MICRO + little) # MicroMips mode
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elif mode == "32":
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cs = Cs(CS_ARCH_MIPS, CS_MODE_MIPS32 + little) # Mips III ISA
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elif mode == "64":
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cs = Cs(CS_ARCH_MIPS, CS_MODE_MIPS64 + little) # Mips III ISA
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elif mode == "32R6-Micro":
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cs = Cs(CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_MICRO + little) # Mips32r6 ISA
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elif mode == "32R6":
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cs = Cs(CS_ARCH_MIPS, CS_MODE_MIPS32R6 + little) # General Purpose Registers are 64bit wide
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elif cpu == "x86":
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# X86 architecture (including x86 & x86-64)
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if mode == "16":
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cs = Cs(CS_ARCH_X86, CS_MODE_16 + little) # 16-bit mode
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elif mode == "32":
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cs = Cs(CS_ARCH_X86, CS_MODE_32 + little) # 32-bit mode
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elif mode == "64":
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cs = Cs(CS_ARCH_X86, CS_MODE_64 + little) # 64-bit mode
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elif cpu == "ppc":
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# PowerPC architecture (currently unsupported)
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if mode == "64":
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cs = Cs(CS_ARCH_PPC, little) # 64-bit mode
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elif cpu == "sparc":
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# Sparc architecture
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if mode == "None":
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cs = Cs(CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN) # 32-bit mode
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elif mode == "v9":
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cs = Cs(CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN + CS_MODE_V9) # SparcV9 mode
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elif cpu == "systemz":
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cs = Cs(CS_ARCH_SYSZ, 0) # SystemZ architecture (S390X)
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elif cpu == "xcore":
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cs = Cs(CS_ARCH_XCORE, 0) # XCore architecture
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if cs is not None:
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print("CPU and/or mode not supported!")
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exit(0)
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instr = []
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for i in cs.disasm(code, size):
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# print("0x%x:\t%s\t%s" % (i.address, i.mnemonic, i.op_str))
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instr.append("%s\t%s" % (i.mnemonic, i.op_str))
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return instr
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def main():
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parser = argparse.ArgumentParser(formatter_class=argparse.RawDescriptionHelpFormatter,
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description='Disasm/Asm Tool (c) B. Kerler 2018')
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parser.add_argument(
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'--infile', '-in',
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help='Input File',
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default='')
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parser.add_argument(
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'--outfile', '-out',
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help='Output File',
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default='')
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parser.add_argument(
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'--cstyle', '-cstyle',
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help='Print in c style',
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action="store_true")
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parser.add_argument(
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'--bigendian', '-bigendian',
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help='Big endian',
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action="store_true")
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parser.add_argument(
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'--disasm', '-disasm',
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help='Disasm: arm[arm,thumb,mclass,v8],arm64[arm],mips[micro,3,32R6,GP64],x86[16,32,64],ppc[64],sparc[32,64,'
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'v9],systemz,xcore',
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default='')
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parser.add_argument(
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'--asm', '-asm',
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help='Asm: arm[arm,thumb,mclass,v8],arm64[arm],mips[micro,32,64,32R6,32R6-Micro],x86[16,32,64],ppc[32,64,'
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'qpx],sparc[None,v9],systemz,hexagon',
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default='')
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parser.add_argument(
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'--inp', '-input',
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help='Disasm: hexstring, Asm: instruction string input ',
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default='')
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args = parser.parse_args()
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if args.asm == '' and args.disasm == '':
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print("[asmtools] Usage: -asm cpu,mode or -disasm cpu,mode")
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exit(0)
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if args.infile == '' and args.inp == '':
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print("[asmtools] I must have an infile to work on (-in)")
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exit(0)
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if args.asm != "":
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cpu, mode = args.asm.split(",")
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else:
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cpu, mode = args.disasm.split(",")
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if args.inp != "":
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args.inp = args.inp.replace("\\n", "\n")
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if args.asm != "":
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aa = asm(args.inp, cpu, mode, args.bigendian)
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else:
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aa = disasm(unhexlify(args.inp), cpu, mode, args.bigendian, len(args.inp))
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else:
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with open(args.infile, "rb") as rf:
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code = rf.read()
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if args.asm != "":
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aa = asm(code, cpu, mode, args.bigendian)
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else:
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aa = disasm(code, cpu, mode, args.bigendian, len(code))
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if args.outfile != "":
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with open(args.outfile, "wb") as wf:
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if args.asm != "":
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ba = bytearray()
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for i in aa:
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ba.append(i)
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wf.write(ba)
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else:
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wf.write(aa)
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else:
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if args.asm != "":
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sc = ""
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count = 0
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out = ""
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for i in aa:
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if args.cstyle:
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out += ("\\x%02x" % i)
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else:
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out += ("%02x" % i)
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sc += "%02x" % i
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count += 1
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print(out)
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else:
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print(aa)
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'''
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segment=bytearray(code[0x01C97C:0x01C990])
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segment[7]=0xE1
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segment[11]=0xE1
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segment[15]=0xE5
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segment[19]=0xEA
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print(hex(segment[7]))
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print(disasm(bytes(segment),len(segment)))
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'''
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main()
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