mirror of
https://github.com/edk2-porting/edk2-msm
synced 2024-11-25 18:36:15 +00:00
60946 lines
2.2 MiB
60946 lines
2.2 MiB
/*
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* Intel ACPI Component Architecture
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* AML/ASL+ Disassembler version 20190703 (32-bit version)
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* Copyright (c) 2000 - 2019 Intel Corporation
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*
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* Disassembling to symbolic ASL+ operators
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*
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* Disassembly of dsdts.aml, Wed Nov 6 17:28:39 2019
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*
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* Original Table Header:
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* Signature "DSDT"
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* Length 0x00043459 (275545)
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* Revision 0x02
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* Checksum 0x03
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* OEM ID "QCOMM "
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* OEM Table ID "SDM850 "
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* OEM Revision 0x00000003 (3)
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* Compiler ID "MSFT"
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* Compiler Version 0x05000000 (83886080)
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*/
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DefinitionBlock ("", "DSDT", 2, "QCOMM ", "SDM850 ", 0x00000003)
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{
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/*
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* iASL Warning: There were 2 external control methods found during
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* disassembly, but only 0 were resolved (2 unresolved). Additional
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* ACPI tables may be required to properly disassemble the code. This
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* resulting disassembler output file may not compile because the
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* disassembler did not know how many arguments to assign to the
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* unresolved methods. Note: SSDTs can be dynamically loaded at
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* runtime and may or may not be available via the host OS.
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*
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* To specify the tables needed to resolve external control method
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* references, the -e option can be used to specify the filenames.
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* Example iASL invocations:
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* iasl -e ssdt1.aml ssdt2.aml ssdt3.aml -d dsdt.aml
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* iasl -e dsdt.aml ssdt2.aml -d ssdt1.aml
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* iasl -e ssdt*.aml -d dsdt.aml
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*
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* In addition, the -fe option can be used to specify a file containing
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* control method external declarations with the associated method
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* argument counts. Each line of the file must be of the form:
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* External (<method pathname>, MethodObj, <argument count>)
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* Invocation:
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* iasl -fe refs.txt -d dsdt.aml
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*
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* The following methods were unresolved and many not compile properly
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* because the disassembler had to guess at the number of arguments
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* required for each:
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*/
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External (_SB_.PWPR, MethodObj) // Warning: Unknown method, guessing 2 arguments
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External (_SB_.PWRR, MethodObj) // Warning: Unknown method, guessing 0 arguments
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External (_SB_.TZ98, UnknownObj)
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External (_SB_.TZ98._PSV, IntObj)
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External (_SB_.TZ98._TC1, IntObj)
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External (_SB_.TZ98._TC2, IntObj)
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External (_SB_.TZ98._TSP, IntObj)
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External (_SB_.TZ98.TPSV, UnknownObj)
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External (_SB_.TZ98.TTC1, UnknownObj)
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External (_SB_.TZ98.TTC2, UnknownObj)
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External (_SB_.TZ98.TTSP, UnknownObj)
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External (DPON, UnknownObj)
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External (TRUE, UnknownObj)
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Scope (\_SB)
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{
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Name (PSUB, "RENEGA0E")
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Name (SOID, 0xffffffff)
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Name (SIDS, "SDM850")
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Name (SIDV, 0xffffffff)
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Name (SVMJ, 0xffff)
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Name (SVMI, 0xffff)
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Name (SDFE, 0xffff)
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Name (SFES, "899800000000000")
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Name (SIDM, 0xfffffffff)
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Name (SOSN, 0xaaaaaaaabbbbbbbb)
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Name (RMTB, 0xaaaaaaaa)
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Name (RMTX, 0xbbbbbbbb)
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Name (RFMB, 0xcccccccc)
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Name (RFMS, 0xdddddddd)
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Name (RFAB, 0xeeeeeeee)
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Name (RFAS, 0x77777777)
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Name (TCMA, 0xDEADBEEF)
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Name (TCML, 0xBEEFDEAD)
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Name (PRSI, Buffer() {0x53, 0x4F, 0x53, 0x49, 0x0E, 0x10, 0x72, 0x00, 0x86, 0x00, 0x00, 0x00, 0x00,0x0B})
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Name (MDID, 0x00000003)
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Device (UFS0)
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{
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Name (_DEP, Package (One) // _DEP: Dependencies
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{
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\_SB.PEP0
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})
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Name (_HID, "QCOM24A5") // _HID: Hardware ID
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Alias (\_SB.PSUB, _SUB)
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Name (_CID, "ACPIQCOM24A5") // _CID: Compatible ID
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Name (_UID, Zero) // _UID: Unique ID
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Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
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Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
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{
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Name (RBUF, ResourceTemplate ()
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{
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Memory32Fixed (ReadWrite,
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0x01D84000, // Address Base
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0x00014000, // Address Length
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)
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Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
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{
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0x00000129,
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}
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})
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Return (RBUF) /* \_SB_.UFS0._CRS.RBUF */
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}
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Device (DEV0)
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{
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Method (_ADR, 0, NotSerialized) // _ADR: Address
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{
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Return (0x08)
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}
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Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
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{
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Return (Zero)
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}
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}
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}
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Device (SDC2)
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{
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Name (_DEP, Package (0x02) // _DEP: Dependencies
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{
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\_SB.PEP0,
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\_SB.GIO0
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})
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Name (_HID, "QCOM2466") // _HID: Hardware ID
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Alias (\_SB.PSUB, _SUB)
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Name (_CID, "ACPIQCOM2466") // _CID: Compatible ID
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Name (_UID, One) // _UID: Unique ID
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Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
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Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
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{
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Name (RBUF, ResourceTemplate ()
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{
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Memory32Fixed (ReadWrite,
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0x08804000, // Address Base
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0x00001000, // Address Length
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)
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Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
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{
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0x000000EC,
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}
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GpioInt (Edge, ActiveBoth, SharedAndWake, PullUp, 0x7530,
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"\\_SB.GIO0", 0x00, ResourceConsumer, ,
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)
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{ // Pin list
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0x00C0
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}
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GpioIo (Shared, PullUp, 0x0000, 0x0000, IoRestrictionNone,
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"\\_SB.GIO0", 0x00, ResourceConsumer, ,
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)
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{ // Pin list
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0x007E
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}
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})
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Return (RBUF) /* \_SB_.SDC2._CRS.RBUF */
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}
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Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
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{
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}
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Method (_STA, 0, NotSerialized) // _STA: Status
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{
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Return (0x0F)
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}
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}
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Device (ABD)
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{
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Name (_DEP, Package (One) // _DEP: Dependencies
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{
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\_SB.PEP0
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})
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Name (_HID, "QCOM0242") // _HID: Hardware ID
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Alias (\_SB.PSUB, _SUB)
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Name (_UID, Zero) // _UID: Unique ID
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Method (_STA, 0, NotSerialized) // _STA: Status
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{
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Return (0x0B)
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}
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OperationRegion (ROP1, GenericSerialBus, Zero, 0x0100)
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Name (AVBL, Zero)
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Method (_REG, 2, NotSerialized) // _REG: Region Availability
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{
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If ((Arg0 == 0x09))
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{
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AVBL = Arg1
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}
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}
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}
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Name (ESNL, 0x14)
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Name (DBFL, 0x17)
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Device (PMIC)
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{
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Name (_DEP, Package (One) // _DEP: Dependencies
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{
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\_SB.SPMI
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})
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Name (_HID, "QCOM0266") // _HID: Hardware ID
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Name (_CID, "PNP0CA3") // _CID: Compatible ID
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Method (_STA, 0, NotSerialized) // _STA: Status
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{
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Return (0x0B)
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}
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Method (PMCF, 0, NotSerialized)
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{
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Name (CFG0, Package (0x04)
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{
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0x03,
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Package (0x02)
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{
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Zero,
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One
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},
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Package (0x02)
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{
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0x02,
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0x03
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},
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Package (0x02)
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{
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0x04,
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0x05
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}
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})
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Return (CFG0) /* \_SB_.PMIC.PMCF.CFG0 */
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}
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}
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Device (PM01)
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{
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Name (_HID, "QCOM0269") // _HID: Hardware ID
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Alias (\_SB.PSUB, _SUB)
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Name (_UID, One) // _UID: Unique ID
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Name (_DEP, Package (One) // _DEP: Dependencies
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{
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\_SB.PMIC
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})
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Method (_STA, 0, NotSerialized) // _STA: Status
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{
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Return (0x0B)
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}
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Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
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{
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Name (RBUF, ResourceTemplate ()
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{
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Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
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{
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0x00000201,
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}
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})
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Return (RBUF) /* \_SB_.PM01._CRS.RBUF */
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}
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Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
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{
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While (One)
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{
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Name (_T_0, Buffer (One) // _T_x: Emitted by ASL Compiler, x=0-9, A-Z
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{
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0x00 // .
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})
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CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.PM01._DSM._T_0 */
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If ((_T_0 == ToUUID ("4f248f40-d5e2-499f-834c-27758ea1cd3f") /* GPIO Controller */))
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{
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While (One)
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{
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Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler, x=0-9, A-Z
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_T_1 = ToInteger (Arg2)
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If ((_T_1 == Zero))
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{
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Return (Buffer (One)
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{
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0x03 // .
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})
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}
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ElseIf ((_T_1 == One))
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{
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Return (Package (0x02)
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{
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Zero,
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One
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})
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}
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Else
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{
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}
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Break
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}
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}
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Else
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{
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Return (Buffer (One)
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{
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0x00 // .
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})
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}
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Break
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}
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}
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}
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Device (PMAP)
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{
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Name (_HID, "QCOM0268") // _HID: Hardware ID
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Alias (\_SB.PSUB, _SUB)
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Name (_DEP, Package (0x03) // _DEP: Dependencies
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{
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\_SB.PMIC,
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\_SB.ABD,
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\_SB.SCM0
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})
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Method (_STA, 0, NotSerialized) // _STA: Status
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{
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Return (0x0B)
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}
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Method (GEPT, 0, NotSerialized)
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{
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Name (BUFF, Buffer (0x04){})
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CreateByteField (BUFF, Zero, STAT)
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CreateWordField (BUFF, 0x02, DATA)
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DATA = 0x02
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Return (DATA) /* \_SB_.PMAP.GEPT.DATA */
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}
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Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
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{
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Name (RBUF, Buffer (0x02)
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{
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0x79, 0x00 // y.
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})
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Return (RBUF) /* \_SB_.PMAP._CRS.RBUF */
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}
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}
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Device (PRTC)
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{
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Name (_HID, "ACPI000E" /* Time and Alarm Device */) // _HID: Hardware ID
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Name (_DEP, Package (One) // _DEP: Dependencies
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{
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\_SB.PMAP
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})
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Method (_STA, 0, NotSerialized) // _STA: Status
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{
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Return (0x0B)
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}
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Method (_GCP, 0, NotSerialized) // _GCP: Get Capabilities
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{
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Return (0x04)
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}
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Field (\_SB.ABD.ROP1, BufferAcc, NoLock, Preserve)
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{
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Connection (
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I2cSerialBusV2 (0x0002, ControllerInitiated, 0x00000000,
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AddressingMode7Bit, "\\_SB.ABD",
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0x00, ResourceConsumer, , Exclusive,
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)
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),
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AccessAs (BufferAcc, AttribRawBytes (0x18)),
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FLD0, 192
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}
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Method (_GRT, 0, NotSerialized) // _GRT: Get Real Time
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{
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Name (BUFF, Buffer (0x1A){})
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CreateField (BUFF, 0x10, 0x80, TME1)
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CreateField (BUFF, 0x90, 0x20, ACT1)
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CreateField (BUFF, 0xB0, 0x20, ACW1)
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BUFF = FLD0 /* \_SB_.PRTC.FLD0 */
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Return (TME1) /* \_SB_.PRTC._GRT.TME1 */
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}
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Method (_SRT, 1, NotSerialized) // _SRT: Set Real Time
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{
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Name (BUFF, Buffer (0x32){})
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CreateByteField (BUFF, Zero, STAT)
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CreateField (BUFF, 0x10, 0x80, TME1)
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CreateField (BUFF, 0x90, 0x20, ACT1)
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CreateField (BUFF, 0xB0, 0x20, ACW1)
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ACT1 = Zero
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TME1 = Arg0
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ACW1 = Zero
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BUFF = FLD0 = BUFF /* \_SB_.PRTC._SRT.BUFF */
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If ((STAT != Zero))
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{
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Return (One)
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}
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|
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|
Return (Zero)
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}
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}
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|
|
|
|
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Include("pmic_batt.asl")
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|
Device (PEP0)
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{
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|
Name (_HID, "QCOM0237") // _HID: Hardware ID
|
|
Name (_CID, "PNP0D80" /* Windows-compatible System Power Management Controller */) // _CID: Compatible ID
|
|
Include("thz.asl")
|
|
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Return (ResourceTemplate ()
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{
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, )
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|
{
|
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0x0000021A,
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|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, )
|
|
{
|
|
0x0000021C,
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|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, )
|
|
{
|
|
0x0000021B,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, )
|
|
{
|
|
0x0000021D,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000025,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000A1,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001A5,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000040,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000041,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000265,
|
|
}
|
|
})
|
|
}
|
|
|
|
Field (\_SB.ABD.ROP1, BufferAcc, NoLock, Preserve)
|
|
{
|
|
Connection (
|
|
I2cSerialBusV2 (0x0001, ControllerInitiated, 0x00000000,
|
|
AddressingMode7Bit, "\\_SB.ABD",
|
|
0x00, ResourceConsumer, , Exclusive,
|
|
)
|
|
),
|
|
AccessAs (BufferAcc, AttribRawBytes (0x15)),
|
|
FLD0, 168
|
|
}
|
|
|
|
Method (GEPT, 0, NotSerialized)
|
|
{
|
|
Name (BUFF, Buffer (0x04){})
|
|
CreateByteField (BUFF, Zero, STAT)
|
|
CreateWordField (BUFF, 0x02, DATA)
|
|
DATA = One
|
|
Return (DATA) /* \_SB_.PEP0.GEPT.DATA */
|
|
}
|
|
|
|
Name (ROST, Zero)
|
|
Method (NPUR, 1, NotSerialized)
|
|
{
|
|
\_SB.AGR0._PUR [One] = Arg0
|
|
Notify (\_SB.AGR0, 0x80) // Status Change
|
|
}
|
|
|
|
Method (INTR, 0, NotSerialized)
|
|
{
|
|
Name (RBUF, Package (0x18)
|
|
{
|
|
0x02,
|
|
One,
|
|
0x03,
|
|
One,
|
|
0x06,
|
|
0x17911008,
|
|
One,
|
|
Zero,
|
|
0x86000000,
|
|
0x00200000,
|
|
Zero,
|
|
Zero,
|
|
0x0C300000,
|
|
0x1000,
|
|
Zero,
|
|
Zero,
|
|
0x01FD4000,
|
|
0x08,
|
|
Zero,
|
|
Zero,
|
|
0x1799000C,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
})
|
|
Return (RBUF) /* \_SB_.PEP0.INTR.RBUF */
|
|
}
|
|
|
|
Method (CRTC, 0, NotSerialized)
|
|
{
|
|
Return (CTRX) /* \_SB_.PEP0.CTRX */
|
|
}
|
|
|
|
Name (CTRX, Package (0x0B)
|
|
{
|
|
"NSTC",
|
|
"HLCB",
|
|
"MMVD",
|
|
"DSGP",
|
|
"CCGP",
|
|
"MTPS",
|
|
"CPGP",
|
|
"DMPP",
|
|
"VRDL",
|
|
"GBDL",
|
|
"SRDL"
|
|
})
|
|
Method (STND, 0, NotSerialized)
|
|
{
|
|
Return (STNX) /* \_SB_.PEP0.STNX */
|
|
}
|
|
|
|
Name (STNX, Package (0x19)
|
|
{
|
|
"DMPO",
|
|
"DMSB",
|
|
"DMQP",
|
|
"DMMS",
|
|
"DMPA",
|
|
"DMPC",
|
|
"DMPB",
|
|
"DM0G",
|
|
"DM1G",
|
|
"DM2G",
|
|
"DM3G",
|
|
"DM4G",
|
|
"DM5G",
|
|
"DM6G",
|
|
"DM7G",
|
|
"DM8G",
|
|
"DM9G",
|
|
"DMPS",
|
|
"DMPL",
|
|
"DMDQ",
|
|
"DMPI",
|
|
"DMWE",
|
|
"XMPC",
|
|
"XMPL",
|
|
"DMEP"
|
|
})
|
|
Method (CTPM, 0, NotSerialized)
|
|
{
|
|
Name (CTPN, Package (0x02)
|
|
{
|
|
"CORE_TOPOLOGY",
|
|
0x08
|
|
})
|
|
Return (CTPN) /* \_SB_.PEP0.CTPM.CTPN */
|
|
}
|
|
|
|
Name (CCFG, Package (0x08)
|
|
{
|
|
Package (0x02)
|
|
{
|
|
"\\_SB.SYSM.CLUS.CPU0",
|
|
0x10
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"\\_SB.SYSM.CLUS.CPU1",
|
|
0x11
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"\\_SB.SYSM.CLUS.CPU2",
|
|
0x12
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"\\_SB.SYSM.CLUS.CPU3",
|
|
0x13
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"\\_SB.SYSM.CLUS.CPU4",
|
|
0x14
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"\\_SB.SYSM.CLUS.CPU5",
|
|
0x15
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"\\_SB.SYSM.CLUS.CPU6",
|
|
0x16
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"\\_SB.SYSM.CLUS.CPU7",
|
|
0x17
|
|
}
|
|
})
|
|
Method (PGCC, 0, NotSerialized)
|
|
{
|
|
Return (CCFG) /* \_SB_.PEP0.CCFG */
|
|
}
|
|
|
|
Name (DRVC, Package (0x02)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"HLOS_DRV",
|
|
0x02,
|
|
"/icb/arbiter"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DISPLAY_DRV",
|
|
0x09,
|
|
"/icb/arbiter/display"
|
|
}
|
|
})
|
|
Method (LDRV, 0, NotSerialized)
|
|
{
|
|
Return (DRVC) /* \_SB_.PEP0.DRVC */
|
|
}
|
|
|
|
Name (DCVS, Zero)
|
|
Method (PGDS, 0, NotSerialized)
|
|
{
|
|
Return (DCVS) /* \_SB_.PEP0.DCVS */
|
|
}
|
|
|
|
Name (PPPP, Package (0x32)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS1_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS2_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS3_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS4_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS5_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS6_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS7_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS9_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS1_C",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS2_C",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS3_C",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO2_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO3_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO4_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO5_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO6_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO7_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO8_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO9_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO10_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO11_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO13_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO14_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO15_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO16_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO17_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO18_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO19_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO20_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO21_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO22_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO23_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO25_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO27_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO28_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LVS1_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_LVS2_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK2_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK3_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_RFCLK1_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_RFCLK2_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_RFCLK3_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK1_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK2_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_BUCK_BOOST1_B",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH",
|
|
"PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"
|
|
}
|
|
})
|
|
Method (PPPM, 0, NotSerialized)
|
|
{
|
|
Return (PPPP) /* \_SB_.PEP0.PPPP */
|
|
}
|
|
|
|
Name (PRRP, Package (0x12)
|
|
{
|
|
"PPP_RESOURCE_RANGE_INFO_SMPS_A",
|
|
"PPP_RESOURCE_ID_SMPS1_A",
|
|
"PPP_RESOURCE_ID_SMPS13_A",
|
|
"PPP_RESOURCE_RANGE_INFO_SMPS_C",
|
|
"PPP_RESOURCE_ID_SMPS1_C",
|
|
"PPP_RESOURCE_ID_SMPS4_C",
|
|
"PPP_RESOURCE_RANGE_INFO_LDO_A",
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
"PPP_RESOURCE_ID_LDO28_A",
|
|
"PPP_RESOURCE_RANGE_INFO_LVS_A",
|
|
"PPP_RESOURCE_ID_LVS1_A",
|
|
"PPP_RESOURCE_ID_LVS2_A",
|
|
"PPP_RESOURCE_RANGE_INFO_CXO_BUFFERS_A",
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK2_A",
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A",
|
|
"PPP_RESOURCE_RANGE_INFO_BUCK_BOOST_B",
|
|
"PPP_RESOURCE_ID_BUCK_BOOST1_B",
|
|
"PPP_RESOURCE_ID_BUCK_BOOST1_B"
|
|
})
|
|
Method (PPRR, 0, NotSerialized)
|
|
{
|
|
Return (PRRP) /* \_SB_.PEP0.PRRP */
|
|
}
|
|
|
|
Method (PGSD, 0, NotSerialized)
|
|
{
|
|
Return (SDFR) /* \_SB_.PEP0.SDFR */
|
|
}
|
|
|
|
Name (FPDP, Zero)
|
|
Method (FPMD, 0, NotSerialized)
|
|
{
|
|
Return (FPDP) /* \_SB_.PEP0.FPDP */
|
|
}
|
|
|
|
Name (PPPC, Zero)
|
|
Method (PGPC, 0, NotSerialized)
|
|
{
|
|
Return (PPPC) /* \_SB_.PEP0.PPPC */
|
|
}
|
|
|
|
Method (DPRF, 0, NotSerialized)
|
|
{
|
|
Return (\_SB.DPP0)
|
|
}
|
|
|
|
Method (DMRF, 0, NotSerialized)
|
|
{
|
|
Return (\_SB.DPP1)
|
|
}
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (LPDC, 0, NotSerialized)
|
|
{
|
|
Return (NPDC) /* \_SB_.PEP0.NPDC */
|
|
}
|
|
|
|
Name (NPDC, Package (One)
|
|
{
|
|
Package (0x02)
|
|
{
|
|
"INTERRUPT_CONFIG",
|
|
Package (0x0D)
|
|
{
|
|
Package (0x04)
|
|
{
|
|
Zero,
|
|
0x021A,
|
|
Zero,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
One,
|
|
0x021B,
|
|
Zero,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
0x02,
|
|
0x021C,
|
|
Zero,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
0x03,
|
|
0x021D,
|
|
Zero,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
0x04,
|
|
0x0218,
|
|
Zero,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
0x05,
|
|
0x0219,
|
|
Zero,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
0x06,
|
|
0x0206,
|
|
Zero,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
0x07,
|
|
0x0207,
|
|
Zero,
|
|
One
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
0x08,
|
|
0x0208,
|
|
Zero,
|
|
One,
|
|
0x08
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
0x09,
|
|
0x0209,
|
|
Zero,
|
|
One,
|
|
0x08
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
0x0A,
|
|
0x020A,
|
|
Zero,
|
|
One,
|
|
0x08
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
0x0B,
|
|
0x020B,
|
|
Zero,
|
|
One,
|
|
0x08
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
0x0C,
|
|
0x0201,
|
|
Zero,
|
|
0x04
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (LPCU, 0, NotSerialized)
|
|
{
|
|
Return (NPCU) /* \_SB_.PEP0.NPCU */
|
|
}
|
|
|
|
Name (NPCU, Package (0x05)
|
|
{
|
|
"PCU_CONFIG",
|
|
0x09,
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"PCU_CLUSTER_CONFIG",
|
|
0x09
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
"PCU_PHYS_CONFIG",
|
|
0x17E00040,
|
|
0x17E10040,
|
|
0x17E20040,
|
|
0x17E30040,
|
|
0x17E40040,
|
|
0x17E50040,
|
|
0x17E60040,
|
|
0x17E70040,
|
|
0x17810104
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (LVDD, 0, NotSerialized)
|
|
{
|
|
Return (NVDD) /* \_SB_.PEP0.NVDD */
|
|
}
|
|
|
|
Name (NVDD, Package (0x06)
|
|
{
|
|
Package (0x02)
|
|
{
|
|
"/arc/client/rail_cx",
|
|
"RAIL_VOLTAGE_LEVEL_NOMINAL"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"/arc/client/display/rail_cx",
|
|
"RAIL_VOLTAGE_LEVEL_OFF"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"/arc/client/rail_mx",
|
|
"RAIL_VOLTAGE_LEVEL_NOMINAL"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"/arc/client/display/rail_mx",
|
|
"RAIL_VOLTAGE_LEVEL_OFF"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"/arc/client/rail_xo",
|
|
"XO_LEVEL_ON"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"/arc/client/display/rail_xo",
|
|
"XO_LEVEL_CRYSTAL_OFF"
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (LLMH, 0, NotSerialized)
|
|
{
|
|
Return (NLMH) /* \_SB_.PEP0.NLMH */
|
|
}
|
|
|
|
Name (NLMH, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"PEP_LMH_CFG",
|
|
Package (0x06)
|
|
{
|
|
Zero,
|
|
Zero,
|
|
0x002DB400,
|
|
0x0D02,
|
|
0x0DF7,
|
|
0x0DFC
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
One,
|
|
Zero,
|
|
0x002DB400,
|
|
0x0D02,
|
|
0x0DF7,
|
|
0x0DFC
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Name (DVMP, Package (0x02)
|
|
{
|
|
Package (0x04)
|
|
{
|
|
"PPP_RESOURCE_ID_PMIC_GPIO_DV1",
|
|
"PPP_RESOURCE_TYPE_DISCRETE_PMIC_GPIO",
|
|
Package (0x02)
|
|
{
|
|
"PM_DISCRETE_VREG_STATE_ON",
|
|
Package (0x0A)
|
|
{
|
|
Zero,
|
|
0x08,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0x05
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PM_DISCRETE_VREG_STATE_OFF",
|
|
Package (0x0A)
|
|
{
|
|
Zero,
|
|
0x08,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0x05
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PPP_RESOURCE_ID_PMIC_MPP_DV1",
|
|
"PPP_RESOURCE_TYPE_DISCRETE_PMIC_MPP",
|
|
Package (0x02)
|
|
{
|
|
"PM_DISCRETE_VREG_STATE_ON",
|
|
Package (0x06)
|
|
{
|
|
Zero,
|
|
0x03,
|
|
Zero,
|
|
0x02,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PM_DISCRETE_VREG_STATE_OFF",
|
|
Package (0x06)
|
|
{
|
|
Zero,
|
|
0x03,
|
|
Zero,
|
|
0x02,
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Method (DVMM, 0, NotSerialized)
|
|
{
|
|
Return (DVMP) /* \_SB_.PEP0.DVMP */
|
|
}
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (LDBG, 0, NotSerialized)
|
|
{
|
|
Return (NDBG) /* \_SB_.PEP0.NDBG */
|
|
}
|
|
|
|
Name (NDBG, Package (0x04)
|
|
{
|
|
"DEBUGGERS",
|
|
Package (0x05)
|
|
{
|
|
"TYPE",
|
|
"SERIAL",
|
|
Package (0x02)
|
|
{
|
|
"INSTANCES",
|
|
"\\_SB.UARD"
|
|
},
|
|
|
|
Package (0x0C)
|
|
{
|
|
"DEBUG_ON",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x07)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x00989680,
|
|
0x0682,
|
|
"HLOS_DRV",
|
|
"SUPPRESSIBLE"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x07)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
0x00989680,
|
|
0x004C4B40,
|
|
"HLOS_DRV",
|
|
"SUPPRESSIBLE"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
"DEBUG_OFF"
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"TYPE",
|
|
"USB2.0",
|
|
Package (0x02)
|
|
{
|
|
"INSTANCES",
|
|
"\\_SB.USB1"
|
|
},
|
|
|
|
Package (0x1E)
|
|
{
|
|
"DEBUG_ON",
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
0x002EEBB8,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"usb30_sec_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_sec_sleep_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_sec_sleep_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_sec_sleep_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb3_sec_phy_pipe_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb3_sec_phy_pipe_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_sec_phy_pipe_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_aggre_usb3_sec_axi_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_aggre_usb3_sec_axi_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_aggre_usb3_sec_axi_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_cfg_noc_usb3_sec_axi_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_cfg_noc_usb3_sec_axi_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_cfg_noc_usb3_sec_axi_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_sec_master_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_sec_master_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_sec_master_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb3_sec_phy_aux_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb3_sec_phy_aux_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb3_sec_phy_aux_clk",
|
|
0x08,
|
|
0x04B0,
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x07)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_1",
|
|
0x17D78400,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"SUPPRESSIBLE"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x07)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x28000000,
|
|
0x28000000,
|
|
"HLOS_DRV",
|
|
"SUPPRESSIBLE"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x04)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
0x0100,
|
|
"SUPPRESSIBLE"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
"DEBUG_OFF"
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"TYPE",
|
|
"USB3.0",
|
|
Package (0x02)
|
|
{
|
|
"INSTANCES",
|
|
"\\_SB.URS0"
|
|
},
|
|
|
|
Package (0x1E)
|
|
{
|
|
"DEBUG_ON",
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
0x002EEBB8,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"usb30_prim_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_prim_sleep_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_prim_sleep_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_prim_sleep_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_phy_pipe_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb3_prim_phy_pipe_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb3_prim_phy_pipe_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_aggre_usb3_prim_axi_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_aggre_usb3_prim_axi_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_aggre_usb3_prim_axi_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_cfg_noc_usb3_prim_axi_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_cfg_noc_usb3_prim_axi_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_cfg_noc_usb3_prim_axi_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb3_prim_phy_aux_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb3_prim_phy_aux_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb3_prim_phy_aux_clk",
|
|
0x08,
|
|
0x04B0,
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x07)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_0",
|
|
0x17D78400,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"SUPPRESSIBLE"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x07)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x28000000,
|
|
0x28000000,
|
|
"HLOS_DRV",
|
|
"SUPPRESSIBLE"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x04)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
0x0100,
|
|
"SUPPRESSIBLE"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
"DEBUG_OFF"
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (LDRS, 0, NotSerialized)
|
|
{
|
|
Return (NDRS) /* \_SB_.PEP0.NDRS */
|
|
}
|
|
|
|
Name (NDRS, Package (0x03)
|
|
{
|
|
"DEFAULT_RESOURCES",
|
|
Package (0x04)
|
|
{
|
|
"OPTIMIZATION",
|
|
"CPU_CNOC_VOTE",
|
|
"BOOT",
|
|
Package (0x02)
|
|
{
|
|
"RESOURCES",
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x06)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_CLK_CTL",
|
|
One,
|
|
One,
|
|
"SUPPRESSIBLE"
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"WORKAROUND",
|
|
"USB1_GPIO_VOTE",
|
|
"BOOT",
|
|
Package (0x05)
|
|
{
|
|
"RESOURCES",
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x2C,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (UIDL, 0, NotSerialized)
|
|
{
|
|
Return (NIDL) /* \_SB_.PEP0.NIDL */
|
|
}
|
|
|
|
Name (NIDL, Package (0x0E)
|
|
{
|
|
"MICROPEP_IDLE",
|
|
One,
|
|
Package (0x08)
|
|
{
|
|
"LPR",
|
|
"KryoSilver0",
|
|
Zero,
|
|
Zero,
|
|
Package (0x07)
|
|
{
|
|
"MODE",
|
|
"C1",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"MODE",
|
|
"C2d",
|
|
0x03E8,
|
|
0x0FA0,
|
|
Zero,
|
|
Zero,
|
|
0x02
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"MODE",
|
|
"C3",
|
|
0x0BB8,
|
|
0x1194,
|
|
0x03,
|
|
Zero,
|
|
0x40000003
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"MODE",
|
|
"C3_NI",
|
|
0x0BB8,
|
|
0x1194,
|
|
0x13,
|
|
Zero,
|
|
0x40000004
|
|
}
|
|
},
|
|
|
|
Package (0x08)
|
|
{
|
|
"LPR",
|
|
"KryoSilver1",
|
|
One,
|
|
Zero,
|
|
Package (0x07)
|
|
{
|
|
"MODE",
|
|
"C1",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"MODE",
|
|
"C2d",
|
|
0x03E8,
|
|
0x0FA0,
|
|
Zero,
|
|
Zero,
|
|
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Package (0x05)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold1",
|
|
"C1",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold0",
|
|
"C2d",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold1",
|
|
"C3",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold1",
|
|
"C3_NI",
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold2",
|
|
"C1",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold0",
|
|
"C2d",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold2",
|
|
"C3",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold2",
|
|
"C3_NI",
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold3",
|
|
"C1",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold0",
|
|
"C2d",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold3",
|
|
"C3",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold3",
|
|
"C3_NI",
|
|
0x07
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"MODE",
|
|
"D2e",
|
|
0x0FA0,
|
|
0x2710,
|
|
0x10,
|
|
Zero,
|
|
0x30,
|
|
Package (0x03)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold0",
|
|
"C3",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold0",
|
|
"C3_NI",
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold1",
|
|
"C3",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold1",
|
|
"C3_NI",
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold2",
|
|
"C3",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold2",
|
|
"C3_NI",
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold3",
|
|
"C3",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold3",
|
|
"C3_NI",
|
|
0x07
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"MODE",
|
|
"D4",
|
|
0x2EE0,
|
|
0xEA60,
|
|
0x10,
|
|
Zero,
|
|
0x40,
|
|
Package (0x03)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold0",
|
|
"C3",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold0",
|
|
"C3_NI",
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold1",
|
|
"C3",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold1",
|
|
"C3_NI",
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold2",
|
|
"C3",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold2",
|
|
"C3_NI",
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold3",
|
|
"C3",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"KryoGold3",
|
|
"C3_NI",
|
|
0x07
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"LPR",
|
|
"CCI",
|
|
0xFFFFFFFF,
|
|
0x02000000,
|
|
Package (0x09)
|
|
{
|
|
"MODE",
|
|
"E1",
|
|
0x1388,
|
|
0x6590,
|
|
0x10,
|
|
Zero,
|
|
0x0100,
|
|
Package (0x03)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"L2_Silver",
|
|
"D2e",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"L2_Silver",
|
|
"D4",
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"L2_Gold",
|
|
"D2e",
|
|
0x07
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"L2_Gold",
|
|
"D4",
|
|
0x07
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"MODE",
|
|
"E3",
|
|
0x2AF8,
|
|
0x7530,
|
|
0x10,
|
|
Zero,
|
|
0x0400,
|
|
Package (0x02)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"L2_Silver",
|
|
"D4",
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"L2_Gold",
|
|
"D4",
|
|
0x07
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"MODE",
|
|
"E3+RPM",
|
|
0x2CEC,
|
|
0x88B8,
|
|
0x10,
|
|
Zero,
|
|
0x0500,
|
|
Package (0x02)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"L2_Silver",
|
|
"D4",
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"L2_Gold",
|
|
"D4",
|
|
0x07
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"LPR",
|
|
"platform",
|
|
0xFFFFFFFF,
|
|
Zero,
|
|
Package (0x08)
|
|
{
|
|
"MODE",
|
|
"xo",
|
|
0x1388,
|
|
0x00050910,
|
|
0x20,
|
|
0x10,
|
|
0xFFFFFE00,
|
|
Package (0x02)
|
|
{
|
|
"DEPENDENCY_CONTAINER",
|
|
Package (0x04)
|
|
{
|
|
"DEPENDENCY",
|
|
"CCI",
|
|
"E3+RPM",
|
|
0x07
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (CPRZ, 0, NotSerialized)
|
|
{
|
|
Return (CPRH) /* \_SB_.PEP0.CPRH */
|
|
}
|
|
|
|
Name (CPRH, Package (0x06)
|
|
{
|
|
"CPRH_SW_SETTING",
|
|
Zero,
|
|
Package (0x05)
|
|
{
|
|
"CPRH_CHIP_INFO",
|
|
0x0141,
|
|
One,
|
|
Package (0x36)
|
|
{
|
|
"CPRH_SW_CONTROLLER_SETTING",
|
|
Zero,
|
|
"APC0",
|
|
0x17DC0000,
|
|
0x4000,
|
|
Zero,
|
|
0x14,
|
|
0x0F,
|
|
0x0C,
|
|
0x0B,
|
|
One,
|
|
0x08,
|
|
0xF0,
|
|
Zero,
|
|
Zero,
|
|
0x00017700,
|
|
0x0190,
|
|
0x04,
|
|
0x04,
|
|
0x05,
|
|
Zero,
|
|
One,
|
|
0x05,
|
|
One,
|
|
One,
|
|
One,
|
|
One,
|
|
0x17,
|
|
0x4B00,
|
|
Zero,
|
|
0x04,
|
|
One,
|
|
0x04,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
"",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x17840800,
|
|
0x0400,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
One,
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
Zero,
|
|
"L3",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
One,
|
|
"Silver",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x35)
|
|
{
|
|
"CPRH_SW_CONTROLLER_SETTING",
|
|
One,
|
|
"APC1",
|
|
0x17DB0000,
|
|
0x4000,
|
|
Zero,
|
|
0x14,
|
|
0x0F,
|
|
0x0E,
|
|
0x09,
|
|
One,
|
|
0x0E,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x00017700,
|
|
0x0190,
|
|
0x04,
|
|
0x04,
|
|
0x05,
|
|
Zero,
|
|
0x06,
|
|
0x0A,
|
|
One,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x17,
|
|
0x4B00,
|
|
Zero,
|
|
0x04,
|
|
One,
|
|
0x04,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
"",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x17830800,
|
|
0x0400,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
One,
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
Zero,
|
|
"Gold",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"CPRH_CHIP_INFO",
|
|
0x0141,
|
|
0x02,
|
|
Package (0x36)
|
|
{
|
|
"CPRH_SW_CONTROLLER_SETTING",
|
|
Zero,
|
|
"APC0",
|
|
0x17DC0000,
|
|
0x4000,
|
|
Zero,
|
|
0x14,
|
|
0x0F,
|
|
0x0C,
|
|
0x0B,
|
|
One,
|
|
0x08,
|
|
0xF0,
|
|
Zero,
|
|
Zero,
|
|
0x00017700,
|
|
0x0190,
|
|
0x04,
|
|
0x04,
|
|
0x05,
|
|
Zero,
|
|
One,
|
|
0x05,
|
|
One,
|
|
One,
|
|
One,
|
|
One,
|
|
0x17,
|
|
0x4B00,
|
|
Zero,
|
|
0x04,
|
|
One,
|
|
0x04,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
"",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x17840800,
|
|
0x0400,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
One,
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
Zero,
|
|
"L3",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
One,
|
|
"Silver",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x35)
|
|
{
|
|
"CPRH_SW_CONTROLLER_SETTING",
|
|
One,
|
|
"APC1",
|
|
0x17DB0000,
|
|
0x4000,
|
|
Zero,
|
|
0x14,
|
|
0x0F,
|
|
0x0E,
|
|
0x09,
|
|
One,
|
|
0x0E,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x00017700,
|
|
0x0190,
|
|
0x04,
|
|
0x04,
|
|
0x05,
|
|
Zero,
|
|
0x06,
|
|
0x0A,
|
|
One,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x17,
|
|
0x4B00,
|
|
Zero,
|
|
0x04,
|
|
One,
|
|
0x04,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
"",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x17830800,
|
|
0x0400,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
One,
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
Zero,
|
|
"Gold",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"CPRH_CHIP_INFO",
|
|
0x0155,
|
|
One,
|
|
Package (0x36)
|
|
{
|
|
"CPRH_SW_CONTROLLER_SETTING",
|
|
Zero,
|
|
"APC0",
|
|
0x17DC0000,
|
|
0x4000,
|
|
Zero,
|
|
0x14,
|
|
0x0F,
|
|
0x0C,
|
|
0x0B,
|
|
One,
|
|
0x08,
|
|
0xF0,
|
|
Zero,
|
|
Zero,
|
|
0x00017700,
|
|
0x0190,
|
|
0x04,
|
|
0x04,
|
|
0x05,
|
|
Zero,
|
|
One,
|
|
0x05,
|
|
One,
|
|
One,
|
|
One,
|
|
One,
|
|
0x17,
|
|
0x4B00,
|
|
Zero,
|
|
0x04,
|
|
One,
|
|
0x04,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
"",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x17840800,
|
|
0x0400,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
One,
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
Zero,
|
|
"Silver",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
One,
|
|
"L3",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x35)
|
|
{
|
|
"CPRH_SW_CONTROLLER_SETTING",
|
|
One,
|
|
"APC1",
|
|
0x17DB0000,
|
|
0x4000,
|
|
Zero,
|
|
0x14,
|
|
0x0F,
|
|
0x0E,
|
|
0x09,
|
|
One,
|
|
0x0E,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x00017700,
|
|
0x0190,
|
|
0x04,
|
|
0x04,
|
|
0x05,
|
|
Zero,
|
|
0x06,
|
|
0x0A,
|
|
One,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x17,
|
|
0x4B00,
|
|
Zero,
|
|
0x04,
|
|
One,
|
|
0x04,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
"",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x17830800,
|
|
0x0400,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
One,
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
Zero,
|
|
"Gold",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"CPRH_CHIP_INFO",
|
|
0x0155,
|
|
0x02,
|
|
Package (0x36)
|
|
{
|
|
"CPRH_SW_CONTROLLER_SETTING",
|
|
Zero,
|
|
"APC0",
|
|
0x17DC0000,
|
|
0x4000,
|
|
Zero,
|
|
0x14,
|
|
0x0F,
|
|
0x0C,
|
|
0x0B,
|
|
One,
|
|
0x08,
|
|
0xF0,
|
|
Zero,
|
|
Zero,
|
|
0x00017700,
|
|
0x0190,
|
|
0x04,
|
|
0x04,
|
|
0x05,
|
|
Zero,
|
|
One,
|
|
0x05,
|
|
One,
|
|
One,
|
|
One,
|
|
One,
|
|
0x17,
|
|
0x4B00,
|
|
Zero,
|
|
0x04,
|
|
One,
|
|
0x04,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
"",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x17840800,
|
|
0x0400,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
One,
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
Zero,
|
|
"Silver",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
One,
|
|
"L3",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x35)
|
|
{
|
|
"CPRH_SW_CONTROLLER_SETTING",
|
|
One,
|
|
"APC1",
|
|
0x17DB0000,
|
|
0x4000,
|
|
Zero,
|
|
0x14,
|
|
0x0F,
|
|
0x0E,
|
|
0x09,
|
|
One,
|
|
0x0E,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x00017700,
|
|
0x0190,
|
|
0x04,
|
|
0x04,
|
|
0x05,
|
|
Zero,
|
|
0x06,
|
|
0x0A,
|
|
One,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x17,
|
|
0x4B00,
|
|
Zero,
|
|
0x04,
|
|
One,
|
|
0x04,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
"",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x17830800,
|
|
0x0400,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
One,
|
|
Package (0x07)
|
|
{
|
|
"CPRH_SW_THREAD_SETTING",
|
|
Zero,
|
|
"Gold",
|
|
0x02,
|
|
0x02,
|
|
Zero,
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Name (NDCV, Package (0x05)
|
|
{
|
|
Package (0x08)
|
|
{
|
|
"CHIP_INFO",
|
|
0x0141,
|
|
One,
|
|
Zero,
|
|
0x02,
|
|
Package (0x06)
|
|
{
|
|
"BIG",
|
|
0x04,
|
|
"apcs_gold_sysleaf_clk",
|
|
Package (0x03)
|
|
{
|
|
0x012C,
|
|
0x040D,
|
|
0x0626
|
|
},
|
|
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x09,
|
|
0x10
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"LITTLE",
|
|
0x04,
|
|
"apcs_silver_sysleaf_clk",
|
|
Package (0x03)
|
|
{
|
|
0x012C,
|
|
0x04BA,
|
|
0x063A
|
|
},
|
|
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x0B,
|
|
0x10
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"L3_CACHE",
|
|
"apcs_l3_sysleaf_clk"
|
|
}
|
|
},
|
|
|
|
Package (0x08)
|
|
{
|
|
"CHIP_INFO",
|
|
0x0141,
|
|
0x02,
|
|
Zero,
|
|
0x02,
|
|
Package (0x06)
|
|
{
|
|
"BIG",
|
|
0x04,
|
|
"apcs_gold_sysleaf_clk",
|
|
Package (0x03)
|
|
{
|
|
0x033A,
|
|
0x0553,
|
|
0x05B4
|
|
},
|
|
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x07,
|
|
0x0F
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"LITTLE",
|
|
0x04,
|
|
"apcs_silver_sysleaf_clk",
|
|
Package (0x03)
|
|
{
|
|
0x012C,
|
|
0x04CD,
|
|
0x052D
|
|
},
|
|
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x0B,
|
|
0x0F
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"L3_CACHE",
|
|
"apcs_l3_sysleaf_clk"
|
|
}
|
|
},
|
|
|
|
Package (0x08)
|
|
{
|
|
"CHIP_INFO",
|
|
0x0155,
|
|
One,
|
|
Zero,
|
|
0x02,
|
|
Package (0x06)
|
|
{
|
|
"BIG",
|
|
0x04,
|
|
"apcs_gold_sysleaf_clk",
|
|
Package (0x03)
|
|
{
|
|
0x012C,
|
|
0x040D,
|
|
0x0626
|
|
},
|
|
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x09,
|
|
0x10
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"LITTLE",
|
|
0x04,
|
|
"apcs_silver_sysleaf_clk",
|
|
Package (0x03)
|
|
{
|
|
0x012C,
|
|
0x04BA,
|
|
0x063A
|
|
},
|
|
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x0B,
|
|
0x10
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"L3_CACHE",
|
|
"apcs_l3_sysleaf_clk"
|
|
}
|
|
},
|
|
|
|
Package (0x08)
|
|
{
|
|
"CHIP_INFO",
|
|
0x0155,
|
|
0x02,
|
|
Zero,
|
|
0x02,
|
|
Package (0x06)
|
|
{
|
|
"BIG",
|
|
0x04,
|
|
"apcs_gold_sysleaf_clk",
|
|
Package (0x03)
|
|
{
|
|
0x033A,
|
|
0x0553,
|
|
0x05B4
|
|
},
|
|
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x07,
|
|
0x0F
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"LITTLE",
|
|
0x04,
|
|
"apcs_silver_sysleaf_clk",
|
|
Package (0x03)
|
|
{
|
|
0x012C,
|
|
0x04CD,
|
|
0x052D
|
|
},
|
|
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x0B,
|
|
0x0F
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"L3_CACHE",
|
|
"apcs_l3_sysleaf_clk"
|
|
}
|
|
},
|
|
|
|
Package (0x08)
|
|
{
|
|
"CHIP_INFO",
|
|
0x015C,
|
|
0x02,
|
|
Zero,
|
|
0x02,
|
|
Package (0x06)
|
|
{
|
|
"BIG",
|
|
0x04,
|
|
"apcs_gold_sysleaf_clk",
|
|
Package (0x03)
|
|
{
|
|
0x033A,
|
|
0x0553,
|
|
0x05B4
|
|
},
|
|
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x07,
|
|
0x0F
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"LITTLE",
|
|
0x04,
|
|
"apcs_silver_sysleaf_clk",
|
|
Package (0x03)
|
|
{
|
|
0x012C,
|
|
0x04CD,
|
|
0x052D
|
|
},
|
|
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x0B,
|
|
0x0F
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"L3_CACHE",
|
|
"apcs_l3_sysleaf_clk"
|
|
}
|
|
}
|
|
})
|
|
Method (LDCV, 0, NotSerialized)
|
|
{
|
|
Return (NDCV) /* \_SB_.PEP0.NDCV */
|
|
}
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (CTSN, 0, NotSerialized)
|
|
{
|
|
Return (THSD) /* \_SB_.PEP0.THSD */
|
|
}
|
|
|
|
Method (PEPH, 0, NotSerialized)
|
|
{
|
|
Return (Package (One)
|
|
{
|
|
"ACPI\\VEN_QCOM&DEV_0237"
|
|
})
|
|
}
|
|
|
|
Method (BCLH, 0, NotSerialized)
|
|
{
|
|
Return (Package (One)
|
|
{
|
|
"ACPI\\VEN_QCOM&DEV_0294"
|
|
})
|
|
}
|
|
|
|
Name (THSD, Package (0x07)
|
|
{
|
|
Package (0x16)
|
|
{
|
|
0x15,
|
|
Package (0x02)
|
|
{
|
|
"ACPI\\VEN_QCOM&DEV_027F",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ACPI\\VEN_QCOM&DEV_0280",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ACPI\\VEN_QCOM&DEV_0281",
|
|
0x02
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ACPI\\VEN_QCOM&DEV_0282",
|
|
0x03
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ACPI\\VEN_QCOM&DEV_0283",
|
|
0x04
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ACPI\\VEN_QCOM&DEV_0284",
|
|
0x05
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ACPI\\VEN_QCOM&DEV_0285",
|
|
0x06
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ACPI\\VEN_QCOM&DEV_0286",
|
|
0x07
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ACPI\\VEN_QCOM&DEV_0287",
|
|
0x08
|
|
},
|
|
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{
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Package (0x02)
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{
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Package (0x02)
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Package (0x02)
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0x0B,
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0x0C,
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0x0E,
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{
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Package (0x04)
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{
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"SYS_THERM3",
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{
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"PMIC_THERM",
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{
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"BAT_THERM",
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{
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0x53
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Scope (\_SB.PEP0)
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{
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Method (APMD, 0, NotSerialized)
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{
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Zero,
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Zero
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{
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Zero,
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"FSTATE",
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{
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"FSTATE",
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Package (0x04)
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{
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{
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"COMPONENT",
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{
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Package (0x02)
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Package (0x04)
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{
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{
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Package (0x02)
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{
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"FSTATE",
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Package (0x04)
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{
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"COMPONENT",
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0x0C,
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Package (0x02)
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{
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"FSTATE",
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Package (0x02)
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{
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"FSTATE",
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Package (0x04)
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{
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0x0D,
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{
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"FSTATE",
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Package (0x02)
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{
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"FSTATE",
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Package (0x04)
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{
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"COMPONENT",
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0x0E,
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{
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"FSTATE",
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Package (0x02)
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{
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"FSTATE",
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Package (0x04)
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{
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{
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Package (0x04)
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{
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{
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Package (0x02)
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{
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"FSTATE",
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Package (0x04)
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{
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0x11,
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{
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Package (0x02)
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"FSTATE",
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Package (0x04)
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{
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0x12,
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{
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Package (0x02)
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{
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"FSTATE",
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Package (0x04)
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{
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0x13,
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{
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"FSTATE",
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Package (0x02)
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{
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"FSTATE",
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Package (0x04)
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{
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0x14,
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"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
0x15,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
0x16,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
0x17,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.ADSP.SLM1.ADCM.AUDD.MBHC",
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (GPMD, 0, NotSerialized)
|
|
{
|
|
Name (LIST, Package (0x0B)
|
|
{
|
|
"METHOD_LIST",
|
|
"DM0G",
|
|
"DM1G",
|
|
"DM2G",
|
|
"DM3G",
|
|
"DM4G",
|
|
"DM5G",
|
|
"DM6G",
|
|
"DM7G",
|
|
"DM8G",
|
|
"DM9G"
|
|
})
|
|
Return (LIST) /* \_SB_.PEP0.GPMD.LIST */
|
|
}
|
|
|
|
Method (G0MD, 0, NotSerialized)
|
|
{
|
|
Name (GPCC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.GPU0",
|
|
Package (0x0C)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x12)
|
|
{
|
|
"ENTER",
|
|
Package (One)
|
|
{
|
|
"PSTATE_SAVE"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x04,
|
|
0x2A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"phy_refgen_south",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICGPIO",
|
|
Package (0x08)
|
|
{
|
|
"IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT",
|
|
Zero,
|
|
0x11,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x60,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x7B,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO14_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS6_A",
|
|
0x02,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A",
|
|
0x06,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x80,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x11)
|
|
{
|
|
"EXIT",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (One)
|
|
{
|
|
"PSTATE_RESTORE"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
0x07,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
0x07,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO14_A",
|
|
One,
|
|
0x001CAFC0,
|
|
One,
|
|
0x07,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS6_A",
|
|
0x02,
|
|
0x000C3500,
|
|
One,
|
|
0x07,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICGPIO",
|
|
Package (0x08)
|
|
{
|
|
"IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT",
|
|
Zero,
|
|
0x11,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
One,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
0x0A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x7B,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0x03,
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x80,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0x03,
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x03)
|
|
{
|
|
"PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A",
|
|
0x06,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICGPIO",
|
|
Package (0x08)
|
|
{
|
|
"IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT",
|
|
Zero,
|
|
0x0F,
|
|
Zero,
|
|
Zero,
|
|
0x04,
|
|
0x03,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
0x96
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"phy_refgen_south",
|
|
One
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"INIT_FSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
"PSTATE_SET",
|
|
0x02,
|
|
Package (0x12)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_intf_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_intf_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_intf_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_intf_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_intf_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_intf_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_intf_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_intf_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_intf_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_intf_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE_SET",
|
|
0x03,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x19A14780,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x11C31E80,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x18964020,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x11C31E80,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x14810600,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x11E1A300,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x10642AC0,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x0BEBC200,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x0A37CADB,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x07,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x09D5B340,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x08,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x08F0D180,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x09,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x05F5E100,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0A,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x051BD4B0,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0B,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x0124F800,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0C,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
Zero,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
0x04
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
0x04
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x30)
|
|
{
|
|
"PSTATE_SET",
|
|
0x04,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000031A4A9F80,
|
|
0x000000031A4A9F80
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x000000031A4A9F80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x0000000302731B80,
|
|
0x0000000302731B80
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x0000000302731B80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x00000002EA9B9780,
|
|
0x00000002EA9B9780
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x00000002EA9B9780
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x00000002D2C41380,
|
|
0x00000002D2C41380
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x00000002D2C41380
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x00000002BAEC8F80,
|
|
0x00000002BAEC8F80
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x00000002BAEC8F80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x00000002A3150B80,
|
|
0x00000002A3150B80
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x00000002A3150B80
|
|
}
|
|
}
|
|
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0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x00000001F4ADD400,
|
|
0xA6E49C00
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0xA6E49C00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x1B,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x00000001AD274800,
|
|
0x8F0D1800
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x8F0D1800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x1C,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x0000000165A0BC00,
|
|
0x77359400
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x77359400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x1D,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x5F5E1000
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x5F5E1000
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x1E,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x59682F00
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x59682F00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x1F,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x53724E00
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x53724E00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x20,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x4D7C6D00
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x4D7C6D00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x21,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x47868C00
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x47868C00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x22,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x4190AB00
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x4190AB00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x23,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x3B9ACA00
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x3B9ACA00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x24,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x35A4E900
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x35A4E900
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x25,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x2FAF0800
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x2FAF0800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x26,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x29B92700
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x29B92700
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x27,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x23C34600
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x23C34600
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x28,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x1DCD6500
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x1DCD6500
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x29,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x17D78400
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x17D78400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x2A,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
0x1F
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
0x1F
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
0x1F
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Return (GPCC) /* \_SB_.PEP0.G0MD.GPCC */
|
|
}
|
|
|
|
Method (G1MD, 0, NotSerialized)
|
|
{
|
|
Name (GPCC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.GPU0",
|
|
Package (0x0B)
|
|
{
|
|
"COMPONENT",
|
|
One,
|
|
Package (0x03)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x08)
|
|
{
|
|
"ENTER",
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gpu_cc_cxo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gpu_cc_cx_gmu_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_gpu_memnoc_gfx_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gpu_cc_gx_gfx3d_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gpu_cc_cx_gmu_clk",
|
|
0x03,
|
|
0x0BEBC200,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_GFX3D",
|
|
"ICBID_SLAVE_EBI1",
|
|
One,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x06)
|
|
{
|
|
"ENTER",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gpu_cc_gx_gfx3d_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_gpu_memnoc_gfx_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gpu_cc_cx_gmu_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gpu_cc_cxo_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"FSTATE",
|
|
0x02,
|
|
Package (0x07)
|
|
{
|
|
"ENTER",
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_GFX3D",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gpu_cc_gx_gfx3d_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_gpu_memnoc_gfx_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gpu_cc_cx_gmu_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gpu_cc_cxo_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"INIT_FSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_FSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_FSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x08)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"cx_gdsc",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"cx_gdsc",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
One
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Return (GPCC) /* \_SB_.PEP0.G1MD.GPCC */
|
|
}
|
|
|
|
Method (G2MD, 0, NotSerialized)
|
|
{
|
|
Name (GPCC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.GPU0",
|
|
Package (0x0C)
|
|
{
|
|
"COMPONENT",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x0B)
|
|
{
|
|
"ENTER",
|
|
Package (One)
|
|
{
|
|
"PSTATE_SAVE"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
0x31
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"EXIT",
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (One)
|
|
{
|
|
"PSTATE_RESTORE"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
0x02,
|
|
Package (0x0F)
|
|
{
|
|
"ENTER",
|
|
Package (One)
|
|
{
|
|
"PSTATE_SAVE"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
0x31
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0D)
|
|
{
|
|
"EXIT",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (One)
|
|
{
|
|
"PSTATE_RESTORE"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"INIT_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_FSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_FSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE_SET",
|
|
0x02,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x19A14780,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x11C31E80,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x18964020,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x11C31E80,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x14810600,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x11E1A300,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x10642AC0,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x0BEBC200,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x0A37CADB,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x07,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x09D5B340,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x08,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x08F0D180,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x09,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x05F5E100,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0A,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x051BD4B0,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0B,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x0124F800,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0C,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
Zero,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
0x08
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
0x08
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x34)
|
|
{
|
|
"PSTATE_SET",
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x000000031A4A9F80,
|
|
0x000000031A4A9F80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x0000000302731B80,
|
|
0x0000000302731B80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x00000002EA9B9780,
|
|
0x00000002EA9B9780
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x00000002D2C41380,
|
|
0x00000002D2C41380
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x00000002BAEC8F80,
|
|
0x00000002BAEC8F80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x00000002A3150B80,
|
|
0x00000002A3150B80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
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|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x2B,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x35A4E900,
|
|
0x35A4E900
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x2C,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x2FAF0800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x2D,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x29B92700,
|
|
0x29B92700
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x2E,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x23C34600,
|
|
0x23C34600
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x2F,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x1DCD6500,
|
|
0x1DCD6500
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x30,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x17D78400,
|
|
0x17D78400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x31,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Return (GPCC) /* \_SB_.PEP0.G2MD.GPCC */
|
|
}
|
|
|
|
Method (G3MD, 0, NotSerialized)
|
|
{
|
|
Name (GPCC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.GPU0",
|
|
Package (0x0C)
|
|
{
|
|
"COMPONENT",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x0C)
|
|
{
|
|
"ENTER",
|
|
Package (One)
|
|
{
|
|
"PSTATE_SAVE"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
0x31
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rot_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"EXIT",
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rot_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (One)
|
|
{
|
|
"PSTATE_RESTORE"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x04
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
0x02,
|
|
Package (0x10)
|
|
{
|
|
"ENTER",
|
|
Package (One)
|
|
{
|
|
"PSTATE_SAVE"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
0x31
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rot_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0F)
|
|
{
|
|
"EXIT",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rot_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (One)
|
|
{
|
|
"PSTATE_RESTORE"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x04
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"INIT_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_FSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_FSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
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{
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"CLOCK",
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One
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{
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One
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"FOOTSWITCH",
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"CLOCK",
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0x02
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{
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"CLOCK",
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{
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"gcc_disp_xo_clk",
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0x02
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"PSTATE_SET",
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"PSTATE",
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{
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"CLOCK",
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{
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"disp_cc_mdss_rot_clk",
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0x03,
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0x19A14780,
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One
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{
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"ICBID_MASTER_APPSS_PROC",
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0x11C31E80,
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Zero
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Package (0x04)
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{
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"PSTATE",
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"CLOCK",
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"disp_cc_mdss_rot_clk",
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0x03,
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0x18964020,
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One
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Package (0x02)
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{
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"BUSARB",
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_DISPLAY_CFG",
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0x11C31E80,
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Zero
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x02,
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{
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"CLOCK",
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Package (0x04)
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{
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"disp_cc_mdss_rot_clk",
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0x03,
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0x14810600,
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One
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Package (0x02)
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_DISPLAY_CFG",
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0x08D24D00,
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Zero
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x03,
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{
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"CLOCK",
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Package (0x04)
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{
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"disp_cc_mdss_rot_clk",
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0x03,
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0x11E1A300,
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One
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Package (0x02)
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{
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"BUSARB",
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_DISPLAY_CFG",
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0x08D24D00,
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Zero
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Package (0x04)
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{
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"PSTATE",
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0x04,
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{
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"CLOCK",
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Package (0x04)
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{
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"disp_cc_mdss_rot_clk",
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0x03,
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0x0A37CADB,
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One
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Package (0x02)
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{
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"BUSARB",
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_DISPLAY_CFG",
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0x047868C0,
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Zero
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{
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"CLOCK",
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"disp_cc_mdss_rot_clk",
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0x03,
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0x09D5B340,
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One
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Package (0x02)
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{
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"BUSARB",
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_DISPLAY_CFG",
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0x047868C0,
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Zero
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Package (0x04)
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{
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"PSTATE",
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0x06,
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{
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"CLOCK",
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{
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"disp_cc_mdss_rot_clk",
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0x03,
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0x0124F800,
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One
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Package (0x02)
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{
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"BUSARB",
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_DISPLAY_CFG",
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0x047868C0,
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Zero
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Package (0x04)
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{
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0x07,
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"CLOCK",
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"disp_cc_mdss_rot_clk",
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{
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0x03,
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"ICBID_SLAVE_DISPLAY_CFG",
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Zero,
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Zero
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0x05
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"PREPARE_PSTATE",
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0x05
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0x000000031A4A9F80,
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0x000000031A4A9F80
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0x0000000302731B80,
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0x0000000302731B80
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0x00000002EA9B9780,
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0x00000002D2C41380,
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0x00000002BAEC8F80,
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0x00000002A3150B80,
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0x000000028B3D8780,
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0x0000000273660380,
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0x0000000273660380
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Package (0x03)
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{
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0x08,
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0x000000025B8E7F80,
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0x000000025B8E7F80
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Package (0x03)
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{
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0x09,
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0x0000000243B6FB80,
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0x0000000243B6FB80
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{
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0x0A,
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0x000000022BDF7780,
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0x000000022BDF7780
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{
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0x000000021407F380,
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{
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0x0C,
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0x00000001FC306F80,
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{
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0x0D,
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0x00000001E458EB80,
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0x00000001CC816780,
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0x00000001B4A9E380,
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0x0000000184FADB80,
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0x0000000184FADB80
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|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x000000016D235780,
|
|
0x000000016D235780
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x13,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x00000001554BD380,
|
|
0x00000001554BD380
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x14,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x000000013D744F80,
|
|
0x000000013D744F80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x15,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x00000001259CCB80,
|
|
0x00000001259CCB80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x16,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x000000010DC54780,
|
|
0x000000010DC54780
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x17,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xF5EDC380,
|
|
0xF5EDC380
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x18,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xDE163F80,
|
|
0xDE163F80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x19,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xC63EBB80,
|
|
0xC63EBB80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x1A,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xAE673780,
|
|
0xAE673780
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x1B,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x968FB380,
|
|
0x968FB380
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x1C,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x8F0D1800,
|
|
0x8F0D1800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x1D,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x89173700,
|
|
0x89173700
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x1E,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x83215600,
|
|
0x83215600
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x1F,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x7D2B7500,
|
|
0x7D2B7500
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x20,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x77359400,
|
|
0x77359400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x21,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x713FB300,
|
|
0x713FB300
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x22,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x6B49D200,
|
|
0x6B49D200
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x23,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x6553F100,
|
|
0x6553F100
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x24,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x5F5E1000,
|
|
0x5F5E1000
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x25,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x59682F00,
|
|
0x59682F00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x26,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x53724E00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x27,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x4D7C6D00,
|
|
0x4D7C6D00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x28,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x47868C00,
|
|
0x47868C00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x29,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x4190AB00,
|
|
0x4190AB00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x2A,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x3B9ACA00,
|
|
0x3B9ACA00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x2B,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x35A4E900,
|
|
0x35A4E900
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x2C,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x2FAF0800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x2D,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x29B92700,
|
|
0x29B92700
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x2E,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x23C34600,
|
|
0x23C34600
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x2F,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x1DCD6500,
|
|
0x1DCD6500
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x30,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x17D78400,
|
|
0x17D78400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x31,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Return (GPCC) /* \_SB_.PEP0.G3MD.GPCC */
|
|
}
|
|
|
|
Method (G4MD, 0, NotSerialized)
|
|
{
|
|
Name (GPCC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.GPU0",
|
|
Package (0x0C)
|
|
{
|
|
"COMPONENT",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x09)
|
|
{
|
|
"ENTER",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_ahb_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"EXIT",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
One
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
0x02,
|
|
Package (0x13)
|
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{
|
|
"ENTER",
|
|
Package (One)
|
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{
|
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"PSTATE_SAVE"
|
|
},
|
|
|
|
Package (0x02)
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{
|
|
"PSTATE_ADJUST",
|
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Package (0x02)
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{
|
|
0x02,
|
|
0x06
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
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{
|
|
0x03,
|
|
0x6E
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec1_gdsc",
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec1_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec0_gdsc",
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec0_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"venus_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x18)
|
|
{
|
|
"EXIT",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"venus_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec0_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec0_gdsc",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec1_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec1_gdsc",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
0x09,
|
|
0x12
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
0x09,
|
|
0x12
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
0x09,
|
|
0x12
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
0x09,
|
|
0x14
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
0x09,
|
|
0x14
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
0x09,
|
|
0x14
|
|
}
|
|
},
|
|
|
|
Package (One)
|
|
{
|
|
"PSTATE_RESTORE"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"INIT_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_FSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_FSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x11)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
0x0A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_axi_clk",
|
|
0x0A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
0x0A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_axi_clk",
|
|
0x0A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
0x0A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_axi_clk",
|
|
0x0A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ahb_clk",
|
|
0x0A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ahb_clk",
|
|
0x0B
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_axi_clk",
|
|
0x0B
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
0x0B
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_axi_clk",
|
|
0x0B
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
0x0B
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_axi_clk",
|
|
0x0B
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
0x0B
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x0A)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
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0x11E1A300,
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0x11E1A300,
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}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x4F,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x00000001718C7E00,
|
|
0x00000001718C7E00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x50,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x0000000165A0BC00,
|
|
0x0000000165A0BC00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x51,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x0000000159B4FA00,
|
|
0x0000000159B4FA00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x52,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x000000014DC93800,
|
|
0x000000014DC93800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x53,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x0000000141DD7600,
|
|
0x0000000141DD7600
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x54,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x0000000135F1B400,
|
|
0x0000000135F1B400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x55,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x000000012A05F200,
|
|
0x000000012A05F200
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x56,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x000000011E1A3000,
|
|
0x000000011E1A3000
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x57,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x00000001122E6E00,
|
|
0x00000001122E6E00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x58,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x000000010642AC00,
|
|
0x000000010642AC00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x59,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xFA56EA00,
|
|
0xFA56EA00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x5A,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xEE6B2800,
|
|
0xEE6B2800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x5B,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xE27F6600,
|
|
0xE27F6600
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x5C,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xD693A400,
|
|
0xD693A400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x5D,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xCAA7E200,
|
|
0xCAA7E200
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x5E,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xBEBC2000,
|
|
0xBEBC2000
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x5F,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xB2D05E00,
|
|
0xB2D05E00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x60,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0xA6E49C00,
|
|
0xA6E49C00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x61,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x9AF8DA00,
|
|
0x9AF8DA00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x62,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x8F0D1800,
|
|
0x8F0D1800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x63,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x83215600,
|
|
0x83215600
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x64,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x77359400,
|
|
0x77359400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x65,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x6B49D200,
|
|
0x6B49D200
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x66,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x5F5E1000,
|
|
0x5F5E1000
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x67,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x53724E00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x68,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x47868C00,
|
|
0x47868C00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x69,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x3B9ACA00,
|
|
0x3B9ACA00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x6A,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x2FAF0800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x6B,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x23C34600,
|
|
0x23C34600
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x6C,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x17D78400,
|
|
0x17D78400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x6D,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x0BEBC200,
|
|
0x0BEBC200
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x6E,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P0",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
0x6C
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
0x6C
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
0x6C
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Return (GPCC) /* \_SB_.PEP0.G4MD.GPCC */
|
|
}
|
|
|
|
Method (G5MD, 0, NotSerialized)
|
|
{
|
|
Name (GPCC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.GPU0",
|
|
Package (0x0A)
|
|
{
|
|
"COMPONENT",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"INIT_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE_SET",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Return (GPCC) /* \_SB_.PEP0.G5MD.GPCC */
|
|
}
|
|
|
|
Method (G6MD, 0, NotSerialized)
|
|
{
|
|
Name (GPCC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.GPU0",
|
|
Package (0x0C)
|
|
{
|
|
"COMPONENT",
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x09)
|
|
{
|
|
"ENTER",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_ahb_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"EXIT",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
One
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
0x02,
|
|
Package (0x13)
|
|
{
|
|
"ENTER",
|
|
Package (One)
|
|
{
|
|
"PSTATE_SAVE"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x06
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
0x6E
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec1_gdsc",
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec1_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec0_gdsc",
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec0_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"venus_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x18)
|
|
{
|
|
"EXIT",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_video_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"venus_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec0_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec0_gdsc",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec1_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"vcodec1_gdsc",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
0x09,
|
|
0x12
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
0x09,
|
|
0x12
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
0x09,
|
|
0x12
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_vcodec0_core_clk",
|
|
0x09,
|
|
0x14
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
0x09,
|
|
0x14
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"video_cc_venus_ctl_core_clk",
|
|
0x09,
|
|
0x14
|
|
}
|
|
},
|
|
|
|
Package (One)
|
|
{
|
|
"PSTATE_RESTORE"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"INIT_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_FSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_FSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x11)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_core_clk",
|
|
0x0A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"video_cc_vcodec1_axi_clk",
|
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{
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{
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"PRELOAD_PSTATE",
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0x11E1A300,
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0x08F0D180,
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"ICBID_SLAVE_VENUS_CFG",
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0x08F0D180,
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{
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"video_cc_vcodec0_core_clk",
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{
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"CLOCK",
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0x047868C0,
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0x047868C0,
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{
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0x03,
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0x03
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|
|
"ICBID_SLAVE_EBI1",
|
|
0x0BEBC200,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x6E,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_VIDEO_P1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
0x6C
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
0x6C
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
0x6C
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Return (GPCC) /* \_SB_.PEP0.G6MD.GPCC */
|
|
}
|
|
|
|
Method (G7MD, 0, NotSerialized)
|
|
{
|
|
Name (GPCC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.GPU0",
|
|
Package (0x0C)
|
|
{
|
|
"COMPONENT",
|
|
0x07,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x09)
|
|
{
|
|
"ENTER",
|
|
Package (One)
|
|
{
|
|
"PSTATE_SAVE"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x04,
|
|
0x2A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"phy_refgen_south",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"EXIT",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"phy_refgen_south",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (One)
|
|
{
|
|
"PSTATE_RESTORE"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"INIT_FSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
"PSTATE_SET",
|
|
0x02,
|
|
Package (0x12)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_intf_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_intf_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_intf_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_intf_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_intf_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_intf_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_intf_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_intf_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte0_intf_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_pclk1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_esc1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_byte1_intf_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE_SET",
|
|
0x03,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x19A14780,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x11C31E80,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x18964020,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x11C31E80,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x14810600,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x11E1A300,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x10642AC0,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x0BEBC200,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x0A37CADB,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x07,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x09D5B340,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x08,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
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0x08F0D180,
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One
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},
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
|
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"ICBID_MASTER_APPSS_PROC",
|
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"ICBID_SLAVE_DISPLAY_CFG",
|
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0x047868C0,
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Zero
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}
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x09,
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{
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"CLOCK",
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Package (0x04)
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{
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"disp_cc_mdss_mdp_clk",
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0x03,
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0x05F5E100,
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One
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}
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},
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_DISPLAY_CFG",
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0x047868C0,
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Zero
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}
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x0A,
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{
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"CLOCK",
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Package (0x04)
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{
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"disp_cc_mdss_mdp_clk",
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0x03,
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0x051BD4B0,
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One
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}
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},
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Package (0x02)
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_DISPLAY_CFG",
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0x047868C0,
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Zero
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}
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x0B,
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{
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"CLOCK",
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Package (0x04)
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{
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"disp_cc_mdss_mdp_clk",
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0x03,
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0x0124F800,
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One
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}
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},
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Package (0x02)
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_DISPLAY_CFG",
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0x047868C0,
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Zero
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}
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x0C,
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Package (0x02)
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{
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"CLOCK",
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Package (0x04)
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{
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"disp_cc_mdss_mdp_clk",
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0x03,
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Zero,
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One
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}
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},
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_DISPLAY_CFG",
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Zero,
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Zero
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}
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}
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},
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Package (0x02)
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{
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"PRELOAD_PSTATE",
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0x04
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},
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Package (0x02)
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{
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"PREPARE_PSTATE",
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0x04
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},
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Package (0x02)
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{
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"ABANDON_PSTATE",
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0x04
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},
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Package (0x30)
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{
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"PSTATE_SET",
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0x04,
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{
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"PSTATE",
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Zero,
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x000000031A4A9F80,
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0x000000031A4A9F80
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}
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},
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x000000031A4A9F80
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}
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}
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},
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Package (0x04)
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{
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"PSTATE",
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x0000000302731B80,
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0x0000000302731B80
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}
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},
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x0000000302731B80
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}
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x02,
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x00000002EA9B9780,
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0x00000002EA9B9780
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}
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},
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x00000002EA9B9780
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}
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x03,
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x00000002D2C41380,
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0x00000002D2C41380
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}
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},
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Package (0x02)
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x00000002D2C41380
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x04,
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x00000002BAEC8F80,
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0x00000002BAEC8F80
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Package (0x02)
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x00000002BAEC8F80
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}
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x05,
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x00000002A3150B80,
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0x00000002A3150B80
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Package (0x02)
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{
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"BUSARB",
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x00000002A3150B80
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},
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Package (0x04)
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{
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"PSTATE",
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0x06,
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x000000028B3D8780,
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0x000000028B3D8780
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Package (0x02)
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x000000028B3D8780
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},
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Package (0x04)
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{
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"PSTATE",
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0x07,
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x0000000273660380,
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0x0000000273660380
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Package (0x02)
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{
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"BUSARB",
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x0000000273660380
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Package (0x04)
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{
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"PSTATE",
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0x08,
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x000000025B8E7F80,
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0x000000025B8E7F80
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Package (0x02)
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x000000025B8E7F80
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Package (0x04)
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{
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"PSTATE",
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0x09,
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x000000023C346000,
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0x000000023C346000
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x000000023C346000
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x0A,
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x000000023C346000,
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0x00000002245CDC00
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x00000002245CDC00
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}
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}
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},
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|
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Package (0x04)
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{
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"PSTATE",
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0x0B,
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x000000023C346000,
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0x000000020C855800
|
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}
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},
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|
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x000000020C855800
|
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}
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}
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},
|
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Package (0x04)
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{
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"PSTATE",
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0x0C,
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x000000023C346000,
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0x00000001F4ADD400
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}
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},
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x00000001F4ADD400
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}
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},
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Package (0x04)
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{
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"PSTATE",
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0x0D,
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Package (0x02)
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x000000023C346000,
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0x00000001DCD65000
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Package (0x02)
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x00000001DCD65000
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Package (0x04)
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{
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"PSTATE",
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0x0E,
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_MDP0",
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"ICBID_SLAVE_MNOC_HF_MEM_NOC",
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0x000000023C346000,
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0x00000001C4FECC00
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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0x03,
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"ICBID_MASTER_MNOC_HF_MEM_NOC",
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"ICBID_SLAVE_EBI1",
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0x2FAF0800,
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0x00000001C4FECC00
|
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Package (0x04)
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{
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0x0F,
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{
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0x03,
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"ICBID_MASTER_MDP0",
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0x000000023C346000,
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|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x3B9ACA00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x24,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x35A4E900
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x35A4E900
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x25,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x2FAF0800
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x2FAF0800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x26,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x29B92700
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x29B92700
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x27,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x23C34600
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x23C34600
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x28,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x1DCD6500
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x1DCD6500
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x29,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000011E1A3000,
|
|
0x17D78400
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x17D78400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x2A,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
0x1F
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
0x1F
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
0x1F
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Return (GPCC) /* \_SB_.PEP0.G7MD.GPCC */
|
|
}
|
|
|
|
Method (G8MD, 0, NotSerialized)
|
|
{
|
|
Name (GPCC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.GPU0",
|
|
Package (0x0B)
|
|
{
|
|
"COMPONENT",
|
|
0x08,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x18)
|
|
{
|
|
"ENTER",
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_dp_pixel_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_dp_link_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_dp_crypto_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_dp_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_dp_link_intf_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_clkref_en",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (One)
|
|
{
|
|
"PSTATE_SAVE"
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
0x2A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x16)
|
|
{
|
|
"EXIT",
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_clkref_en",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_rscc_vsync_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_dp_pixel_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_dp_link_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_dp_crypto_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_dp_aux_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"disp_cc_mdss_dp_link_intf_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
0x07,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
0x002F1E80,
|
|
One,
|
|
0x07,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x08)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
0x07,
|
|
Zero,
|
|
"HLOS_DRV",
|
|
"REQUIRED"
|
|
}
|
|
},
|
|
|
|
Package (One)
|
|
{
|
|
"PSTATE_RESTORE"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"INIT_FSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"mdss_core_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_disp_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"PSTATE_SET",
|
|
0x02,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x19A14780,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x11C31E80,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x18964020,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x11C31E80,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x14810600,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x11E1A300,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x10642AC0,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x0BEBC200,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x08D24D00,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x0A37CADB,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x07,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x09D5B340,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x08,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x08F0D180,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x09,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x05F5E100,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0A,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x051BD4B0,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0B,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
0x0124F800,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0C,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"disp_cc_mdss_mdp_clk",
|
|
0x03,
|
|
Zero,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_DISPLAY_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
0x04
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PREPARE_PSTATE",
|
|
0x04
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_PSTATE",
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x30)
|
|
{
|
|
"PSTATE_SET",
|
|
0x03,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x000000031A4A9F80,
|
|
0x000000031A4A9F80
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x000000031A4A9F80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x0000000302731B80,
|
|
0x0000000302731B80
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
|
|
0x0000000302731B80
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MDP0",
|
|
"ICBID_SLAVE_MNOC_HF_MEM_NOC",
|
|
0x00000002EA9B9780,
|
|
0x00000002EA9B9780
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_MNOC_HF_MEM_NOC",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x2FAF0800,
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|
}
|
|
}
|
|
})
|
|
Return (GPCC) /* \_SB_.PEP0.G8MD.GPCC */
|
|
}
|
|
|
|
Method (G9MD, 0, NotSerialized)
|
|
{
|
|
Name (GPCC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.GPU0",
|
|
Package (0x06)
|
|
{
|
|
"COMPONENT",
|
|
0x09,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"INIT_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_FSTATE",
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Return (GPCC) /* \_SB_.PEP0.G9MD.GPCC */
|
|
}
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (SMMD, 0, NotSerialized)
|
|
{
|
|
Return (SMMC) /* \_SB_.PEP0.SMMC */
|
|
}
|
|
|
|
Name (SMMC, Package (0x02)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.MMU0",
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_hlos1_vote_mmu_tcu_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_hlos1_vote_mmu_tcu_clk",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.MMU1",
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"gcc_hlos1_vote_gpu_smmu_gds",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_hlos1_vote_gpu_smmu_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_hlos1_vote_gpu_smmu_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"gcc_hlos1_vote_gpu_smmu_gds",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (OPMD, 0, NotSerialized)
|
|
{
|
|
Return (OPCC) /* \_SB_.PEP0.OPCC */
|
|
}
|
|
|
|
Name (OPCC, Package (0x04)
|
|
{
|
|
Package (0x04)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.PEN1",
|
|
Package (0x07)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x77,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO18_A",
|
|
One,
|
|
0x002D2A80,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
0x14
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x15,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
0x78
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x15,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO18_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
0x14
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x77,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.ACC1",
|
|
Package (0x04)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x0E,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
0x0A
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.ALS1",
|
|
Package (0x04)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x0E,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
0x0A
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.LED1",
|
|
Package (0x04)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PMICGPIO",
|
|
Package (0x08)
|
|
{
|
|
"IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT",
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
0x0A
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x03
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (SPMD, 0, NotSerialized)
|
|
{
|
|
Return (SPCC) /* \_SB_.PEP0.SPCC */
|
|
}
|
|
|
|
Name (SPCC, Package (0x04)
|
|
{
|
|
Package (0x05)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.AMSS",
|
|
Package (0x06)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x0D)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_boot_rom_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_mss_cfg_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_mss_q6_memnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_mss_snoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_mss_mfab_axis_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_prng_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_mss_axis2_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS2_C",
|
|
0x02,
|
|
0x000B7980,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
0x0180
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_mx",
|
|
0x0180
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x06)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_IPA_CORE",
|
|
"ICBID_SLAVE_IPA_CORE",
|
|
0x9218,
|
|
Zero,
|
|
"HLOS_DRV"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_prng_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS2_C",
|
|
0x02,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_mx",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x06)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_IPA_CORE",
|
|
"ICBID_SLAVE_IPA_CORE",
|
|
Zero,
|
|
Zero,
|
|
"HLOS_DRV"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_boot_rom_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_prng_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS2_C",
|
|
0x02,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.ADSP",
|
|
Package (0x05)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.SCSS",
|
|
Package (0x06)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x0E,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO27_A",
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO4_A",
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_CLK_CTL",
|
|
One,
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO27_A",
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO4_A",
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_CLK_CTL",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO27_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO4_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_CLK_CTL",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.CDSP",
|
|
Package (0x05)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x03
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (PPMD, 0, NotSerialized)
|
|
{
|
|
Return (PPCC) /* \_SB_.PEP0.PPCC */
|
|
}
|
|
|
|
Name (PPCC, Package (0x03)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.PRXY",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.STAT",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"DEVICE",
|
|
0x81,
|
|
"\\_SB.GIO0",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Name (SDFR, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.SDFR",
|
|
Package (0x06)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (BPMD, 0, NotSerialized)
|
|
{
|
|
Return (BPCC) /* \_SB_.PEP0.BPCC */
|
|
}
|
|
|
|
Method (LPMD, 0, NotSerialized)
|
|
{
|
|
Return (LPCC) /* \_SB_.PEP0.LPCC */
|
|
}
|
|
|
|
Name (BPCC, Package (0x04)
|
|
{
|
|
Package (0x05)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.UFS0",
|
|
Package (0x07)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x05)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ufs_phy_gdsc",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ufs_phy_gdsc",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x0C)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_ufs_phy_axi_clk",
|
|
0x08,
|
|
0x0BEBC200,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_ufs_phy_unipro_core_clk",
|
|
0x08,
|
|
0x08F0D180,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_ufs_phy_ice_core_clk",
|
|
0x08,
|
|
0x11E1A300,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_ufs_phy_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_phy_aux_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_tx_symbol_0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_rx_symbol_0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_rx_symbol_1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_mem_clkref_en",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0C)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_ufs_phy_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_phy_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_tx_symbol_0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_rx_symbol_0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_rx_symbol_1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_ice_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_unipro_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_phy_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_ufs_mem_clkref_en",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE_SET",
|
|
0x02,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_UFS_MEM",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x35A4E900,
|
|
0x35A4E900
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_UFS_MEM_CFG",
|
|
0x11D260C0,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_UFS_MEM_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_UFS_MEM",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
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0x17D78400,
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0x0BEBC200
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"ICBID_SLAVE_EBI1",
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0x0BEBC200,
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0x05F5E100
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0x02625A00,
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0x01312D00
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"BUSARB",
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"ICBID_MASTER_SDCC_2",
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"ICBID_SLAVE_EBI1",
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Zero
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"PSTATE_SET",
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"PSTATE_ADJUST",
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"PSTATE_ADJUST",
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0x02
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"PSTATE_ADJUST",
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"PSTATE",
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"PSTATE_ADJUST",
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"PSTATE_ADJUST",
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"PSTATE_SET",
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"CLOCK",
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{
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"gcc_sdcc2_ahb_clk",
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"CLOCK",
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{
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"DSTATE",
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{
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"PSTATE_ADJUST",
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Package (0x02)
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{
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0x16
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{
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"TLMMPORT",
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{
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0x0099A000,
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0x7FFF,
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0x1FE3
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{
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"PSTATE_ADJUST",
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{
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0x02,
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Zero
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{
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"PSTATE_ADJUST",
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{
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"PSTATE_ADJUST",
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0x03
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"DSTATE",
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"PSTATE_ADJUST",
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{
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"PSTATE_ADJUST",
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"PSTATE_ADJUST",
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"TLMMPORT",
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0x0A00
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"PSTATE_ADJUST",
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0x17
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{
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{
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"COMPONENT",
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"FSTATE",
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{
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"DSTATE",
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{
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"DSTATE",
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"DSTATE",
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0x02
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"DSTATE",
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"COMPONENT",
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"FSTATE",
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{
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"DSTATE",
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"DSTATE",
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"DSTATE",
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"NPARESOURCE",
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{
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"/arc/client/rail_cx",
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0x0100
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_USB3_0",
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0x17D78400,
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Zero
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{
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"CLOCK",
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{
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"gcc_usb_phy_cfg_ahb2phy_clk",
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One
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"BUSARB",
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_USB3_0",
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"CLOCK",
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"DSTATE",
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"FSTATE",
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"PPP_RESOURCE_ID_LDO24_A",
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0x002EEBB8,
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"PMICVREGVOTE",
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"PPP_RESOURCE_ID_LDO12_A",
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0x001B7740,
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One,
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{
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"PMICVREGVOTE",
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"PPP_RESOURCE_ID_LDO24_A",
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{
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"PMICVREGVOTE",
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"PPP_RESOURCE_ID_LDO12_A",
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Package (0x02)
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{
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"DSTATE",
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{
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"DSTATE",
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{
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"DSTATE",
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0x02
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{
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"DSTATE",
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0x0100
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Package (0x02)
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"BUSARB",
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_USB3_0",
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0x17D78400,
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Zero
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Package (0x02)
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{
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"CLOCK",
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{
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"gcc_usb_phy_cfg_ahb2phy_clk",
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Package (0x02)
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{
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"PMICVREGVOTE",
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{
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"PPP_RESOURCE_ID_LDO28_A",
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0x00325AA0,
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One,
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0x07,
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Zero
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_APPSS_PROC",
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"ICBID_SLAVE_USB3_0",
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Zero,
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|
Zero
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|
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Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"gcc_usb_phy_cfg_ahb2phy_clk",
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0x02
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Package (0x02)
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{
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"NPARESOURCE",
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{
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"/arc/client/rail_cx",
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Package (0x02)
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{
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"PMICVREGVOTE",
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{
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"PPP_RESOURCE_ID_LDO28_A",
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0x00325AA0,
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One,
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0x07,
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Zero
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Package (0x02)
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{
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"DSTATE",
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Package (0x02)
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{
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"DSTATE",
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Package (0x02)
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{
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"DSTATE",
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0x02
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Package (0x02)
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"DSTATE",
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0x03
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|
}
|
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},
|
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Package (0x07)
|
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{
|
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"DEVICE",
|
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"\\_SB.URS0",
|
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Package (0x05)
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{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
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{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
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{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
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Package (0x02)
|
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{
|
|
"PSTATE",
|
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One
|
|
}
|
|
},
|
|
|
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Package (0x02)
|
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{
|
|
"DSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
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{
|
|
"DSTATE",
|
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0x02
|
|
},
|
|
|
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Package (0x02)
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{
|
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"DSTATE",
|
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0x03
|
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}
|
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},
|
|
|
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Package (0x08)
|
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{
|
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"DEVICE",
|
|
"\\_SB.URS0.USB0",
|
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Package (0x05)
|
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{
|
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"COMPONENT",
|
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Zero,
|
|
Package (0x02)
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{
|
|
"FSTATE",
|
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Zero
|
|
},
|
|
|
|
Package (0x07)
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{
|
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"PSTATE",
|
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Zero,
|
|
Package (0x02)
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{
|
|
"CLOCK",
|
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Package (0x02)
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{
|
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"gcc_usb30_prim_sleep_clk",
|
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One
|
|
}
|
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},
|
|
|
|
Package (0x02)
|
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{
|
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"CLOCK",
|
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Package (0x03)
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{
|
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"gcc_usb30_prim_sleep_clk",
|
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0x09,
|
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0x08
|
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}
|
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},
|
|
|
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Package (0x02)
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{
|
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"CLOCK",
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Package (0x03)
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{
|
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"gcc_usb30_prim_sleep_clk",
|
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0x09,
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0x0C
|
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}
|
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},
|
|
|
|
Package (0x02)
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{
|
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"CLOCK",
|
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Package (0x02)
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{
|
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"gcc_usb3_prim_phy_pipe_clk",
|
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One
|
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}
|
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},
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|
|
|
Package (0x02)
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{
|
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"CLOCK",
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Package (0x03)
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{
|
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"gcc_usb3_prim_phy_pipe_clk",
|
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0x09,
|
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0x08
|
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}
|
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}
|
|
},
|
|
|
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Package (0x02)
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{
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"PRELOAD_PSTATE",
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Zero
|
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}
|
|
},
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|
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Package (0x11)
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{
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"DSTATE",
|
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Zero,
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Package (0x02)
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{
|
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"PMICVREGVOTE",
|
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Package (0x06)
|
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{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
0x002EEBB8,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"usb30_prim_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_aggre_usb3_prim_axi_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_cfg_noc_usb3_prim_axi_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_prim_mock_utmi_clk",
|
|
0x08,
|
|
0x4B00,
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb3_prim_phy_aux_clk",
|
|
0x08,
|
|
0x04B0,
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x28000000,
|
|
0x28000000
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
0x0100
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_0",
|
|
0x17D78400,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_clkref_en",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x11)
|
|
{
|
|
"DSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x03,
|
|
0x2580,
|
|
0x05
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_cfg_noc_usb3_prim_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_usb3_prim_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_prim_mock_utmi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_0",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_phy_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_clkref_en",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_0",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
0x002EEBB8,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"DSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x03,
|
|
0x00927C00,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_cfg_noc_usb3_prim_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_usb3_prim_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_prim_mock_utmi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_phy_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_0",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_clkref_en",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"usb30_prim_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_0",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
0x002EEBB8,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x03,
|
|
0x00927C00,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
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0x02
|
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}
|
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},
|
|
|
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Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
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{
|
|
"gcc_cfg_noc_usb3_prim_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
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{
|
|
"CLOCK",
|
|
Package (0x02)
|
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{
|
|
"gcc_aggre_usb3_prim_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
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{
|
|
"gcc_usb30_prim_mock_utmi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
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{
|
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"CLOCK",
|
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Package (0x02)
|
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{
|
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"gcc_usb3_prim_phy_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
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Package (0x02)
|
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{
|
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"BUSARB",
|
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Package (0x05)
|
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{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_0",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
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{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
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{
|
|
"CLOCK",
|
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Package (0x02)
|
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{
|
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"gcc_usb3_prim_clkref_en",
|
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0x02
|
|
}
|
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},
|
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|
|
Package (0x02)
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{
|
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"FOOTSWITCH",
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Package (0x02)
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{
|
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"usb30_prim_gdsc",
|
|
0x02
|
|
}
|
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},
|
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Package (0x02)
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{
|
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"BUSARB",
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Package (0x05)
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{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_0",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
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{
|
|
"NPARESOURCE",
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Package (0x03)
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{
|
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One,
|
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"/arc/client/rail_cx",
|
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Zero
|
|
}
|
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},
|
|
|
|
Package (0x02)
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{
|
|
"PMICVREGVOTE",
|
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Package (0x06)
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{
|
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"PPP_RESOURCE_ID_LDO24_A",
|
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One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
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{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_DSTATE",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x08)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.URS0.UFN0",
|
|
Package (0x05)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_prim_sleep_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_prim_sleep_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_prim_sleep_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_phy_pipe_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb3_prim_phy_pipe_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x10)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
0x002EEBB8,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"usb30_prim_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_aggre_usb3_prim_axi_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_cfg_noc_usb3_prim_axi_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb3_prim_phy_aux_clk",
|
|
0x08,
|
|
0x04B0,
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_0",
|
|
0x17D78400,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x28000000,
|
|
0x28000000
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
0x0100
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_clkref_en",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x10)
|
|
{
|
|
"DSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x03,
|
|
0x2580,
|
|
0x05
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_cfg_noc_usb3_prim_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_usb3_prim_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_phy_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_0",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_clkref_en",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_0",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
0x0100
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
0x002EEBB8,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x11)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x03,
|
|
0x00927C00,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_prim_master_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_cfg_noc_usb3_prim_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_usb3_prim_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_phy_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_0",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_prim_clkref_en",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"usb30_prim_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_0",
|
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"ICBID_SLAVE_EBI1",
|
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Zero,
|
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Zero
|
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}
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},
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Package (0x02)
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{
|
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"NPARESOURCE",
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Package (0x03)
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{
|
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One,
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"/arc/client/rail_cx",
|
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Zero
|
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}
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},
|
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|
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Package (0x02)
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{
|
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"PMICVREGVOTE",
|
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Package (0x06)
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{
|
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"PPP_RESOURCE_ID_LDO24_A",
|
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One,
|
|
Zero,
|
|
Zero,
|
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0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
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|
{
|
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"PMICVREGVOTE",
|
|
Package (0x06)
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{
|
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"PPP_RESOURCE_ID_LDO12_A",
|
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One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
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{
|
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"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
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{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
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},
|
|
|
|
Package (0x02)
|
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{
|
|
"ABANDON_DSTATE",
|
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0x03
|
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}
|
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},
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|
|
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Package (0x08)
|
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{
|
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"DEVICE",
|
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"\\_SB.USB1",
|
|
Package (0x05)
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{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
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{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
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|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_sec_sleep_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_sec_sleep_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb30_sec_sleep_clk",
|
|
0x09,
|
|
0x0C
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_sec_phy_pipe_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x03)
|
|
{
|
|
"gcc_usb3_sec_phy_pipe_clk",
|
|
0x09,
|
|
0x08
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PRELOAD_PSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x11)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
0x002EEBB8,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"usb30_sec_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_aggre_usb3_sec_axi_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_cfg_noc_usb3_sec_axi_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_sec_master_clk",
|
|
0x08,
|
|
0x78,
|
|
0x09
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_sec_mock_utmi_clk",
|
|
0x08,
|
|
0x4B00,
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb3_sec_phy_aux_clk",
|
|
0x08,
|
|
0x04B0,
|
|
0x07
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x28000000,
|
|
0x28000000
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
0x0100
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_1",
|
|
0x17D78400,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_sec_clkref_en",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x11)
|
|
{
|
|
"DSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_sec_master_clk",
|
|
0x03,
|
|
0x2580,
|
|
0x05
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_sec_master_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_cfg_noc_usb3_sec_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_usb3_sec_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_sec_mock_utmi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_sec_phy_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_sec_clkref_en",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
0x002EEBB8,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"DSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_sec_master_clk",
|
|
0x03,
|
|
0x00927C00,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_sec_master_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_cfg_noc_usb3_sec_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_usb3_sec_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_sec_mock_utmi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_sec_phy_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_sec_clkref_en",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"usb30_sec_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
0x002EEBB8,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_usb30_sec_master_clk",
|
|
0x03,
|
|
0x00927C00,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_sec_master_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_cfg_noc_usb3_sec_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_usb3_sec_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb30_sec_mock_utmi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_sec_phy_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_USB3_1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb_phy_cfg_ahb2phy_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_usb3_sec_clkref_en",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"usb30_sec_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_USB3_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/arc/client/rail_cx",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO24_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO12_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_DSTATE",
|
|
0x03
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (IPMD, 0, NotSerialized)
|
|
{
|
|
Return (IPSC) /* \_SB_.PEP0.IPSC */
|
|
}
|
|
|
|
Name (IPSC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.IPA",
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x06)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_IPA_CORE",
|
|
"ICBID_SLAVE_IPA_CORE",
|
|
0x9218,
|
|
Zero,
|
|
"HLOS_DRV"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x06)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_IPA_CORE",
|
|
"ICBID_SLAVE_IPA_CORE",
|
|
Zero,
|
|
Zero,
|
|
"HLOS_DRV"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (EWMD, 0, NotSerialized)
|
|
{
|
|
Return (WBRC) /* \_SB_.PEP0.WBRC */
|
|
}
|
|
|
|
Name (WBRC, Package (0x03)
|
|
{
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.AMSS.QWLN",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS7_A",
|
|
0x02,
|
|
0x000FAFA0,
|
|
One,
|
|
0x06,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO5_A",
|
|
One,
|
|
0x000C3500,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO7_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO17_A",
|
|
One,
|
|
0x0013E5C0,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO25_A",
|
|
One,
|
|
0x002F5D00,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO25_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO17_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO7_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO5_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS7_A",
|
|
0x02,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO25_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO17_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO7_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO5_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS7_A",
|
|
0x02,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ABANDON_DSTATE",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.COEX",
|
|
Package (0x05)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS7_A",
|
|
0x02,
|
|
0x000FAFA0,
|
|
One,
|
|
0x06,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO5_A",
|
|
One,
|
|
0x000C3500,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO7_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO17_A",
|
|
One,
|
|
0x0013E5C0,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO25_A",
|
|
One,
|
|
0x002F5D00,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO25_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO17_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO7_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO5_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS7_A",
|
|
0x02,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.BTH0",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS3_A",
|
|
0x02,
|
|
0x0014A140,
|
|
One,
|
|
0x06,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS5_A",
|
|
0x02,
|
|
0x001F20C0,
|
|
One,
|
|
0x06,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO7_A",
|
|
One,
|
|
0x001B7740,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO17_A",
|
|
One,
|
|
0x0013E5C0,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO25_A",
|
|
One,
|
|
0x002F5D00,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO7_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO17_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO25_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS3_A",
|
|
0x02,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_SMPS5_A",
|
|
0x02,
|
|
Zero,
|
|
Zero,
|
|
0x05,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (QDMD, 0, NotSerialized)
|
|
{
|
|
Return (QDSC) /* \_SB_.PEP0.QDSC */
|
|
}
|
|
|
|
Name (QDSC, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.QDSS",
|
|
Package (0x08)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/clk/qdss",
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/clk/qdss",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/clk/qdss",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/clk/qdss",
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE_SET",
|
|
0x02,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/clk/qdss",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/clk/qdss",
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE_SET",
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"TLMMPORT",
|
|
Package (0x03)
|
|
{
|
|
0x00033000,
|
|
0x07FF,
|
|
0x01C8
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (PEMD, 0, NotSerialized)
|
|
{
|
|
Return (PEMC) /* \_SB_.PEP0.PEMC */
|
|
}
|
|
|
|
Name (PEMC, Package (0x04)
|
|
{
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.PCI0",
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x10)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"pcie_0_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_PCIE_0_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_PCIE_0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x17D78400,
|
|
0x0BEBC200
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_noc_pcie_tbu_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_phy_refgen_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_phy_aux_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_0_pipe_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_0_slv_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_0_slv_q2a_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_0_mstr_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_0_cfg_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_pcie_0_aux_clk",
|
|
0x08,
|
|
0x0124F800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x10)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_0_pipe_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_0_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_0_slv_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_0_slv_q2a_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_0_mstr_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_0_cfg_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_noc_pcie_tbu_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_phy_refgen_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_phy_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_PCIE_0_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_PCIE_0",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"pcie_0_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.PCI0.RP1",
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.PCI1",
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x10)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
0x00124F80,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
0x000D6D80,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"pcie_1_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_PCIE_1_CFG",
|
|
0x047868C0,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_PCIE_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x17D78400,
|
|
0x0BEBC200
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_noc_pcie_tbu_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_phy_refgen_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_phy_aux_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_1_pipe_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_1_slv_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_1_slv_q2a_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_1_mstr_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_1_cfg_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_pcie_1_aux_clk",
|
|
0x08,
|
|
0x0124F800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x10)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_1_pipe_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_1_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_1_slv_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_1_slv_q2a_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_1_mstr_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_1_cfg_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_aggre_noc_pcie_tbu_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_phy_refgen_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_pcie_phy_aux_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_PCIE_1_CFG",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_PCIE_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"pcie_1_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO26_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO1_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.PCI1.RP1",
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x03
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (CPMX, 0, NotSerialized)
|
|
{
|
|
Return (CPXC) /* \_SB_.PEP0.CPXC */
|
|
}
|
|
|
|
Name (CPXC, Package (0x04)
|
|
{
|
|
Package (0x05)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.CAMP",
|
|
Package (0x07)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x0D)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
0x23
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x23
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cci_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0C)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cci_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x25
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
0x25
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_cci_clk",
|
|
0x03,
|
|
0x023C3460,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_cci_clk",
|
|
0x03,
|
|
0x0124F800,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x28)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x00000002CB417800,
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_CAMNOC_SF",
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"ICBID_SLAVE_EBI1",
|
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0x11E1A300,
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0x11E1A300
|
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}
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}
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},
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Package (0x03)
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{
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"PSTATE",
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0x23,
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_CAMNOC_SF",
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"ICBID_SLAVE_EBI1",
|
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0x0BEBC200,
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0x0BEBC200
|
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}
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}
|
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},
|
|
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Package (0x03)
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{
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"PSTATE",
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0x24,
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_CAMNOC_SF",
|
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"ICBID_SLAVE_EBI1",
|
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0x05F5E100,
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0x05F5E100
|
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}
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}
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},
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Package (0x03)
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{
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"PSTATE",
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0x25,
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_CAMNOC_SF",
|
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"ICBID_SLAVE_EBI1",
|
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Zero,
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Zero
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}
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}
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}
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}
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},
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Package (0x08)
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{
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"COMPONENT",
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One,
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Package (0x0E)
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{
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"FSTATE",
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Zero,
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Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"gcc_camera_xo_clk",
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One
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}
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},
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Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"gcc_camera_ahb_clk",
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One
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}
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},
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Package (0x02)
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{
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"PSTATE_ADJUST",
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Package (0x02)
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{
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0x03,
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0x04
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}
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},
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Package (0x02)
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{
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"PSTATE_ADJUST",
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Package (0x02)
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{
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0x02,
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0x04
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}
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},
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Package (0x02)
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{
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"PSTATE_ADJUST",
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Package (0x02)
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{
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One,
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0x04
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}
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},
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Package (0x02)
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{
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"PSTATE_ADJUST",
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Package (0x02)
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{
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Zero,
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0x04
|
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}
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},
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{
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"FOOTSWITCH",
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{
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"titan_top_gdsc",
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One
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}
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},
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Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"gcc_camera_axi_clk",
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One
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}
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},
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Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"cam_cc_soc_ahb_clk",
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One
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}
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},
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Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"cam_cc_cpas_ahb_clk",
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One
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}
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},
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Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"cam_cc_camnoc_axi_clk",
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One
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}
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},
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Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"cam_cc_cci_clk",
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One
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}
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}
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},
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Package (0x0E)
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{
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"FSTATE",
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One,
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Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"cam_cc_cci_clk",
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0x02
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}
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},
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|
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|
Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"cam_cc_camnoc_axi_clk",
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0x02
|
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}
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},
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|
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|
Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"cam_cc_cpas_ahb_clk",
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0x02
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}
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},
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|
|
|
Package (0x02)
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{
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"CLOCK",
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|
Package (0x02)
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{
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"cam_cc_soc_ahb_clk",
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0x02
|
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}
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},
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|
|
|
Package (0x02)
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{
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"CLOCK",
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|
Package (0x02)
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{
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"gcc_camera_axi_clk",
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0x02
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}
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|
},
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|
|
|
Package (0x02)
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{
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|
"FOOTSWITCH",
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|
Package (0x02)
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{
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|
"titan_top_gdsc",
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0x02
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}
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},
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|
|
|
Package (0x02)
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{
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|
"PSTATE_ADJUST",
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Package (0x02)
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{
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Zero,
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0x05
|
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}
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},
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|
|
|
Package (0x02)
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{
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"PSTATE_ADJUST",
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Package (0x02)
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{
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One,
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0x05
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}
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},
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|
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|
Package (0x02)
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{
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"PSTATE_ADJUST",
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Package (0x02)
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{
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0x02,
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0x05
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}
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},
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|
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|
Package (0x02)
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{
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"PSTATE_ADJUST",
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|
Package (0x02)
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{
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0x03,
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0x05
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}
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},
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|
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|
Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"gcc_camera_ahb_clk",
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0x02
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}
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},
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|
Package (0x02)
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{
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"CLOCK",
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Package (0x02)
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{
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"gcc_camera_xo_clk",
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0x02
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}
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}
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},
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Package (0x08)
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{
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"PSTATE_SET",
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Zero,
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Package (0x03)
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{
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"PSTATE",
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Zero,
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Package (0x02)
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{
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|
"BUSARB",
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|
Package (0x05)
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{
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0x03,
|
|
"ICBID_MASTER_CAMNOC_HF0_UNCOMP",
|
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"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x4190AB00,
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|
0x4190AB00
|
|
}
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|
}
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|
},
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|
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|
Package (0x03)
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{
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"PSTATE",
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One,
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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|
"ICBID_MASTER_CAMNOC_HF0_UNCOMP",
|
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"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x17D78400,
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0x17D78400
|
|
}
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|
}
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|
},
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|
|
|
Package (0x03)
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|
{
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"PSTATE",
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0x02,
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|
Package (0x02)
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|
{
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|
"BUSARB",
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Package (0x05)
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{
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0x03,
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|
"ICBID_MASTER_CAMNOC_HF0_UNCOMP",
|
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"ICBID_SLAVE_CAMNOC_UNCOMP",
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0x11E1A300,
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0x11E1A300
|
|
}
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|
}
|
|
},
|
|
|
|
Package (0x03)
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{
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"PSTATE",
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0x03,
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Package (0x02)
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|
{
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|
"BUSARB",
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|
Package (0x05)
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{
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0x03,
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|
"ICBID_MASTER_CAMNOC_HF0_UNCOMP",
|
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"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x0BEBC200,
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0x0BEBC200
|
|
}
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|
}
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|
},
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|
|
|
Package (0x03)
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{
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"PSTATE",
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0x04,
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|
Package (0x02)
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{
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|
"BUSARB",
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|
Package (0x05)
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{
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0x03,
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|
"ICBID_MASTER_CAMNOC_HF0_UNCOMP",
|
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"ICBID_SLAVE_CAMNOC_UNCOMP",
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0x05F5E100,
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0x05F5E100
|
|
}
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|
}
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|
},
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|
|
|
Package (0x03)
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{
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"PSTATE",
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0x05,
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|
Package (0x02)
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|
{
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|
"BUSARB",
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|
Package (0x05)
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{
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|
0x03,
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|
"ICBID_MASTER_CAMNOC_HF0_UNCOMP",
|
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"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
Zero,
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|
Zero
|
|
}
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}
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}
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},
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|
|
|
Package (0x08)
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{
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"PSTATE_SET",
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One,
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Package (0x03)
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{
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"PSTATE",
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|
Zero,
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|
Package (0x02)
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|
{
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"BUSARB",
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|
Package (0x05)
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{
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|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x4190AB00,
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|
0x4190AB00
|
|
}
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|
}
|
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},
|
|
|
|
Package (0x03)
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{
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"PSTATE",
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|
One,
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|
Package (0x02)
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|
{
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"BUSARB",
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|
Package (0x05)
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|
{
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0x03,
|
|
"ICBID_MASTER_CAMNOC_HF0",
|
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"ICBID_SLAVE_EBI1",
|
|
0x17D78400,
|
|
0x17D78400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
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{
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|
"PSTATE",
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|
0x02,
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|
Package (0x02)
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|
{
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|
"BUSARB",
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|
Package (0x05)
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|
{
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|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF0",
|
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"ICBID_SLAVE_EBI1",
|
|
0x11E1A300,
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0x11E1A300
|
|
}
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|
}
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|
},
|
|
|
|
Package (0x03)
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{
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"PSTATE",
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0x03,
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|
Package (0x02)
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|
{
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|
"BUSARB",
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|
Package (0x05)
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|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF0",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x0BEBC200,
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|
0x0BEBC200
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
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{
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|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
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|
{
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|
"BUSARB",
|
|
Package (0x05)
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|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF0",
|
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"ICBID_SLAVE_EBI1",
|
|
0x05F5E100,
|
|
0x05F5E100
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
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{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
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|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF0",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x08)
|
|
{
|
|
"PSTATE_SET",
|
|
0x02,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
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|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x4190AB00,
|
|
0x4190AB00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
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|
{
|
|
"BUSARB",
|
|
Package (0x05)
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|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x17D78400,
|
|
0x17D78400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x11E1A300,
|
|
0x11E1A300
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x0BEBC200,
|
|
0x0BEBC200
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x05F5E100,
|
|
0x05F5E100
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x08)
|
|
{
|
|
"PSTATE_SET",
|
|
0x03,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x4190AB00,
|
|
0x4190AB00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x17D78400,
|
|
0x17D78400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x11E1A300,
|
|
0x11E1A300
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x0BEBC200,
|
|
0x0BEBC200
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x05F5E100,
|
|
0x05F5E100
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_SF",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.CAMS",
|
|
Package (0x19)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO16_A",
|
|
One,
|
|
0x00294280,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x5F,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x5B,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x04)
|
|
{
|
|
"PPP_RESOURCE_ID_LVS1_A",
|
|
0x04,
|
|
0x001B7740,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x11,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x12,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO19_A",
|
|
One,
|
|
0x002F5D00,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x19,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_mclk0_clk",
|
|
0x08,
|
|
0x016E3600,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x0D,
|
|
One,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x1A)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x0D,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_mclk0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO19_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x19,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x04)
|
|
{
|
|
"PPP_RESOURCE_ID_LVS1_A",
|
|
0x04,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x5B,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x12,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x11,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x5F,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO16_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.CAMF",
|
|
Package (0x17)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO16_A",
|
|
One,
|
|
0x00294280,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x81,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x7F,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x13,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x14,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x04)
|
|
{
|
|
"PPP_RESOURCE_ID_LVS2_A",
|
|
0x04,
|
|
0x001B7740,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x0C,
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_mclk2_clk",
|
|
0x08,
|
|
0x016E3600,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x0F,
|
|
One,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x18)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x0F,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_mclk2_clk",
|
|
0x0C,
|
|
Zero,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x0C,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x04)
|
|
{
|
|
"PPP_RESOURCE_ID_LVS2_A",
|
|
0x04,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x7F,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x14,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x13,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x81,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO16_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.CAMI",
|
|
Package (0x15)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICGPIO",
|
|
Package (0x08)
|
|
{
|
|
"IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x04)
|
|
{
|
|
"PPP_RESOURCE_ID_LVS1_A",
|
|
0x04,
|
|
0x001B7740,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO22_A",
|
|
One,
|
|
0x00328980,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x17,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x17,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_mclk2_clk",
|
|
0x08,
|
|
0x016E3600,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x12)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_mclk2_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x17,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x17,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (One)
|
|
{
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO22_A",
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x04)
|
|
{
|
|
"PPP_RESOURCE_ID_LVS1_A",
|
|
0x04,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PMICGPIO",
|
|
Package (0x08)
|
|
{
|
|
"IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (CPMD, 0, NotSerialized)
|
|
{
|
|
Return (CPCC) /* \_SB_.PEP0.CPCC */
|
|
}
|
|
|
|
Name (CPCC, Package (0x03)
|
|
{
|
|
Package (0x04)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.JPGE",
|
|
Package (0x05)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x0B)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_jpeg_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_jpeg_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_jpeg_clk",
|
|
0x03,
|
|
0x23C34600,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_jpeg_clk",
|
|
0x03,
|
|
0x23C34600,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_jpeg_clk",
|
|
0x03,
|
|
0x18148D00,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_jpeg_clk",
|
|
0x03,
|
|
0x0BEBC200,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"COMPONENT",
|
|
One,
|
|
Package (0x0B)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_jpeg_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_jpeg_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_jpeg_clk",
|
|
0x03,
|
|
0x23C34600,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_jpeg_clk",
|
|
0x03,
|
|
0x23C34600,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_jpeg_clk",
|
|
0x03,
|
|
0x0BEBC200,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.MPCS",
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x0C)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"phy_refgen_south",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_csi0phytimer_clk",
|
|
0x08,
|
|
0x100DA650,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_csiphy0_clk",
|
|
0x08,
|
|
0x16E36000,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0C)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_csiphy0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_csi0phytimer_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"phy_refgen_south",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
One,
|
|
Package (0x0C)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"phy_refgen_south",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_csi1phytimer_clk",
|
|
0x08,
|
|
0x100DA650,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_csiphy1_clk",
|
|
0x08,
|
|
0x16E36000,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0C)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_csiphy1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_csi1phytimer_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"phy_refgen_south",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
0x02,
|
|
Package (0x0C)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"phy_refgen_south",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_csi2phytimer_clk",
|
|
0x08,
|
|
0x100DA650,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_csiphy2_clk",
|
|
0x08,
|
|
0x16E36000,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0C)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_csiphy2_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_csi2phytimer_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"phy_refgen_south",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.VFE0",
|
|
Package (0x07)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x12)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
0x0A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x0A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ife_0_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_0_cphy_rx_clk",
|
|
0x08,
|
|
0x16E36000,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_0_csid_clk",
|
|
0x08,
|
|
0x16E36000,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_0_dsp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_0_axi_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x11)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_0_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_0_dsp_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_0_csid_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_0_cphy_rx_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ife_0_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
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0x05F5E100,
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0x05F5E100
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{
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{
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{
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"ICBID_SLAVE_EBI1",
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0x000000055AE82600,
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{
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{
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{
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"ICBID_SLAVE_EBI1",
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0x00000004A817C800,
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Package (0x03)
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{
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"PSTATE",
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0x05,
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_CAMNOC_HF0",
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"ICBID_SLAVE_EBI1",
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0x00000003B9ACA000,
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0x00000003B9ACA000
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}
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Package (0x03)
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{
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"PSTATE",
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0x06,
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_CAMNOC_HF0",
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"ICBID_SLAVE_EBI1",
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0x0000000342770C00,
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0x0000000342770C00
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Package (0x03)
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{
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"PSTATE",
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0x07,
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_SLAVE_EBI1",
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0x00000002CB417800,
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0x00000002CB417800
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{
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"PSTATE",
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_SLAVE_EBI1",
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0xEE6B2800,
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0xEE6B2800
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{
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"BUSARB",
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"ICBID_SLAVE_EBI1",
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{
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{
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{
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0x03,
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"ICBID_MASTER_CAMNOC_HF0",
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"ICBID_SLAVE_EBI1",
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{
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"PSTATE",
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{
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"BUSARB",
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"ICBID_MASTER_CAMNOC_HF0",
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"ICBID_SLAVE_EBI1",
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0xB8C63F00,
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0xB8C63F00
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{
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"PSTATE",
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0x0C,
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_CAMNOC_HF0",
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"ICBID_SLAVE_EBI1",
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0xACDA7D00,
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{
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"PSTATE",
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0x0D,
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_CAMNOC_HF0",
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"ICBID_SLAVE_EBI1",
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0xA0EEBB00,
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{
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"PSTATE",
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"ICBID_SLAVE_EBI1",
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0x9502F900,
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{
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"BUSARB",
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"ICBID_SLAVE_EBI1",
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0x89173700,
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{
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"ICBID_SLAVE_EBI1",
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0x7D2B7500,
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{
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"PSTATE",
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{
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"BUSARB",
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{
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"ICBID_SLAVE_EBI1",
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0x713FB300,
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{
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{
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{
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"ICBID_SLAVE_EBI1",
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0x6553F100,
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{
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"PSTATE",
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0x13,
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{
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"BUSARB",
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{
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"ICBID_SLAVE_EBI1",
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0x59682F00,
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{
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"PSTATE",
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0x14,
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{
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"BUSARB",
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{
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"ICBID_SLAVE_EBI1",
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0x4D7C6D00,
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"BUSARB",
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"ICBID_SLAVE_EBI1",
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0x4190AB00,
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{
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{
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"BUSARB",
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{
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"ICBID_SLAVE_EBI1",
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0x35A4E900,
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0x35A4E900
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{
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"ICBID_SLAVE_EBI1",
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0x29B92700,
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0x29B92700
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{
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"ICBID_SLAVE_EBI1",
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0x1DCD6500,
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0x1DCD6500
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{
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"PSTATE",
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{
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"BUSARB",
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0x03,
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"ICBID_MASTER_CAMNOC_HF0",
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"ICBID_SLAVE_EBI1",
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0x17D78400,
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0x17D78400
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{
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"PSTATE",
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0x1A,
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_CAMNOC_HF0",
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"ICBID_SLAVE_EBI1",
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0x11E1A300,
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0x11E1A300
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{
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"PSTATE",
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0x1B,
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_CAMNOC_HF0",
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"ICBID_SLAVE_EBI1",
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0x0BEBC200,
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0x0BEBC200
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{
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"PSTATE",
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0x1C,
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{
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"BUSARB",
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{
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0x03,
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"ICBID_MASTER_CAMNOC_HF0",
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"ICBID_SLAVE_EBI1",
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0x05F5E100,
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0x05F5E100
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{
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"PSTATE",
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0x1D,
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Package (0x02)
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{
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"BUSARB",
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Package (0x05)
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{
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0x03,
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"ICBID_MASTER_CAMNOC_HF0",
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"ICBID_SLAVE_EBI1",
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Zero,
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Zero
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Package (0x07)
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{
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"COMPONENT",
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One,
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{
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"FSTATE",
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Zero,
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{
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"CLOCK",
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{
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"gcc_camera_xo_clk",
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One
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{
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"CLOCK",
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{
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"gcc_camera_ahb_clk",
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One
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{
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"FOOTSWITCH",
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{
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"titan_top_gdsc",
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One
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{
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"PSTATE_ADJUST",
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0x0A
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Package (0x02)
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{
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"PSTATE_ADJUST",
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0x02,
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0x0A
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{
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"CLOCK",
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{
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"gcc_camera_axi_clk",
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One
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{
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"CLOCK",
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{
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"cam_cc_soc_ahb_clk",
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One
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Package (0x02)
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{
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"CLOCK",
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{
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"cam_cc_cpas_ahb_clk",
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One
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Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ife_1_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_1_cphy_rx_clk",
|
|
0x08,
|
|
0x16E36000,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_1_csid_clk",
|
|
0x08,
|
|
0x16E36000,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_1_dsp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_1_axi_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x11)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_1_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_1_dsp_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_1_csid_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_1_cphy_rx_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ife_1_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x1D
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
0x1D
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_1_clk",
|
|
0x03,
|
|
0x23C34600,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_1_clk",
|
|
0x03,
|
|
0x1C9C3800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_1_clk",
|
|
0x03,
|
|
0x18148D00,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_1_clk",
|
|
0x03,
|
|
Zero,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x20)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x00000008D8F9FC00,
|
|
0x00000008D8F9FC00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x0000000826299E00,
|
|
0x0000000826299E00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x0000000684EE1800,
|
|
0x0000000684EE1800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x000000055AE82600,
|
|
0x000000055AE82600
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x00000004A817C800,
|
|
0x00000004A817C800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x00000003B9ACA000,
|
|
0x00000003B9ACA000
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x0000000342770C00,
|
|
0x0000000342770C00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x07,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x00000002CB417800,
|
|
0x00000002CB417800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x08,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0xEE6B2800,
|
|
0xEE6B2800
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x09,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0xD09DC300,
|
|
0xD09DC300
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0A,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0xC4B20100,
|
|
0xC4B20100
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0B,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0xB8C63F00,
|
|
0xB8C63F00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0C,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0xACDA7D00,
|
|
0xACDA7D00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0D,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0xA0EEBB00,
|
|
0xA0EEBB00
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0E,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x9502F900,
|
|
0x9502F900
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0F,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x89173700,
|
|
0x89173700
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x10,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x7D2B7500,
|
|
0x7D2B7500
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x11,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x713FB300,
|
|
0x713FB300
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x12,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x6553F100,
|
|
0x6553F100
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x13,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1_UNCOMP",
|
|
"ICBID_SLAVE_CAMNOC_UNCOMP",
|
|
0x59682F00,
|
|
0x59682F00
|
|
}
|
|
}
|
|
},
|
|
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0x17D78400,
|
|
0x17D78400
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x1A,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x11E1A300,
|
|
0x11E1A300
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x1B,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x0BEBC200,
|
|
0x0BEBC200
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x1C,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x05F5E100,
|
|
0x05F5E100
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x1D,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_CAMNOC_HF1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"COMPONENT",
|
|
0x02,
|
|
Package (0x0D)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_lite_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_lite_cphy_rx_clk",
|
|
0x08,
|
|
0x16E36000,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_lite_csid_clk",
|
|
0x08,
|
|
0x16E36000,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0D)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_lite_csid_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_lite_cphy_rx_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ife_lite_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_lite_clk",
|
|
0x03,
|
|
0x23C34600,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_lite_clk",
|
|
0x03,
|
|
0x1C9C3800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_lite_clk",
|
|
0x03,
|
|
0x18148D00,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ife_lite_clk",
|
|
0x03,
|
|
Zero,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"COMPONENT",
|
|
0x03,
|
|
Package (0x10)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/clk/qdss",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_icp_apb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_icp_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_icp_atb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_icp_cti_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_icp_ts_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x10)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_icp_ts_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_icp_cti_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_icp_atb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_icp_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_icp_apb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"NPARESOURCE",
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
"/clk/qdss",
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_icp_clk",
|
|
0x03,
|
|
0x23C34600,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_icp_clk",
|
|
0x03,
|
|
0x17D78400,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_icp_clk",
|
|
0x03,
|
|
Zero,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"COMPONENT",
|
|
0x04,
|
|
Package (0x17)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ipe_0_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_0_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_0_areg_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_0_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ipe_0_gdsc",
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ipe_1_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_1_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_1_areg_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_1_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ipe_1_gdsc",
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x17)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ipe_1_gdsc",
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_1_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_1_areg_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_1_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ipe_1_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ipe_0_gdsc",
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_0_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_0_areg_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_ipe_0_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"ipe_0_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ipe_0_clk",
|
|
0x03,
|
|
0x23C34600,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ipe_0_clk",
|
|
0x03,
|
|
0x1C9C3800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ipe_0_clk",
|
|
0x03,
|
|
0x18148D00,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ipe_0_clk",
|
|
0x03,
|
|
Zero,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ipe_1_clk",
|
|
0x03,
|
|
0x23C34600,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ipe_1_clk",
|
|
0x03,
|
|
0x1C9C3800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ipe_1_clk",
|
|
0x03,
|
|
0x18148D00,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_ipe_1_clk",
|
|
0x03,
|
|
Zero,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"COMPONENT",
|
|
0x05,
|
|
Package (0x10)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"bps_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_bps_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_bps_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_bps_areg_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_bps_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"bps_gdsc",
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x10)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"bps_gdsc",
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_bps_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_bps_areg_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_bps_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_bps_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"bps_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_bps_clk",
|
|
0x03,
|
|
0x23C34600,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_bps_clk",
|
|
0x03,
|
|
0x1C9C3800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_bps_clk",
|
|
0x03,
|
|
0x18148D00,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_bps_clk",
|
|
0x03,
|
|
Zero,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"COMPONENT",
|
|
0x06,
|
|
Package (0x0B)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_lrme_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_lrme_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_lrme_clk",
|
|
0x03,
|
|
0x17D78400,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_lrme_clk",
|
|
0x03,
|
|
0x1312D000,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_lrme_clk",
|
|
0x03,
|
|
0x10089D40,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_lrme_clk",
|
|
0x03,
|
|
Zero,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"COMPONENT",
|
|
0x07,
|
|
Package (0x0B)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_fd_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"PSTATE_ADJUST",
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_fd_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_camnoc_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_cpas_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"cam_cc_soc_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_axi_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FOOTSWITCH",
|
|
Package (0x02)
|
|
{
|
|
"titan_top_gdsc",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_camera_xo_clk",
|
|
0x02
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_fd_core_clk",
|
|
0x03,
|
|
0x23C34600,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_fd_core_clk",
|
|
0x03,
|
|
0x20113A80,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_fd_core_clk",
|
|
0x03,
|
|
0x17D78400,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"cam_cc_fd_core_clk",
|
|
0x03,
|
|
Zero,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (LPMX, 0, NotSerialized)
|
|
{
|
|
Return (LPXC) /* \_SB_.PEP0.LPXC */
|
|
}
|
|
|
|
Name (LPXC, Package (0x01)
|
|
{
|
|
Package (0x04)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.TSC1",
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
// TSC1 Fajita: enable the 2.8V regulator on LDO28_A
|
|
Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO28_A",
|
|
One,
|
|
2856000,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},
|
|
// Delay 10ms
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (0x01)
|
|
{
|
|
10000
|
|
}
|
|
},
|
|
// enable the v1p8 GPIO
|
|
// Package (0x02)
|
|
// {
|
|
// "TLMMGPIO",
|
|
// Package (0x06)
|
|
// {
|
|
// 88,
|
|
// One,
|
|
// Zero,
|
|
// One,
|
|
// Zero,
|
|
// Zero
|
|
// }
|
|
// },
|
|
// enable the 2v8 GPIO
|
|
// not actually a thing on fajita
|
|
// no 1v8 i2c regulator either
|
|
|
|
// sleep 10ms
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (0x01)
|
|
{
|
|
10000
|
|
}
|
|
},
|
|
|
|
// reset the device
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
126,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
// sleep 10ms
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (0x01)
|
|
{
|
|
10000
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
126,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DELAY",
|
|
Package (0x01)
|
|
{
|
|
10000
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
126,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
// set reset low
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
126,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero
|
|
},
|
|
},
|
|
|
|
// set v1p8 low
|
|
// Package (0x02)
|
|
// {
|
|
// // set reset low
|
|
// "TLMMGPIO",
|
|
// Package (0x06)
|
|
// {
|
|
// 88,
|
|
// Zero,
|
|
// Zero,
|
|
// One,
|
|
// Zero,
|
|
// Zero
|
|
// },
|
|
// },
|
|
|
|
// disable the 2.8V regulator
|
|
/*Package (0x02)
|
|
{
|
|
"PMICVREGVOTE",
|
|
Package (0x06)
|
|
{
|
|
"PPP_RESOURCE_ID_LDO28_A",
|
|
One,
|
|
2856000,
|
|
One,
|
|
0x07,
|
|
Zero
|
|
}
|
|
},*/
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Device (BAM1)
|
|
{
|
|
Name (_HID, "QCOM0213") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, One) // _UID: Unique ID
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x01DC4000, // Address Base
|
|
0x00024000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000130,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.BAM1._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Device (BAM5)
|
|
{
|
|
Name (_HID, "QCOM0213") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x05) // _UID: Unique ID
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x17184000, // Address Base
|
|
0x00032000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000C4,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.BAM5._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Device (BAM6)
|
|
{
|
|
Name (_HID, "QCOM0213") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x06) // _UID: Unique ID
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x17204000, // Address Base
|
|
0x00026000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000144,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.BAM6._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Device (BAM7)
|
|
{
|
|
Name (_HID, "QCOM0213") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x07) // _UID: Unique ID
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x08884000, // Address Base
|
|
0x00023000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000009A,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.BAM7._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Device (BAMD)
|
|
{
|
|
Name (_HID, "QCOM0213") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x0D) // _UID: Unique ID
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x0A904000, // Address Base
|
|
0x00017000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000A9,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.BAMD._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Device (BAME)
|
|
{
|
|
Name (_HID, "QCOM0213") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x0E) // _UID: Unique ID
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x06064000, // Address Base
|
|
0x00015000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000C7,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.BAME._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Device (BAMF)
|
|
{
|
|
Name (_HID, "QCOM0213") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x0F) // _UID: Unique ID
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x0A704000, // Address Base
|
|
0x00017000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000A4,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.BAMF._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Device (UAR7)
|
|
{
|
|
Name (_HID, "QCOM0236") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x07) // _UID: Unique ID
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0
|
|
})
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x00898000, // Address Base
|
|
0x00004000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000027F,
|
|
}
|
|
GpioInt (Edge, ActiveLow, Exclusive, PullDown, 0x0000,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x0030
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.UAR7._CRS.RBUF */
|
|
}
|
|
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
}
|
|
|
|
Device (UARD)
|
|
{
|
|
Name (_HID, "QCOM0236") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x0A) // _UID: Unique ID
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0
|
|
})
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x00A84000, // Address Base
|
|
0x00004000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000182,
|
|
}
|
|
GpioInt (Edge, ActiveLow, Exclusive, PullDown, 0x0000,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x0005
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.UARD._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
/*Device (I2C4)
|
|
{
|
|
Name (_HID, "QCOM0220") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x04) // _UID: Unique ID
|
|
Name (_DEP, Package (0x02) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.QGP0
|
|
})
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x0088C000, // Address Base
|
|
0x00004000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000027C,
|
|
}
|
|
})
|
|
Return (RBUF) // \_SB_.I2C4._CRS.RBUF
|
|
}
|
|
}*/
|
|
|
|
/*Device (IC11)
|
|
{
|
|
Name (_HID, "QCOM0220") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x0B) // _UID: Unique ID
|
|
Name (_DEP, Package (0x02) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.QGP0
|
|
})
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x00A88000, // Address Base
|
|
0x00004000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000183,
|
|
}
|
|
})
|
|
Return (RBUF) // \_SB_.IC11._CRS.RBUF
|
|
}
|
|
}*/
|
|
|
|
Device (IC6)
|
|
{
|
|
Name (_HID, "QCOM0220") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x06) // _UID: Unique ID
|
|
Name (_DEP, Package (0x02) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.QGP0
|
|
})
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x894000, // Address Base
|
|
0x00004000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
638,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.IC6._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Device (SPI9)
|
|
{
|
|
Name (_HID, "QCOM021E") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, 0x09) // _UID: Unique ID
|
|
Name (_DEP, Package (0x02) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.QGP1
|
|
})
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x00A80000, // Address Base
|
|
0x00004000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000181,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.SPI9._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Scope (\_SB.PEP0)
|
|
{
|
|
Method (BSMD, 0, NotSerialized)
|
|
{
|
|
Return (BSRC) /* \_SB_.PEP0.BSRC */
|
|
}
|
|
|
|
Method (PQMD, 0, NotSerialized)
|
|
{
|
|
If ((\_SB.SIDV < 0x00020000))
|
|
{
|
|
Return (DFS1) /* \_SB_.PEP0.DFS1 */
|
|
}
|
|
Else
|
|
{
|
|
Return (DFS2) /* \_SB_.PEP0.DFS2 */
|
|
}
|
|
}
|
|
|
|
Name (BSRC, Package (0x0B)
|
|
{
|
|
Package (0x04)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.UAR7",
|
|
Package (0x12)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x09)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
0x08D24D00,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x2D,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x2E,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x2F,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x30,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x2D,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x2E,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x2F,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x30,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x00708000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x00E10000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x01C20000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x01E84800,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x02DC6C00,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x07,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x03D09000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x08,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x04C4B400,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x09,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x05B8D800,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0A,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x061A8000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0B,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x06ACFC00,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0C,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x07080000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0D,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s6_clk",
|
|
0x03,
|
|
0x07A12000,
|
|
0x04
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"DEVICE",
|
|
0x02,
|
|
"\\_SB.UARD",
|
|
Package (0x12)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x0A)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
0x08D24D00,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x00708000,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x05,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x04,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x05,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x04,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x00708000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x00E10000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x01C20000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x01E84800,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x02DC6C00,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x07,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x03D09000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x08,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x04C4B400,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x09,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x05B8D800,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0A,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x061A8000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0B,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x06ACFC00,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0C,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x07080000,
|
|
0x04
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x0D,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s1_clk",
|
|
0x03,
|
|
0x07A12000,
|
|
0x04
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"COMPONENT",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.I2C1",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
0x08D24D00,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s0_clk",
|
|
0x08,
|
|
0x0124F800,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
Zero,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
One,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_s0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.I2C4",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
0x08D24D00,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s3_clk",
|
|
0x08,
|
|
0x0124F800,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x29,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x2A,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_s3_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x29,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x2A,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.I2C5",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
0x00E1D480,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s4_clk",
|
|
0x08,
|
|
0x0124F800,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x59,
|
|
One,
|
|
0x02,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x5A,
|
|
One,
|
|
0x03,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_s4_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x59,
|
|
Zero,
|
|
0x02,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x5A,
|
|
Zero,
|
|
0x03,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.I2C8",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
0x08D24D00,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s7_clk",
|
|
0x08,
|
|
0x0124F800,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x5D,
|
|
One,
|
|
0x03,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x5E,
|
|
One,
|
|
0x03,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_s7_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x5D,
|
|
Zero,
|
|
0x03,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x5E,
|
|
Zero,
|
|
0x03,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.IC11",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
0x08D24D00,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s2_clk",
|
|
0x08,
|
|
0x0124F800,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x37,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x38,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_s2_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x37,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x38,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.IC12",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
0x08D24D00,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s3_clk",
|
|
0x08,
|
|
0x0124F800,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x1F,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x20,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_s3_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x1F,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x20,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.IC6",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap0_s5_clk",
|
|
0x08,
|
|
0x0124F800,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
0x08D24D00,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x55,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x56,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_0_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap0_s5_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_1",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x55,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x56,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.IC15",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
0x08F0D180,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s6_clk",
|
|
0x08,
|
|
0x0124F800,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x21,
|
|
One,
|
|
0x02,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x22,
|
|
One,
|
|
0x02,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_s6_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x21,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x22,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.IC16",
|
|
Package (0x03)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
0x08D24D00,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s7_clk",
|
|
0x08,
|
|
0x0124F800,
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x51,
|
|
One,
|
|
0x02,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x52,
|
|
One,
|
|
0x02,
|
|
One,
|
|
0x03,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x0B)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_s7_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x51,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x52,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Name (DFS1, Package (One)
|
|
{
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.SPI9",
|
|
Package (0x0A)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x0124F800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x01E84800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x0249F000,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x02DC6C00,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x03D09000,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x05B8D800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x05F5E100,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0D)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
0x08D24D00,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x41,
|
|
One,
|
|
0x02,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x42,
|
|
One,
|
|
0x02,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x43,
|
|
One,
|
|
0x02,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x44,
|
|
One,
|
|
0x02,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x0D)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x41,
|
|
Zero,
|
|
0x02,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x42,
|
|
Zero,
|
|
0x02,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x43,
|
|
Zero,
|
|
0x02,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x44,
|
|
Zero,
|
|
0x02,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Name (DFS2, Package (One)
|
|
{
|
|
Package (0x07)
|
|
{
|
|
"DEVICE",
|
|
"\\_SB.SPI9",
|
|
Package (0x0A)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"FSTATE",
|
|
Zero
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x0124F800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x01E84800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x02DC6C00,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x03D09000,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x05B8D800,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x05F5E100,
|
|
0x03
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x04)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x03,
|
|
0x07270E00,
|
|
0x03
|
|
}
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0D)
|
|
{
|
|
"DSTATE",
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
0x53724E00,
|
|
0x0682
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
0x08D24D00,
|
|
0x02FAF080
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x41,
|
|
One,
|
|
0x02,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x42,
|
|
One,
|
|
0x02,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x43,
|
|
One,
|
|
0x02,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x44,
|
|
One,
|
|
0x02,
|
|
One,
|
|
One,
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DSTATE",
|
|
0x02
|
|
},
|
|
|
|
Package (0x0D)
|
|
{
|
|
"DSTATE",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_m_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap_1_s_ahb_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_s0_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_2x_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CLOCK",
|
|
Package (0x02)
|
|
{
|
|
"gcc_qupv3_wrap1_core_clk",
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_BLSP_2",
|
|
"ICBID_SLAVE_EBI1",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BUSARB",
|
|
Package (0x05)
|
|
{
|
|
0x03,
|
|
"ICBID_MASTER_APPSS_PROC",
|
|
"ICBID_SLAVE_BLSP_2",
|
|
Zero,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x41,
|
|
Zero,
|
|
0x02,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x42,
|
|
Zero,
|
|
0x02,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x43,
|
|
Zero,
|
|
0x02,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TLMMGPIO",
|
|
Package (0x06)
|
|
{
|
|
0x44,
|
|
Zero,
|
|
0x02,
|
|
Zero,
|
|
One,
|
|
Zero
|
|
}
|
|
}
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Device (RPEN)
|
|
{
|
|
Name (_HID, "QCOM026D") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
}
|
|
|
|
Device (PILC)
|
|
{
|
|
Name (_HID, "QCOM023B") // _HID: Hardware ID
|
|
Method (PILX, 0, NotSerialized)
|
|
{
|
|
Return (PILP) /* \_SB_.PILC.PILP */
|
|
}
|
|
|
|
Name (PILP, Package (One)
|
|
{
|
|
"OPCA"
|
|
})
|
|
Method (ACPO, 0, NotSerialized)
|
|
{
|
|
Name (PKGG, Package (One)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
Zero,
|
|
ToUUID ("ba58766d-abf2-4402-88d7-90ab243f6c77")
|
|
}
|
|
})
|
|
DerefOf (PKGG [Zero]) [Zero] = RMTB /* \_SB_.RMTB */
|
|
DerefOf (PKGG [Zero]) [One] = RMTX /* \_SB_.RMTX */
|
|
Return (PKGG) /* \_SB_.PILC.ACPO.PKGG */
|
|
}
|
|
}
|
|
|
|
Device (CDI)
|
|
{
|
|
Name (_DEP, Package (0x02) // _DEP: Dependencies
|
|
{
|
|
\_SB.PILC,
|
|
\_SB.RPEN
|
|
})
|
|
Name (_HID, "QCOM026C") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
}
|
|
|
|
Device (SCSS)
|
|
{
|
|
Name (_DEP, Package (0x06) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.PILC,
|
|
\_SB.GLNK,
|
|
\_SB.IPC0,
|
|
\_SB.RPEN,
|
|
\_SB.SSDD
|
|
})
|
|
Name (_HID, "QCOM02BE") // _HID: Hardware ID
|
|
Alias(\_SB.PSUB, _SUB)
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000199,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.SCSS._CRS.RBUF */
|
|
}
|
|
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
}
|
|
|
|
Device (ADSP)
|
|
{
|
|
Name (_DEP, Package (0x07) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.PILC,
|
|
\_SB.GLNK,
|
|
\_SB.IPC0,
|
|
\_SB.RPEN,
|
|
\_SB.SSDD,
|
|
\_SB.PDSR
|
|
})
|
|
Name (_HID, "QCOM023D") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Method (WDIR, 0, NotSerialized)
|
|
{
|
|
Return (Package (0x04)
|
|
{
|
|
0x02,
|
|
0x17A0011C,
|
|
0x17A0019C,
|
|
0x17A0021C
|
|
})
|
|
}
|
|
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000C2,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.ADSP._CRS.RBUF */
|
|
}
|
|
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Device (SLM1)
|
|
{
|
|
Name (_ADR, Zero) // _ADR: Address
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Name (_SUB, "RENEGA0E") // _SUB: Subsystem ID
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x171C0000, // Address Base
|
|
0x0002C000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000C3,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.ADSP.SLM1._CRS.RBUF */
|
|
}
|
|
|
|
Method (CHLD, 0, NotSerialized)
|
|
{
|
|
Return (Package (One)
|
|
{
|
|
"SLM1\\QCOM023F"
|
|
})
|
|
}
|
|
|
|
Device (ADCM)
|
|
{
|
|
Name (_SUB, "RENEGA0E") // _SUB: Subsystem ID
|
|
Name (_ADR, Zero) // _ADR: Address
|
|
Name (_DEP, Package (0x02) // _DEP: Dependencies
|
|
{
|
|
\_SB.MMU0,
|
|
\_SB.IMM0
|
|
})
|
|
Method (CHLD, 0, NotSerialized)
|
|
{
|
|
Return (Package (One)
|
|
{
|
|
"ADCM\\QCOM0240"
|
|
})
|
|
}
|
|
|
|
Device (AUDD)
|
|
{
|
|
Name (_ADR, Zero) // _ADR: Address
|
|
Name (_SUB, "RENEGA0E") // _SUB: Subsystem ID
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.SPI9
|
|
})
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
GpioIo (Exclusive, PullNone, 0x0000, 0x0640, IoRestrictionNone,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x0040
|
|
}
|
|
GpioInt (Edge, ActiveHigh, Exclusive, PullDown, 0x0000,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x0100
|
|
}
|
|
SpiSerialBusV2 (0x0000, PolarityLow, FourWireMode, 0x08,
|
|
ControllerInitiated, 0x016E3600, ClockPolarityLow,
|
|
ClockPhaseFirst, "\\_SB.SPI9",
|
|
0x00, ResourceConsumer, , Exclusive,
|
|
RawDataBuffer (0x07) // Vendor Data
|
|
{
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
|
})
|
|
})
|
|
Return (RBUF) /* \_SB_.ADSP.SLM1.ADCM.AUDD._CRS.RBUF */
|
|
}
|
|
|
|
Method (CHLD, 0, NotSerialized)
|
|
{
|
|
Name (CH, Package (0x02)
|
|
{
|
|
"AUDD\\SAMM0803",
|
|
"AUDD\\SAMM0801"
|
|
})
|
|
Return (CH) /* \_SB_.ADSP.SLM1.ADCM.AUDD.CHLD.CH__ */
|
|
}
|
|
|
|
Device (MBHC)
|
|
{
|
|
Name (_ADR, Zero) // _ADR: Address
|
|
Name (_SUB, "RENEGA0E") // _SUB: Subsystem ID
|
|
}
|
|
|
|
Device (QCRT)
|
|
{
|
|
Name (_ADR, One) // _ADR: Address
|
|
Name (_SUB, "RENEGA0E") // _SUB: Subsystem ID
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
Device (SLM2)
|
|
{
|
|
Name (_ADR, One) // _ADR: Address
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x17240000, // Address Base
|
|
0x0002C000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000143,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.ADSP.SLM2._CRS.RBUF */
|
|
}
|
|
}
|
|
}
|
|
|
|
Device (AMSS)
|
|
{
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Name (_DEP, Package (0x09) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.IPA,
|
|
\_SB.GLNK,
|
|
\_SB.IPC0,
|
|
\_SB.PILC,
|
|
\_SB.RFS0,
|
|
\_SB.RPEN,
|
|
\_SB.SSDD,
|
|
\_SB.PDSR
|
|
})
|
|
Name (_HID, "QCOM023E") // _HID: Hardware ID
|
|
Name (WLEN, One)
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000012A,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.AMSS._CRS.RBUF */
|
|
}
|
|
|
|
Method (WDIR, 0, NotSerialized)
|
|
{
|
|
Return (Package (0x04)
|
|
{
|
|
Zero,
|
|
0x17A0013C,
|
|
0x17A001BC,
|
|
0x17A002BC
|
|
})
|
|
}
|
|
|
|
Device (QWLN)
|
|
{
|
|
Name (_ADR, Zero) // _ADR: Address
|
|
Name (_DEP, Package (0x02) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.MMU0
|
|
})
|
|
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
|
|
{
|
|
Zero,
|
|
Zero
|
|
})
|
|
Name (_S0W, 0x02) // _S0W: S0 Device Wake State
|
|
Name (_S4W, 0x02) // _S4W: S4 Device Wake State
|
|
Name (_PRR, Package (One) // _PRR: Power Resource for Reset
|
|
{
|
|
\_SB.AMSS.QWLN.WRST
|
|
})
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x18800000, // Address Base
|
|
0x00800000, // Address Length
|
|
)
|
|
Memory32Fixed (ReadWrite,
|
|
0x0C250000, // Address Base
|
|
0x00000010, // Address Length
|
|
)
|
|
Memory32Fixed (ReadWrite,
|
|
0x8DF00000, // Address Base
|
|
0x00100000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001BE,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001BF,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, )
|
|
{
|
|
0x000001C0,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001C1,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001C2,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001C3,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001C4,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001C5,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001C6,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001C7,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001C8,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001C9,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.AMSS.QWLN._CRS.RBUF */
|
|
}
|
|
|
|
Method (WMSA, 0, NotSerialized)
|
|
{
|
|
Return (Package (One)
|
|
{
|
|
0x00100000
|
|
})
|
|
}
|
|
|
|
OperationRegion (WOPR, 0x80, Zero, 0x10)
|
|
Field (WOPR, DWordAcc, NoLock, Preserve)
|
|
{
|
|
Offset (0x04),
|
|
WTRG, 32
|
|
}
|
|
|
|
PowerResource (WRST, 0x05, 0x0000)
|
|
{
|
|
Method (_ON, 0, NotSerialized) // _ON_: Power On
|
|
{
|
|
}
|
|
|
|
Method (_OFF, 0, NotSerialized) // _OFF: Power Off
|
|
{
|
|
}
|
|
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Method (_RST, 0, NotSerialized) // _RST: Device Reset
|
|
{
|
|
WTRG = 0xABCD
|
|
}
|
|
}
|
|
}
|
|
|
|
Scope (\_SB)
|
|
{
|
|
Device (COEX)
|
|
{
|
|
Name (_HID, "QCOM0295") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
}
|
|
|
|
Device (WSAR)
|
|
{
|
|
Name (_HID, "SAM0609") // _HID: Hardware ID
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Name (_SUB, "RENEGA0E") // _SUB: Subsystem ID
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.AMSS.QWLN
|
|
})
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
Device (QSM)
|
|
{
|
|
Name (_HID, "QCOM02B9") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_DEP, Package (0x04) // _DEP: Dependencies
|
|
{
|
|
\_SB.GLNK,
|
|
\_SB.IPC0,
|
|
\_SB.PILC,
|
|
\_SB.RPEN
|
|
})
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x98F00000, // Address Base
|
|
0x00600000, // Address Length
|
|
)
|
|
})
|
|
Return (RBUF) /* \_SB_.QSM_._CRS.RBUF */
|
|
}
|
|
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
}
|
|
|
|
Device (SSDD)
|
|
{
|
|
Name (_HID, "QCOM02D1") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_DEP, Package (0x02) // _DEP: Dependencies
|
|
{
|
|
\_SB.GLNK,
|
|
\_SB.TFTP
|
|
})
|
|
}
|
|
|
|
Device (PDSR)
|
|
{
|
|
Name (_HID, "QCOM02CE") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_DEP, Package (0x03) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.GLNK,
|
|
\_SB.IPC0
|
|
})
|
|
}
|
|
|
|
Device (CDSP)
|
|
{
|
|
Name (_DEP, Package (0x07) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.PILC,
|
|
\_SB.GLNK,
|
|
\_SB.IPC0,
|
|
\_SB.RPEN,
|
|
\_SB.SSDD,
|
|
\_SB.PDSR
|
|
})
|
|
Name (_HID, "QCOM02F7") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000262,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.CDSP._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Device (TFTP)
|
|
{
|
|
Name (_HID, "QCOM02F6") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.IPC0
|
|
})
|
|
}
|
|
|
|
Scope (\_SB.PILC)
|
|
{
|
|
Method (_SUB, 0, NotSerialized) // _SUB: Subsystem ID
|
|
{
|
|
If ((\_SB.SOID == 0x0155))
|
|
{
|
|
Return ("CLSA0850")
|
|
}
|
|
Else
|
|
{
|
|
Return (\_SB.PSUB)
|
|
}
|
|
}
|
|
}
|
|
|
|
Scope (\_SB.AMSS)
|
|
{
|
|
Method (_SUB, 0, NotSerialized) // _SUB: Subsystem ID
|
|
{
|
|
If ((\_SB.SOID == 0x0155))
|
|
{
|
|
Return ("CLSA0850")
|
|
}
|
|
Else
|
|
{
|
|
Return (\_SB.PSUB)
|
|
}
|
|
}
|
|
}
|
|
|
|
Device (LLC)
|
|
{
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0
|
|
})
|
|
Name (_HID, "QCOM02F8") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Return (ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x01300000, // Address Base
|
|
0x00028000, // Address Length
|
|
)
|
|
})
|
|
}
|
|
}
|
|
|
|
Device (MMU0)
|
|
{
|
|
Name (_HID, "QCOM0212") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.MMU1
|
|
})
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Return (ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x15000000, // Address Base
|
|
0x0007FFB8, // Address Length
|
|
)
|
|
Memory32Fixed (ReadWrite,
|
|
0x01F46000, // Address Base
|
|
0x00000004, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000080,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000081,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000082,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000083,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000084,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000085,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000086,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000087,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000088,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000089,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000008A,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000008B,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000008C,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000008D,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000008E,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000008F,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000090,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000091,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000092,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000093,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000094,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000095,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000096,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000D5,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000D6,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000D7,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000D8,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000D9,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000DA,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000DB,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000DC,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000DD,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000DE,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000DF,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000E0,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000015B,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000015C,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000015D,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000015E,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000015F,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000160,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000161,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000162,
|
|
}
|
|
})
|
|
}
|
|
}
|
|
|
|
Device (MMU1)
|
|
{
|
|
Name (_HID, "QCOM0212") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, One) // _UID: Unique ID
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0
|
|
})
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Return (ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x05040000, // Address Base
|
|
0x00010000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000018C,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000018D,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000018E,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000018F,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000190,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000191,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000192,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000193,
|
|
}
|
|
})
|
|
}
|
|
}
|
|
|
|
Device (IMM0)
|
|
{
|
|
Name (_HID, "QCOM030B") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
}
|
|
|
|
Device (IMM1)
|
|
{
|
|
Name (_HID, "QCOM030B") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, One) // _UID: Unique ID
|
|
}
|
|
|
|
Device (GPU0)
|
|
{
|
|
Name (_HID, "QCOM027E") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_CID, "ACPIQCOM027E") // _CID: Compatible ID
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Name (_HRV, 0x7C) // _HRV: Hardware Revision
|
|
Device (MON0)
|
|
{
|
|
Method (_ADR, 0, NotSerialized) // _ADR: Address
|
|
{
|
|
Return (Zero)
|
|
}
|
|
}
|
|
|
|
Name (_DEP, Package (0x0A) // _DEP: Dependencies
|
|
{
|
|
\_SB.MMU0,
|
|
\_SB.MMU1,
|
|
\_SB.IMM0,
|
|
\_SB.IMM1,
|
|
\_SB.PEP0,
|
|
\_SB.PMIC,
|
|
\_SB.PILC,
|
|
\_SB.RPEN,
|
|
\_SB.TREE,
|
|
\_SB.SCM0
|
|
})
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x0AE00000, // Address Base
|
|
0x00140000, // Address Length
|
|
)
|
|
Memory32Fixed (ReadWrite,
|
|
0x088E0000, // Address Base
|
|
0x000F4000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000073,
|
|
}
|
|
Memory32Fixed (ReadWrite,
|
|
0x05000000, // Address Base
|
|
0x0003F010, // Address Length
|
|
)
|
|
Memory32Fixed (ReadWrite,
|
|
0x05060000, // Address Base
|
|
0x0003F000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000014C,
|
|
}
|
|
Memory32Fixed (ReadWrite,
|
|
0x0B280000, // Address Base
|
|
0x0000FFFF, // Address Length
|
|
)
|
|
Memory32Fixed (ReadWrite,
|
|
0x0B480000, // Address Base
|
|
0x00010000, // Address Length
|
|
)
|
|
Memory32Fixed (ReadWrite,
|
|
0x05090000, // Address Base
|
|
0x00009000, // Address Length
|
|
)
|
|
Memory32Fixed (ReadWrite,
|
|
0x0C200000, // Address Base
|
|
0x0000FFFF, // Address Length
|
|
)
|
|
Memory32Fixed (ReadWrite,
|
|
0x0AA00000, // Address Base
|
|
0x00200000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000CE,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000CF,
|
|
}
|
|
GpioIo (Shared, PullUp, 0x0000, 0x0000, IoRestrictionNone,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x0060
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0._CRS.RBUF */
|
|
}
|
|
|
|
Method (RESI, 0, NotSerialized)
|
|
{
|
|
Name (RINF, Package (0x10)
|
|
{
|
|
0x03,
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"MDP_REGS",
|
|
"DISPLAY"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"DP_PHY_REGS",
|
|
"DISPLAY"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"VSYNC_INTERRUPT",
|
|
"DISPLAY"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"GFX_REGS",
|
|
"GRAPHICS"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"GFX_REG_CONT",
|
|
"GRAPHICS"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"GFX_INTERRUPT",
|
|
"GRAPHICS"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"GPU_PDC_SEQ_MEM",
|
|
"GRAPHICS"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"GPU_PDC_REGS",
|
|
"GRAPHICS"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"GPU_CC",
|
|
"GRAPHICS"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"GPU_RPMH_CPRF",
|
|
"GRAPHICS"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"VIDEO_REGS",
|
|
"VIDEO"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"VIDC_INTERRUPT",
|
|
"VIDEO"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"VIDC_WD_INTERRUPT",
|
|
"VIDEO"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"RESOURCE",
|
|
"DSI_PANEL_RESET",
|
|
"DISPLAY"
|
|
}
|
|
})
|
|
Return (RINF) /* \_SB_.GPU0.RESI.RINF */
|
|
}
|
|
|
|
Method (ENGS, 0, NotSerialized)
|
|
{
|
|
Name (EBUF, Package (0x06)
|
|
{
|
|
0x03,
|
|
0x02,
|
|
0x003B0014,
|
|
Package (0x07)
|
|
{
|
|
"ENGINES",
|
|
0x05,
|
|
Package (0x0A)
|
|
{
|
|
"ENGINE",
|
|
"GRAPHICS",
|
|
"Adreno6X",
|
|
One,
|
|
0x02,
|
|
Zero,
|
|
Package (0x0B)
|
|
{
|
|
"MMUINFO",
|
|
"Miniport",
|
|
"ArmSmmuV2",
|
|
0x02,
|
|
0x31,
|
|
"V8L",
|
|
"SMMUID",
|
|
ToUUID ("9833c712-3292-4ffb-b0f4-2bd20e1f7f66"),
|
|
"SMMUINTERFACEID",
|
|
Buffer (0x10)
|
|
{
|
|
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........
|
|
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........
|
|
},
|
|
|
|
Package (0x0E)
|
|
{
|
|
"PAGETABLEUSAGE",
|
|
0x04,
|
|
"GraphicsGlobalPT",
|
|
Zero,
|
|
0x03030000,
|
|
"GraphicsPerProcessPT",
|
|
Zero,
|
|
0x03030000,
|
|
"GraphicsSecurePT",
|
|
One,
|
|
0x030A0000,
|
|
"GraphicsGmuPT",
|
|
0x03,
|
|
0x03030002
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PERF_CONTROLS",
|
|
Package (0x01)
|
|
{
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"LimitForPassiveCooling",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x04,
|
|
Package (0x02)
|
|
{
|
|
"LimitForPassiveCooling",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"THERMAL_DOMAINS",
|
|
"GPU"
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
"PROPERTIES",
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"GmemBaseAddr",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"GmemSize",
|
|
0x00100000
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"SMMUCount",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"ENGINE",
|
|
"MDPBLT",
|
|
"MDP5.x",
|
|
0x02,
|
|
One,
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"SHAREDSMMU",
|
|
"ROTATOR"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PERF_CONTROLS",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"LimitForPassiveCooling",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"LimitForPassiveCooling",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"THERMAL_DOMAINS",
|
|
"GPU"
|
|
}
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"ENGINE",
|
|
"ROTATOR",
|
|
"MDP5.x",
|
|
0x03,
|
|
One,
|
|
Zero,
|
|
Package (0x0B)
|
|
{
|
|
"MMUINFO",
|
|
"Miniport",
|
|
"ArmSmmuV2",
|
|
0x02,
|
|
0x20,
|
|
"V7S",
|
|
"SMMUID",
|
|
ToUUID ("36079ae4-78e8-452d-af50-0cff78b2f1ca"),
|
|
"SMMUINTERFACEID",
|
|
Buffer (0x10)
|
|
{
|
|
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........
|
|
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PAGETABLEUSAGE",
|
|
0x02,
|
|
"MdpNonSecurePT",
|
|
"MdpSecurePT"
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PERF_CONTROLS",
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
Package (0x02)
|
|
{
|
|
"LimitForPassiveCooling",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
Package (0x02)
|
|
{
|
|
"LimitForPassiveCooling",
|
|
One
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"THERMAL_DOMAINS",
|
|
"GPU"
|
|
}
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
"ENGINE",
|
|
"VIDEO",
|
|
"Venus",
|
|
0x04,
|
|
One,
|
|
Zero,
|
|
Package (0x0B)
|
|
{
|
|
"MMUINFO",
|
|
"Engine",
|
|
"ArmSmmuV2",
|
|
0x02,
|
|
0x20,
|
|
"V7S",
|
|
"SMMUID",
|
|
ToUUID ("665e0f8e-add3-49d1-91bc-5540c5f57fba"),
|
|
"SMMUINTERFACEID",
|
|
ToUUID ("1c3fc0e8-0b11-4ee0-be89-3e21420a865f"),
|
|
Package (0x07)
|
|
{
|
|
"PAGETABLEUSAGE",
|
|
0x05,
|
|
"VideoNonSecurePT",
|
|
"VideoSecurePT1",
|
|
"VideoSecurePT2",
|
|
"VideoSecurePT3",
|
|
"VideoSecurePT4"
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PERF_CONTROLS",
|
|
Package (0x01)
|
|
{
|
|
0x02
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
"THERMAL_DOMAINS"
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"PROPERTIES",
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"DecMaxFps",
|
|
0x3C
|
|
}
|
|
}
|
|
},
|
|
#if 0
|
|
Package (0x09)
|
|
{
|
|
"ENGINE",
|
|
"CRYPTO",
|
|
"Crypto1.0",
|
|
0x05,
|
|
One,
|
|
Zero,
|
|
Package (0x0B)
|
|
{
|
|
"MMUINFO",
|
|
"Miniport",
|
|
"ArmSmmuV2",
|
|
0x02,
|
|
0x20,
|
|
"V7S",
|
|
"SMMUID",
|
|
ToUUID ("36079ae4-78e8-452d-af50-0cff78b2f1ca"),
|
|
"SMMUINTERFACEID",
|
|
Buffer (0x10)
|
|
{
|
|
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........
|
|
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PAGETABLEUSAGE",
|
|
0x02,
|
|
"CryptoNonSecurePT",
|
|
"CryptoSecurePT"
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PERF_CONTROLS",
|
|
Package (0x01)
|
|
{
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
"THERMAL_DOMAINS"
|
|
}
|
|
},
|
|
#endif
|
|
Package (0x08)
|
|
{
|
|
"ENGINE",
|
|
"VIDEO_ENCODER",
|
|
"Venus",
|
|
0x06,
|
|
One,
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PERF_CONTROLS",
|
|
Package (0x01)
|
|
{
|
|
0x02
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
"THERMAL_DOMAINS"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DISPLAYS",
|
|
"MDP5.x",
|
|
0x02,
|
|
Package (0x07)
|
|
{
|
|
"DISPLAY",
|
|
"INTERNAL1",
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Package (0x04)
|
|
{
|
|
"PERF_CONTROLS",
|
|
Package (0x01)
|
|
{
|
|
0x02
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
0x03
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
"THERMAL_DOMAINS"
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DISPLAY",
|
|
"INTERNAL2",
|
|
0x07,
|
|
One,
|
|
Zero,
|
|
Package (0x04)
|
|
{
|
|
"PERF_CONTROLS",
|
|
Package (0x01)
|
|
{
|
|
0x02
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
0x03
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
0x04
|
|
}
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
"THERMAL_DOMAINS"
|
|
}
|
|
},
|
|
#if 0
|
|
Package (0x07)
|
|
{
|
|
"DISPLAY",
|
|
"EXTERNAL1",
|
|
0x08,
|
|
One,
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"PERF_CONTROLS",
|
|
Package (0x01)
|
|
{
|
|
0x02
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
"THERMAL_DOMAINS"
|
|
}
|
|
},
|
|
#endif
|
|
Package (0x02)
|
|
{
|
|
"RESOURCES",
|
|
Package (0x0B)
|
|
{
|
|
"MMUINFO",
|
|
"Miniport",
|
|
"ArmSmmuV2",
|
|
0x02,
|
|
0x20,
|
|
"V7S",
|
|
"SMMUID",
|
|
ToUUID ("36079ae4-78e8-452d-af50-0cff78b2f1ca"),
|
|
"SMMUINTERFACEID",
|
|
Buffer (0x10)
|
|
{
|
|
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........
|
|
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PAGETABLEUSAGE",
|
|
0x02,
|
|
"MdpNonSecurePT",
|
|
"MdpSecurePT"
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0F)
|
|
{
|
|
"PRIMARY_SOURCE_MODES",
|
|
0x0D,
|
|
Package (0x02)
|
|
{
|
|
0x0280,
|
|
0x01E0
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0320,
|
|
0x0258
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0500,
|
|
0x02D0
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0400,
|
|
0x0300
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0480,
|
|
0x0300
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0500,
|
|
0x0300
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0550,
|
|
0x0300
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0556,
|
|
0x0300
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0640,
|
|
0x0384
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0500,
|
|
0x0400
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0780,
|
|
0x0438
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0780,
|
|
0x04B0
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0780,
|
|
0x0500
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x0F)
|
|
{
|
|
"PAGETABLES",
|
|
0x0D,
|
|
Package (0x07)
|
|
{
|
|
"GraphicsGlobalPT",
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
0x0000008000000000,
|
|
0x0000000800000000
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"GraphicsPerProcessPT",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x00400000,
|
|
0x0000007FFFC00000
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"GraphicsSecurePT",
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0x0000008800000000,
|
|
0xC0000000
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"GraphicsGmuPT",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x60000000,
|
|
0x20000000
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"MdpNonSecurePT",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x80100000,
|
|
0x7FF00000
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"MdpSecurePT",
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0x80000000,
|
|
0x80000000
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"VideoNonSecurePT",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
0x00100000,
|
|
0xBFF00000,
|
|
0x1B,
|
|
Zero
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"VideoSecurePT1",
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0xC0000000,
|
|
0x10000000,
|
|
0x09,
|
|
One
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"VideoSecurePT2",
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0xD0000000,
|
|
0x10000000,
|
|
0x07,
|
|
0x02
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"VideoSecurePT3",
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0xE0000000,
|
|
0x10000000,
|
|
0x02,
|
|
0x03
|
|
},
|
|
|
|
Package (0x09)
|
|
{
|
|
"VideoSecurePT4",
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0xF0000000,
|
|
0x10000000,
|
|
0x2A,
|
|
0x04
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"CryptoNonSecurePT",
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x00100000,
|
|
0x7FF00000
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"CryptoSecurePT",
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0x80000000,
|
|
0x80000000
|
|
}
|
|
}
|
|
})
|
|
Return (EBUF) /* \_SB_.GPU0.ENGS.EBUF */
|
|
}
|
|
|
|
Method (TMDT, 0, NotSerialized)
|
|
{
|
|
Name (RBUF, Package (0x03)
|
|
{
|
|
One,
|
|
Zero,
|
|
Package (0x03)
|
|
{
|
|
"THERMAL_DOMAINS",
|
|
One,
|
|
Package (0x03)
|
|
{
|
|
"GPU",
|
|
"GPU0",
|
|
Package (0x03)
|
|
{
|
|
"GRAPHICS",
|
|
"MDPBLT",
|
|
"ROTATOR"
|
|
}
|
|
}
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.TMDT.RBUF */
|
|
}
|
|
|
|
Method (PMCL, 0, NotSerialized)
|
|
{
|
|
Name (RBUF, Package (0x0D)
|
|
{
|
|
0x03,
|
|
One,
|
|
0x0A,
|
|
Package (0x0F)
|
|
{
|
|
"COMPONENT",
|
|
Zero,
|
|
ToUUID ("2c135991-4391-4633-90b1-fa96f2e2cc04"),
|
|
"PRIMDISPLAY_POWER_STATES",
|
|
"HW_BLOCK_MDP",
|
|
Package (0x02)
|
|
{
|
|
"DISPLAY",
|
|
"INTERNAL1"
|
|
},
|
|
|
|
0x02,
|
|
0x05,
|
|
Package (0x06)
|
|
{
|
|
"FSTATE",
|
|
Zero,
|
|
"ALL_ON",
|
|
Zero,
|
|
Zero,
|
|
0x02
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"FSTATE",
|
|
One,
|
|
"PWR_OFF",
|
|
One,
|
|
One,
|
|
One
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
"PSTATE_SET",
|
|
Zero,
|
|
"INTERNAL1_RESET",
|
|
"*",
|
|
"RESET",
|
|
0x02,
|
|
Zero,
|
|
Zero,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
One,
|
|
0x02
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Zero,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
"PSTATE_SET",
|
|
One,
|
|
"INTERNAL1_FOOTSWITCH_OVERRIDE",
|
|
"*",
|
|
"FOOTSWITCH_OVERRIDE",
|
|
0x02,
|
|
0xFFFFFFFF,
|
|
Zero,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
One,
|
|
0x02
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Zero,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x0D)
|
|
{
|
|
"PSTATE_SET",
|
|
0x02,
|
|
"INTERNAL1_SCAN_CONTROL",
|
|
"*",
|
|
"DISPLAY_SOURCE_SCAN_CTRL",
|
|
0x05,
|
|
Zero,
|
|
Zero,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
0x04,
|
|
0x02
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
0x03,
|
|
0x02
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
0x02,
|
|
0x02
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
One,
|
|
0x02
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
Zero,
|
|
0x02
|
|
}
|
|
},
|
|
|
|
Package (0x15)
|
|
{
|
|
"PSTATE_SET",
|
|
0x03,
|
|
"INTERNAL1_CORE_CLOCK_CONTROL",
|
|
"*",
|
|
"CORE_CLOCK",
|
|
0x0D,
|
|
0x04,
|
|
Zero,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
0x19A14780,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
0x18964020,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
0x14810600,
|
|
0x02
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
0x11E1A300,
|
|
0x02
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
0x10642AC0,
|
|
0x02
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
0x0BEBC200,
|
|
0x02
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
0x0A37CADB,
|
|
0x03
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x07,
|
|
0x09D5B340,
|
|
0x03
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x08,
|
|
0x08F0D180,
|
|
0x03
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x09,
|
|
0x05F5E100,
|
|
0x03
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0A,
|
|
0x051BD4B0,
|
|
0x03
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0B,
|
|
0x0124F800,
|
|
0x03
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0C,
|
|
Zero,
|
|
0x03
|
|
}
|
|
},
|
|
|
|
Package (0x33)
|
|
{
|
|
"PSTATE_SET",
|
|
0x04,
|
|
"INTERNAL1_EBI_BANDWIDTH",
|
|
"*",
|
|
"BANDWIDTH",
|
|
0x2B,
|
|
0x1F,
|
|
Zero,
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
0x000000031A4A9F80,
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
0x0000000302731B80,
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x02,
|
|
0x00000002EA9B9780,
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x03,
|
|
0x00000002D2C41380,
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x04,
|
|
0x00000002BAEC8F80,
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x05,
|
|
0x00000002A3150B80,
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
0x000000028B3D8780,
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x07,
|
|
0x0000000273660380,
|
|
Zero
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x08,
|
|
0x000000025B8E7F80,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x09,
|
|
0x000000023C346000,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0A,
|
|
0x00000002245CDC00,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0B,
|
|
0x000000020C855800,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0C,
|
|
0x00000001F4ADD400,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0D,
|
|
0x00000001DCD65000,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0E,
|
|
0x00000001C4FECC00,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x0F,
|
|
0x00000001AD274800,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x10,
|
|
0x00000001954FC400,
|
|
One
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"PSTATE",
|
|
0x11,
|
|
0x000000017D784000,
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"ROTATOR_POWER_STATES",
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"HW_BLOCK_ROTATOR",
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Package (0x02)
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{
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"ENGINE",
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"ROTATOR"
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0x03,
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0x04,
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Package (0x06)
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{
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"FSTATE",
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Zero,
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"ALL_ON",
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Zero,
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Zero,
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0x03
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},
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Package (0x06)
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{
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"FSTATE",
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"CLK_OFF",
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0x2710,
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Zero,
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0x02
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},
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Package (0x06)
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{
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"FSTATE",
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"PWR_OFF",
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0x000186A0,
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Zero,
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One
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Package (0x0A)
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{
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"PSTATE_SET",
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Zero,
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"ROTATOR_RESET",
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"*",
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"RESET",
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0x02,
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Zero,
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Zero,
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{
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"PSTATE",
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0x02
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},
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Package (0x04)
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{
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"PSTATE",
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Zero,
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0x02
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}
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},
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Package (0x0A)
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{
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"PSTATE_SET",
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"ROTATOR_FOOTSWITCH_OVERRIDE",
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"*",
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"FOOTSWITCH_OVERRIDE",
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0x02,
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0xFFFFFFFF,
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Zero,
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Package (0x04)
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{
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"PSTATE",
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0x02
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{
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"PSTATE",
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One,
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0x02
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}
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},
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Package (0x10)
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{
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"PSTATE_SET",
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0x02,
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"ROTATOR_CORE_CLOCK_CONTROL",
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"*",
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"CORE_CLOCK",
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0x08,
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0x05,
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Zero,
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Package (0x05)
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{
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"PSTATE",
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0x19A14780,
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One,
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Package (0x02)
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{
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"GPU",
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0x64
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}
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},
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Package (0x05)
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{
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"PSTATE",
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0x18964020,
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One,
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Package (0x02)
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{
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"GPU",
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0x64
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}
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},
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Package (0x05)
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{
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"PSTATE",
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Package (0x02)
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{
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"GPU",
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0x42
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Package (0x05)
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{
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"PSTATE",
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0x11E1A300,
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0x02,
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Package (0x02)
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{
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"GPU",
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0x42
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}
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Package (0x05)
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{
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"PSTATE",
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Package (0x02)
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{
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"GPU",
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0x21
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Package (0x05)
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{
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0x03,
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Package (0x02)
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{
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"GPU",
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0x21
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Package (0x05)
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{
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0x03,
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Package (0x02)
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{
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"GPU",
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Zero
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}
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Package (0x05)
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{
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"PSTATE",
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0x03,
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Package (0x02)
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{
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"GPU",
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Zero
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},
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Package (0x3A)
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{
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"PSTATE_SET",
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0x03,
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"ROTATOR_AXI_BANDWIDTH_CONTROL",
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"*",
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"BANDWIDTH",
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0x32,
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0xFFFFFFFF,
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Zero,
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Package (0x05)
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{
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0x000000031A4A9F80,
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Package (0x02)
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{
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"GPU",
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0x64
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Package (0x05)
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{
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Package (0x02)
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{
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Package (0x05)
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{
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Package (0x02)
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{
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"GPU",
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0x64
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}
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Package (0x05)
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{
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"PSTATE",
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Package (0x02)
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{
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Package (0x05)
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{
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{
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0x64
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{
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Package (0x02)
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{
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0x64
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{
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{
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{
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"GPU",
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0x64
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Package (0x05)
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{
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One,
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Package (0x02)
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{
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"GPU",
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Package (0x05)
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{
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Package (0x02)
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{
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"GPU",
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{
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{
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Package (0x05)
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{
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{
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{
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Zero
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Zero
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Zero
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Zero
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{
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"PSTATE",
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{
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"PSTATE",
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0x6B,
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{
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{
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0x6E,
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0x05,
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"CRYPTO_POWER_STATES",
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"HW_BLOCK_NONE",
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Package (0x02)
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{
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"ENGINE",
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"CRYPTO"
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0x02,
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0x03,
|
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{
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"ALL_ON",
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Zero,
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0x03
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{
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"FSTATE",
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"PWR_OFF",
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0x000186A0,
|
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Zero,
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One
|
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},
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|
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{
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"PSTATE_SET",
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Zero,
|
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"CRYPTO_RESET",
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"*",
|
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"RESET",
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0x02,
|
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Zero,
|
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Zero,
|
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{
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One,
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{
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"PSTATE",
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One,
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Zero,
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0x02
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{
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"PSTATE_SET",
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"CRYPTO_FOOTSWITCH_OVERRIDE",
|
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"*",
|
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"FOOTSWITCH_OVERRIDE",
|
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0x02,
|
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One,
|
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Zero,
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Package (0x04)
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{
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"PSTATE",
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One,
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0x02
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},
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Package (0x04)
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{
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"PSTATE",
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One,
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Zero,
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0x02
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}
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},
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|
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{
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"PSTATE_SET",
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0x02,
|
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"CRYPTO_CORE_CLOCK_CONTROL",
|
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"*",
|
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"CORE_CLOCK",
|
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One,
|
|
Zero,
|
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Zero,
|
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Package (0x04)
|
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{
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"PSTATE",
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Zero,
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Zero
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}
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Package (0x10)
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{
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"COMPONENT",
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0x06,
|
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ToUUID ("e6be5096-55ec-4891-884b-0760bfc533b6"),
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"VIDEO_ENCODER_POWER_STATES",
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"HW_BLOCK_VIDEO",
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{
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"ENGINE",
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"VIDEO_ENCODER"
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},
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0x03,
|
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0x04,
|
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{
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"FSTATE",
|
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Zero,
|
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"ALL_ON",
|
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Zero,
|
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Zero,
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0x03
|
|
},
|
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|
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{
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"FSTATE",
|
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|
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"CLK_OFF",
|
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0x2710,
|
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Zero,
|
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0x02
|
|
},
|
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|
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{
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"FSTATE",
|
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|
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"PWR_OFF",
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0x000186A0,
|
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Zero,
|
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One
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},
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|
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|
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{
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"PSTATE_SET",
|
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Zero,
|
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"VIDEO_ENCODER_RESET",
|
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"*",
|
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"RESET",
|
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0x02,
|
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Zero,
|
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Zero,
|
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{
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One,
|
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},
|
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|
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{
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"PSTATE",
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Zero,
|
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0x02
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|
}
|
|
},
|
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|
|
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|
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{
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"PSTATE_SET",
|
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One,
|
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"VIDEO_ENCODER_FOOTSWITCH_OVERRIDE",
|
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"*",
|
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"FOOTSWITCH_OVERRIDE",
|
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0x02,
|
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One,
|
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Zero,
|
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{
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"PSTATE",
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One,
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{
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"PSTATE",
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Zero,
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0x02
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|
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{
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"PSTATE_SET",
|
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0x02,
|
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"VIDEO_ENCODER_CORE_CLOCK_CONTROL",
|
|
"*",
|
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"CORE_CLOCK",
|
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0x07,
|
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0x04,
|
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Zero,
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{
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0x1FC4EF40,
|
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Zero
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},
|
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{
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"PSTATE",
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|
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0x1A76E700,
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One
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|
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{
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"PSTATE",
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0x02
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},
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Package (0x04)
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{
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"PSTATE",
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0x03,
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0x13AB6680,
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0x02
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},
|
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Package (0x04)
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{
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"PSTATE",
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0x04,
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0x0BEBC200,
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0x02
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},
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{
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"PSTATE",
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0x05,
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0x05F5E100,
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0x02
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},
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Package (0x04)
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{
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"PSTATE",
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0x06,
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Zero,
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0x03
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}
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Package (0x77)
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{
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{
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"PSTATE",
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{
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{
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0x2A,
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"COMPONENT",
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0x09,
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"ALWAYS_ACTIVE_WP",
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"HW_BLOCK_NONE",
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{
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One,
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{
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"FSTATE",
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Zero,
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"ALL_ON",
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Zero,
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One
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"CORE_CLOCK",
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0x09,
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0x05,
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{
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0x2A51BD80,
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{
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"GPU",
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0x64
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{
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0x01A0
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{
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{
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"GPU",
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0x5B
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{
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{
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{
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0x51
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{
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{
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0x03,
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0x03,
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{
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0x47
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{
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{
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{
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"GPU",
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0x38
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{
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0x2F
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
0x80
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE",
|
|
0x06,
|
|
0x0EB8EBC0,
|
|
0x06,
|
|
Package (0x02)
|
|
{
|
|
"GPU",
|
|
0x23
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
0x40
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE",
|
|
0x07,
|
|
0x0ABA9500,
|
|
0x07,
|
|
Package (0x02)
|
|
{
|
|
"GPU",
|
|
Zero
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
0x30
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE",
|
|
0x08,
|
|
Zero,
|
|
0x08,
|
|
Package (0x02)
|
|
{
|
|
"GPU",
|
|
Zero
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
Zero
|
|
}
|
|
}
|
|
})
|
|
Name (P002, Package (0x0B)
|
|
{
|
|
"ENGINE_PSTATE_SET",
|
|
0x03,
|
|
"GRAPHICS_FREQ_CONTROL",
|
|
"CORE_CLOCK",
|
|
0x02,
|
|
One,
|
|
"TRUE",
|
|
Zero,
|
|
Zero,
|
|
Package (0x06)
|
|
{
|
|
"PSTATE",
|
|
Zero,
|
|
0x10B07600,
|
|
Zero,
|
|
Package (0x02)
|
|
{
|
|
"GPU",
|
|
Zero
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
0x80
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"PSTATE",
|
|
One,
|
|
Zero,
|
|
One,
|
|
Package (0x02)
|
|
{
|
|
"GPU",
|
|
Zero
|
|
},
|
|
|
|
Package (0x01)
|
|
{
|
|
Zero
|
|
}
|
|
}
|
|
})
|
|
If ((\_SB.SIDV >= 0x00020000))
|
|
{
|
|
DerefOf (RBUF [0x04]) [0x0E] = P001 /* \_SB_.GPU0.PMCL.P001 */
|
|
}
|
|
Else
|
|
{
|
|
DerefOf (RBUF [0x04]) [0x0E] = P002 /* \_SB_.GPU0.PMCL.P002 */
|
|
}
|
|
|
|
Return (RBUF) /* \_SB_.GPU0.PMCL.RBUF */
|
|
}
|
|
|
|
Method (_ROM, 3, NotSerialized) // _ROM: Read-Only Memory
|
|
{
|
|
|
|
|
|
Name (PCFG, Buffer (0x09C2)
|
|
{
|
|
/* 0000 */ 0x3C, 0x3F, 0x78, 0x6D, 0x6C, 0x20, 0x76, 0x65, // <?xml ve
|
|
/* 0008 */ 0x72, 0x73, 0x69, 0x6F, 0x6E, 0x3D, 0x27, 0x31, // rsion='1
|
|
/* 0010 */ 0x2E, 0x30, 0x27, 0x20, 0x65, 0x6E, 0x63, 0x6F, // .0' enco
|
|
/* 0018 */ 0x64, 0x69, 0x6E, 0x67, 0x3D, 0x27, 0x75, 0x74, // ding='ut
|
|
/* 0020 */ 0x66, 0x2D, 0x38, 0x27, 0x3F, 0x3E, 0x0A, 0x3C, // f-8'?>.<
|
|
/* 0028 */ 0x50, 0x61, 0x6E, 0x65, 0x6C, 0x4E, 0x61, 0x6D, // PanelNam
|
|
/* 0030 */ 0x65, 0x3E, 0x41, 0x4D, 0x53, 0x36, 0x34, 0x35, // e>AMS645
|
|
/* 0038 */ 0x52, 0x48, 0x30, 0x31, 0x5F, 0x4D, 0x65, 0x69, // RH01_Mei
|
|
/* 0040 */ 0x7A, 0x75, 0x31, 0x36, 0x3C, 0x2F, 0x50, 0x61, // zu16</Pa
|
|
/* 0048 */ 0x6E, 0x65, 0x6C, 0x4E, 0x61, 0x6D, 0x65, 0x3E, // nelName>
|
|
/* 0050 */ 0x0A, 0x3C, 0x50, 0x61, 0x6E, 0x65, 0x6C, 0x44, // .<PanelD
|
|
/* 0058 */ 0x65, 0x73, 0x63, 0x72, 0x69, 0x70, 0x74, 0x69, // escripti
|
|
/* 0060 */ 0x6F, 0x6E, 0x3E, 0x53, 0x4F, 0x46, 0x45, 0x46, // on>SOFEF
|
|
/* 0068 */ 0x30, 0x30, 0x4D, 0x20, 0x53, 0x69, 0x6E, 0x67, // 00M Sing
|
|
/* 0070 */ 0x6C, 0x65, 0x20, 0x44, 0x53, 0x49, 0x20, 0x43, // le DSI C
|
|
/* 0078 */ 0x6F, 0x6D, 0x6D, 0x61, 0x6E, 0x64, 0x20, 0x4D, // ommand M
|
|
/* 0080 */ 0x6F, 0x64, 0x65, 0x20, 0x50, 0x61, 0x6E, 0x65, // ode Pane
|
|
/* 0088 */ 0x6C, 0x20, 0x28, 0x31, 0x30, 0x38, 0x30, 0x78, // l (1080x
|
|
/* 0090 */ 0x32, 0x31, 0x36, 0x30, 0x20, 0x32, 0x34, 0x62, // 2160 24b
|
|
/* 0098 */ 0x70, 0x70, 0x29, 0x3C, 0x2F, 0x50, 0x61, 0x6E, // pp)</Pan
|
|
/* 00A0 */ 0x65, 0x6C, 0x44, 0x65, 0x73, 0x63, 0x72, 0x69, // elDescri
|
|
/* 00A8 */ 0x70, 0x74, 0x69, 0x6F, 0x6E, 0x3E, 0x0A, 0x3C, // ption>.<
|
|
/* 00B0 */ 0x47, 0x72, 0x6F, 0x75, 0x70, 0x20, 0x69, 0x64, // Group id
|
|
/* 00B8 */ 0x3D, 0x27, 0x41, 0x63, 0x74, 0x69, 0x76, 0x65, // ='Active
|
|
/* 00C0 */ 0x20, 0x54, 0x69, 0x6D, 0x69, 0x6E, 0x67, 0x27, // Timing'
|
|
/* 00C8 */ 0x3E, 0x0A, 0x3C, 0x48, 0x6F, 0x72, 0x69, 0x7A, // >.<Horiz
|
|
/* 00D0 */ 0x6F, 0x6E, 0x74, 0x61, 0x6C, 0x41, 0x63, 0x74, // ontalAct
|
|
/* 00D8 */ 0x69, 0x76, 0x65, 0x3E, 0x31, 0x30, 0x38, 0x30, // ive>1080
|
|
/* 00E0 */ 0x3C, 0x2F, 0x48, 0x6F, 0x72, 0x69, 0x7A, 0x6F, // </Horizo
|
|
/* 00E8 */ 0x6E, 0x74, 0x61, 0x6C, 0x41, 0x63, 0x74, 0x69, // ntalActi
|
|
/* 00F0 */ 0x76, 0x65, 0x3E, 0x0A, 0x3C, 0x48, 0x6F, 0x72, // ve>.<Hor
|
|
/* 00F8 */ 0x69, 0x7A, 0x6F, 0x6E, 0x74, 0x61, 0x6C, 0x46, // izontalF
|
|
/* 0100 */ 0x72, 0x6F, 0x6E, 0x74, 0x50, 0x6F, 0x72, 0x63, // rontPorc
|
|
/* 0108 */ 0x68, 0x3E, 0x31, 0x32, 0x38, 0x3C, 0x2F, 0x48, // h>128</H
|
|
/* 0110 */ 0x6F, 0x72, 0x69, 0x7A, 0x6F, 0x6E, 0x74, 0x61, // orizonta
|
|
/* 0118 */ 0x6C, 0x46, 0x72, 0x6F, 0x6E, 0x74, 0x50, 0x6F, // lFrontPo
|
|
/* 0120 */ 0x72, 0x63, 0x68, 0x3E, 0x0A, 0x3C, 0x48, 0x6F, // rch>.<Ho
|
|
/* 0128 */ 0x72, 0x69, 0x7A, 0x6F, 0x6E, 0x74, 0x61, 0x6C, // rizontal
|
|
/* 0130 */ 0x42, 0x61, 0x63, 0x6B, 0x50, 0x6F, 0x72, 0x63, // BackPorc
|
|
/* 0138 */ 0x68, 0x3E, 0x38, 0x3C, 0x2F, 0x48, 0x6F, 0x72, // h>8</Hor
|
|
/* 0140 */ 0x69, 0x7A, 0x6F, 0x6E, 0x74, 0x61, 0x6C, 0x42, // izontalB
|
|
/* 0148 */ 0x61, 0x63, 0x6B, 0x50, 0x6F, 0x72, 0x63, 0x68, // ackPorch
|
|
/* 0150 */ 0x3E, 0x0A, 0x3C, 0x48, 0x6F, 0x72, 0x69, 0x7A, // >.<Horiz
|
|
/* 0158 */ 0x6F, 0x6E, 0x74, 0x61, 0x6C, 0x53, 0x79, 0x6E, // ontalSyn
|
|
/* 0160 */ 0x63, 0x50, 0x75, 0x6C, 0x73, 0x65, 0x3E, 0x38, // cPulse>8
|
|
/* 0168 */ 0x3C, 0x2F, 0x48, 0x6F, 0x72, 0x69, 0x7A, 0x6F, // </Horizo
|
|
/* 0170 */ 0x6E, 0x74, 0x61, 0x6C, 0x53, 0x79, 0x6E, 0x63, // ntalSync
|
|
/* 0178 */ 0x50, 0x75, 0x6C, 0x73, 0x65, 0x3E, 0x0A, 0x3C, // Pulse>.<
|
|
/* 0180 */ 0x48, 0x6F, 0x72, 0x69, 0x7A, 0x6F, 0x6E, 0x74, // Horizont
|
|
/* 0188 */ 0x61, 0x6C, 0x53, 0x79, 0x6E, 0x63, 0x53, 0x6B, // alSyncSk
|
|
/* 0190 */ 0x65, 0x77, 0x3E, 0x30, 0x3C, 0x2F, 0x48, 0x6F, // ew>0</Ho
|
|
/* 0198 */ 0x72, 0x69, 0x7A, 0x6F, 0x6E, 0x74, 0x61, 0x6C, // rizontal
|
|
/* 01A0 */ 0x53, 0x79, 0x6E, 0x63, 0x53, 0x6B, 0x65, 0x77, // SyncSkew
|
|
/* 01A8 */ 0x3E, 0x0A, 0x3C, 0x48, 0x6F, 0x72, 0x69, 0x7A, // >.<Horiz
|
|
/* 01B0 */ 0x6F, 0x6E, 0x74, 0x61, 0x6C, 0x4C, 0x65, 0x66, // ontalLef
|
|
/* 01B8 */ 0x74, 0x42, 0x6F, 0x72, 0x64, 0x65, 0x72, 0x3E, // tBorder>
|
|
/* 01C0 */ 0x30, 0x3C, 0x2F, 0x48, 0x6F, 0x72, 0x69, 0x7A, // 0</Horiz
|
|
/* 01C8 */ 0x6F, 0x6E, 0x74, 0x61, 0x6C, 0x4C, 0x65, 0x66, // ontalLef
|
|
/* 01D0 */ 0x74, 0x42, 0x6F, 0x72, 0x64, 0x65, 0x72, 0x3E, // tBorder>
|
|
/* 01D8 */ 0x0A, 0x3C, 0x48, 0x6F, 0x72, 0x69, 0x7A, 0x6F, // .<Horizo
|
|
/* 01E0 */ 0x6E, 0x74, 0x61, 0x6C, 0x52, 0x69, 0x67, 0x68, // ntalRigh
|
|
/* 01E8 */ 0x74, 0x42, 0x6F, 0x72, 0x64, 0x65, 0x72, 0x3E, // tBorder>
|
|
/* 01F0 */ 0x30, 0x3C, 0x2F, 0x48, 0x6F, 0x72, 0x69, 0x7A, // 0</Horiz
|
|
/* 01F8 */ 0x6F, 0x6E, 0x74, 0x61, 0x6C, 0x52, 0x69, 0x67, // ontalRig
|
|
/* 0200 */ 0x68, 0x74, 0x42, 0x6F, 0x72, 0x64, 0x65, 0x72, // htBorder
|
|
/* 0208 */ 0x3E, 0x0A, 0x3C, 0x56, 0x65, 0x72, 0x74, 0x69, // >.<Verti
|
|
/* 0210 */ 0x63, 0x61, 0x6C, 0x41, 0x63, 0x74, 0x69, 0x76, // calActiv
|
|
/* 0218 */ 0x65, 0x3E, 0x32, 0x31, 0x36, 0x30, 0x3C, 0x2F, // e>2160</
|
|
/* 0220 */ 0x56, 0x65, 0x72, 0x74, 0x69, 0x63, 0x61, 0x6C, // Vertical
|
|
/* 0228 */ 0x41, 0x63, 0x74, 0x69, 0x76, 0x65, 0x3E, 0x0A, // Active>.
|
|
/* 0230 */ 0x3C, 0x56, 0x65, 0x72, 0x74, 0x69, 0x63, 0x61, // <Vertica
|
|
/* 0238 */ 0x6C, 0x46, 0x72, 0x6F, 0x6E, 0x74, 0x50, 0x6F, // lFrontPo
|
|
/* 0240 */ 0x72, 0x63, 0x68, 0x3E, 0x32, 0x3C, 0x2F, 0x56, // rch>2</V
|
|
/* 0248 */ 0x65, 0x72, 0x74, 0x69, 0x63, 0x61, 0x6C, 0x46, // erticalF
|
|
/* 0250 */ 0x72, 0x6F, 0x6E, 0x74, 0x50, 0x6F, 0x72, 0x63, // rontPorc
|
|
/* 0258 */ 0x68, 0x3E, 0x0A, 0x3C, 0x56, 0x65, 0x72, 0x74, // h>.<Vert
|
|
/* 0260 */ 0x69, 0x63, 0x61, 0x6C, 0x42, 0x61, 0x63, 0x6B, // icalBack
|
|
/* 0268 */ 0x50, 0x6F, 0x72, 0x63, 0x68, 0x3E, 0x31, 0x32, // Porch>12
|
|
/* 0270 */ 0x3C, 0x2F, 0x56, 0x65, 0x72, 0x74, 0x69, 0x63, // </Vertic
|
|
/* 0278 */ 0x61, 0x6C, 0x42, 0x61, 0x63, 0x6B, 0x50, 0x6F, // alBackPo
|
|
/* 0280 */ 0x72, 0x63, 0x68, 0x3E, 0x0A, 0x3C, 0x56, 0x65, // rch>.<Ve
|
|
/* 0288 */ 0x72, 0x74, 0x69, 0x63, 0x61, 0x6C, 0x53, 0x79, // rticalSy
|
|
/* 0290 */ 0x6E, 0x63, 0x50, 0x75, 0x6C, 0x73, 0x65, 0x3E, // ncPulse>
|
|
/* 0298 */ 0x32, 0x3C, 0x2F, 0x56, 0x65, 0x72, 0x74, 0x69, // 2</Verti
|
|
/* 02A0 */ 0x63, 0x61, 0x6C, 0x53, 0x79, 0x6E, 0x63, 0x50, // calSyncP
|
|
/* 02A8 */ 0x75, 0x6C, 0x73, 0x65, 0x3E, 0x0A, 0x3C, 0x56, // ulse>.<V
|
|
/* 02B0 */ 0x65, 0x72, 0x74, 0x69, 0x63, 0x61, 0x6C, 0x53, // erticalS
|
|
/* 02B8 */ 0x79, 0x6E, 0x63, 0x53, 0x6B, 0x65, 0x77, 0x3E, // yncSkew>
|
|
/* 02C0 */ 0x30, 0x3C, 0x2F, 0x56, 0x65, 0x72, 0x74, 0x69, // 0</Verti
|
|
/* 02C8 */ 0x63, 0x61, 0x6C, 0x53, 0x79, 0x6E, 0x63, 0x53, // calSyncS
|
|
/* 02D0 */ 0x6B, 0x65, 0x77, 0x3E, 0x0A, 0x3C, 0x56, 0x65, // kew>.<Ve
|
|
/* 02D8 */ 0x72, 0x74, 0x69, 0x63, 0x61, 0x6C, 0x54, 0x6F, // rticalTo
|
|
/* 02E0 */ 0x70, 0x42, 0x6F, 0x72, 0x64, 0x65, 0x72, 0x3E, // pBorder>
|
|
/* 02E8 */ 0x30, 0x3C, 0x2F, 0x56, 0x65, 0x72, 0x74, 0x69, // 0</Verti
|
|
/* 02F0 */ 0x63, 0x61, 0x6C, 0x54, 0x6F, 0x70, 0x42, 0x6F, // calTopBo
|
|
/* 02F8 */ 0x72, 0x64, 0x65, 0x72, 0x3E, 0x0A, 0x3C, 0x56, // rder>.<V
|
|
/* 0300 */ 0x65, 0x72, 0x74, 0x69, 0x63, 0x61, 0x6C, 0x42, // erticalB
|
|
/* 0308 */ 0x6F, 0x74, 0x74, 0x6F, 0x6D, 0x42, 0x6F, 0x72, // ottomBor
|
|
/* 0310 */ 0x64, 0x65, 0x72, 0x3E, 0x30, 0x3C, 0x2F, 0x56, // der>0</V
|
|
/* 0318 */ 0x65, 0x72, 0x74, 0x69, 0x63, 0x61, 0x6C, 0x42, // erticalB
|
|
/* 0320 */ 0x6F, 0x74, 0x74, 0x6F, 0x6D, 0x42, 0x6F, 0x72, // ottomBor
|
|
/* 0328 */ 0x64, 0x65, 0x72, 0x3E, 0x0A, 0x3C, 0x49, 0x6E, // der>.<In
|
|
/* 0330 */ 0x76, 0x65, 0x72, 0x74, 0x44, 0x61, 0x74, 0x61, // vertData
|
|
/* 0338 */ 0x50, 0x6F, 0x6C, 0x61, 0x72, 0x69, 0x74, 0x79, // Polarity
|
|
/* 0340 */ 0x3E, 0x46, 0x61, 0x6C, 0x73, 0x65, 0x3C, 0x2F, // >False</
|
|
/* 0348 */ 0x49, 0x6E, 0x76, 0x65, 0x72, 0x74, 0x44, 0x61, // InvertDa
|
|
/* 0350 */ 0x74, 0x61, 0x50, 0x6F, 0x6C, 0x61, 0x72, 0x69, // taPolari
|
|
/* 0358 */ 0x74, 0x79, 0x3E, 0x0A, 0x3C, 0x49, 0x6E, 0x76, // ty>.<Inv
|
|
/* 0360 */ 0x65, 0x72, 0x74, 0x56, 0x73, 0x79, 0x6E, 0x63, // ertVsync
|
|
/* 0368 */ 0x50, 0x6F, 0x6C, 0x61, 0x69, 0x72, 0x74, 0x79, // Polairty
|
|
/* 0370 */ 0x3E, 0x46, 0x61, 0x6C, 0x73, 0x65, 0x3C, 0x2F, // >False</
|
|
/* 0378 */ 0x49, 0x6E, 0x76, 0x65, 0x72, 0x74, 0x56, 0x73, // InvertVs
|
|
/* 0380 */ 0x79, 0x6E, 0x63, 0x50, 0x6F, 0x6C, 0x61, 0x69, // yncPolai
|
|
/* 0388 */ 0x72, 0x74, 0x79, 0x3E, 0x0A, 0x3C, 0x49, 0x6E, // rty>.<In
|
|
/* 0390 */ 0x76, 0x65, 0x72, 0x74, 0x48, 0x73, 0x79, 0x6E, // vertHsyn
|
|
/* 0398 */ 0x63, 0x50, 0x6F, 0x6C, 0x61, 0x72, 0x69, 0x74, // cPolarit
|
|
/* 03A0 */ 0x79, 0x3E, 0x46, 0x61, 0x6C, 0x73, 0x65, 0x3C, // y>False<
|
|
/* 03A8 */ 0x2F, 0x49, 0x6E, 0x76, 0x65, 0x72, 0x74, 0x48, // /InvertH
|
|
/* 03B0 */ 0x73, 0x79, 0x6E, 0x63, 0x50, 0x6F, 0x6C, 0x61, // syncPola
|
|
/* 03B8 */ 0x72, 0x69, 0x74, 0x79, 0x3E, 0x0A, 0x3C, 0x42, // rity>.<B
|
|
/* 03C0 */ 0x6F, 0x72, 0x64, 0x65, 0x72, 0x43, 0x6F, 0x6C, // orderCol
|
|
/* 03C8 */ 0x6F, 0x72, 0x3E, 0x30, 0x78, 0x30, 0x3C, 0x2F, // or>0x0</
|
|
/* 03D0 */ 0x42, 0x6F, 0x72, 0x64, 0x65, 0x72, 0x43, 0x6F, // BorderCo
|
|
/* 03D8 */ 0x6C, 0x6F, 0x72, 0x3E, 0x0A, 0x3C, 0x2F, 0x47, // lor>.</G
|
|
/* 03E0 */ 0x72, 0x6F, 0x75, 0x70, 0x3E, 0x0A, 0x3C, 0x47, // roup>.<G
|
|
/* 03E8 */ 0x72, 0x6F, 0x75, 0x70, 0x20, 0x69, 0x64, 0x3D, // roup id=
|
|
/* 03F0 */ 0x27, 0x44, 0x69, 0x73, 0x70, 0x6C, 0x61, 0x79, // 'Display
|
|
/* 03F8 */ 0x20, 0x49, 0x6E, 0x74, 0x65, 0x72, 0x66, 0x61, // Interfa
|
|
/* 0400 */ 0x63, 0x65, 0x27, 0x3E, 0x0A, 0x3C, 0x49, 0x6E, // ce'>.<In
|
|
/* 0408 */ 0x74, 0x65, 0x72, 0x66, 0x61, 0x63, 0x65, 0x54, // terfaceT
|
|
/* 0410 */ 0x79, 0x70, 0x65, 0x3E, 0x39, 0x3C, 0x2F, 0x49, // ype>9</I
|
|
/* 0418 */ 0x6E, 0x74, 0x65, 0x72, 0x66, 0x61, 0x63, 0x65, // nterface
|
|
/* 0420 */ 0x54, 0x79, 0x70, 0x65, 0x3E, 0x0A, 0x3C, 0x49, // Type>.<I
|
|
/* 0428 */ 0x6E, 0x74, 0x65, 0x72, 0x66, 0x61, 0x63, 0x65, // nterface
|
|
/* 0430 */ 0x43, 0x6F, 0x6C, 0x6F, 0x72, 0x46, 0x6F, 0x72, // ColorFor
|
|
/* 0438 */ 0x6D, 0x61, 0x74, 0x3E, 0x33, 0x3C, 0x2F, 0x49, // mat>3</I
|
|
/* 0440 */ 0x6E, 0x74, 0x65, 0x72, 0x66, 0x61, 0x63, 0x65, // nterface
|
|
/* 0448 */ 0x43, 0x6F, 0x6C, 0x6F, 0x72, 0x46, 0x6F, 0x72, // ColorFor
|
|
/* 0450 */ 0x6D, 0x61, 0x74, 0x3E, 0x0A, 0x3C, 0x2F, 0x47, // mat>.</G
|
|
/* 0458 */ 0x72, 0x6F, 0x75, 0x70, 0x3E, 0x0A, 0x3C, 0x47, // roup>.<G
|
|
/* 0460 */ 0x72, 0x6F, 0x75, 0x70, 0x20, 0x69, 0x64, 0x3D, // roup id=
|
|
/* 0468 */ 0x27, 0x44, 0x53, 0x49, 0x20, 0x49, 0x6E, 0x74, // 'DSI Int
|
|
/* 0470 */ 0x65, 0x72, 0x66, 0x61, 0x63, 0x65, 0x27, 0x3E, // erface'>
|
|
/* 0478 */ 0x0A, 0x3C, 0x44, 0x53, 0x49, 0x43, 0x68, 0x61, // .<DSICha
|
|
/* 0480 */ 0x6E, 0x6E, 0x65, 0x6C, 0x49, 0x64, 0x3E, 0x32, // nnelId>2
|
|
/* 0488 */ 0x3C, 0x2F, 0x44, 0x53, 0x49, 0x43, 0x68, 0x61, // </DSICha
|
|
/* 0490 */ 0x6E, 0x6E, 0x65, 0x6C, 0x49, 0x64, 0x3E, 0x0A, // nnelId>.
|
|
/* 0498 */ 0x3C, 0x44, 0x53, 0x49, 0x56, 0x69, 0x72, 0x74, // <DSIVirt
|
|
/* 04A0 */ 0x75, 0x61, 0x6C, 0x49, 0x64, 0x3E, 0x30, 0x3C, // ualId>0<
|
|
/* 04A8 */ 0x2F, 0x44, 0x53, 0x49, 0x56, 0x69, 0x72, 0x74, // /DSIVirt
|
|
/* 04B0 */ 0x75, 0x61, 0x6C, 0x49, 0x64, 0x3E, 0x0A, 0x3C, // ualId>.<
|
|
/* 04B8 */ 0x44, 0x53, 0x49, 0x43, 0x6F, 0x6C, 0x6F, 0x72, // DSIColor
|
|
/* 04C0 */ 0x46, 0x6F, 0x72, 0x6D, 0x61, 0x74, 0x3E, 0x33, // Format>3
|
|
/* 04C8 */ 0x36, 0x3C, 0x2F, 0x44, 0x53, 0x49, 0x43, 0x6F, // 6</DSICo
|
|
/* 04D0 */ 0x6C, 0x6F, 0x72, 0x46, 0x6F, 0x72, 0x6D, 0x61, // lorForma
|
|
/* 04D8 */ 0x74, 0x3E, 0x0A, 0x3C, 0x44, 0x53, 0x49, 0x54, // t>.<DSIT
|
|
/* 04E0 */ 0x72, 0x61, 0x66, 0x66, 0x69, 0x63, 0x4D, 0x6F, // rafficMo
|
|
/* 04E8 */ 0x64, 0x65, 0x3E, 0x31, 0x3C, 0x2F, 0x44, 0x53, // de>1</DS
|
|
/* 04F0 */ 0x49, 0x54, 0x72, 0x61, 0x66, 0x66, 0x69, 0x63, // ITraffic
|
|
/* 04F8 */ 0x4D, 0x6F, 0x64, 0x65, 0x3E, 0x0A, 0x3C, 0x44, // Mode>.<D
|
|
/* 0500 */ 0x53, 0x49, 0x4C, 0x61, 0x6E, 0x65, 0x73, 0x3E, // SILanes>
|
|
/* 0508 */ 0x34, 0x3C, 0x2F, 0x44, 0x53, 0x49, 0x4C, 0x61, // 4</DSILa
|
|
/* 0510 */ 0x6E, 0x65, 0x73, 0x3E, 0x0A, 0x3C, 0x44, 0x53, // nes>.<DS
|
|
/* 0518 */ 0x49, 0x4C, 0x50, 0x31, 0x31, 0x41, 0x74, 0x49, // ILP11AtI
|
|
/* 0520 */ 0x6E, 0x69, 0x74, 0x3E, 0x54, 0x72, 0x75, 0x65, // nit>True
|
|
/* 0528 */ 0x3C, 0x2F, 0x44, 0x53, 0x49, 0x4C, 0x50, 0x31, // </DSILP1
|
|
/* 0530 */ 0x31, 0x41, 0x74, 0x49, 0x6E, 0x69, 0x74, 0x3E, // 1AtInit>
|
|
/* 0538 */ 0x0A, 0x3C, 0x44, 0x53, 0x49, 0x4C, 0x6F, 0x77, // .<DSILow
|
|
/* 0540 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4D, 0x6F, 0x64, // PowerMod
|
|
/* 0548 */ 0x65, 0x49, 0x6E, 0x42, 0x4C, 0x4C, 0x50, 0x45, // eInBLLPE
|
|
/* 0550 */ 0x4F, 0x46, 0x20, 0x75, 0x6E, 0x69, 0x74, 0x73, // OF units
|
|
/* 0558 */ 0x3D, 0x27, 0x42, 0x6F, 0x6F, 0x6C, 0x27, 0x3E, // ='Bool'>
|
|
/* 0560 */ 0x54, 0x72, 0x75, 0x65, 0x3C, 0x2F, 0x44, 0x53, // True</DS
|
|
/* 0568 */ 0x49, 0x4C, 0x6F, 0x77, 0x50, 0x6F, 0x77, 0x65, // ILowPowe
|
|
/* 0570 */ 0x72, 0x4D, 0x6F, 0x64, 0x65, 0x49, 0x6E, 0x42, // rModeInB
|
|
/* 0578 */ 0x4C, 0x4C, 0x50, 0x45, 0x4F, 0x46, 0x3E, 0x0A, // LLPEOF>.
|
|
/* 0580 */ 0x3C, 0x44, 0x53, 0x49, 0x4C, 0x6F, 0x77, 0x50, // <DSILowP
|
|
/* 0588 */ 0x6F, 0x77, 0x65, 0x72, 0x4D, 0x6F, 0x64, 0x65, // owerMode
|
|
/* 0590 */ 0x49, 0x6E, 0x42, 0x4C, 0x4C, 0x50, 0x20, 0x75, // InBLLP u
|
|
/* 0598 */ 0x6E, 0x69, 0x74, 0x73, 0x3D, 0x27, 0x42, 0x6F, // nits='Bo
|
|
/* 05A0 */ 0x6F, 0x6C, 0x27, 0x3E, 0x54, 0x72, 0x75, 0x65, // ol'>True
|
|
/* 05A8 */ 0x3C, 0x2F, 0x44, 0x53, 0x49, 0x4C, 0x6F, 0x77, // </DSILow
|
|
/* 05B0 */ 0x50, 0x6F, 0x77, 0x65, 0x72, 0x4D, 0x6F, 0x64, // PowerMod
|
|
/* 05B8 */ 0x65, 0x49, 0x6E, 0x42, 0x4C, 0x4C, 0x50, 0x3E, // eInBLLP>
|
|
/* 05C0 */ 0x0A, 0x3C, 0x44, 0x53, 0x49, 0x52, 0x65, 0x66, // .<DSIRef
|
|
/* 05C8 */ 0x72, 0x65, 0x73, 0x68, 0x52, 0x61, 0x74, 0x65, // reshRate
|
|
/* 05D0 */ 0x3E, 0x30, 0x78, 0x33, 0x43, 0x30, 0x30, 0x30, // >0x3C000
|
|
/* 05D8 */ 0x30, 0x3C, 0x2F, 0x44, 0x53, 0x49, 0x52, 0x65, // 0</DSIRe
|
|
/* 05E0 */ 0x66, 0x72, 0x65, 0x73, 0x68, 0x52, 0x61, 0x74, // freshRat
|
|
/* 05E8 */ 0x65, 0x3E, 0x0A, 0x3C, 0x44, 0x53, 0x49, 0x45, // e>.<DSIE
|
|
/* 05F0 */ 0x6E, 0x61, 0x62, 0x6C, 0x65, 0x41, 0x75, 0x74, // nableAut
|
|
/* 05F8 */ 0x6F, 0x52, 0x65, 0x66, 0x72, 0x65, 0x73, 0x68, // oRefresh
|
|
/* 0600 */ 0x3E, 0x54, 0x72, 0x75, 0x65, 0x3C, 0x2F, 0x44, // >True</D
|
|
/* 0608 */ 0x53, 0x49, 0x45, 0x6E, 0x61, 0x62, 0x6C, 0x65, // SIEnable
|
|
/* 0610 */ 0x41, 0x75, 0x74, 0x6F, 0x52, 0x65, 0x66, 0x72, // AutoRefr
|
|
/* 0618 */ 0x65, 0x73, 0x68, 0x3E, 0x0A, 0x3C, 0x44, 0x53, // esh>.<DS
|
|
/* 0620 */ 0x49, 0x41, 0x75, 0x74, 0x6F, 0x52, 0x65, 0x66, // IAutoRef
|
|
/* 0628 */ 0x72, 0x65, 0x73, 0x68, 0x46, 0x72, 0x61, 0x6D, // reshFram
|
|
/* 0630 */ 0x65, 0x4E, 0x75, 0x6D, 0x44, 0x69, 0x76, 0x3E, // eNumDiv>
|
|
/* 0638 */ 0x31, 0x3C, 0x2F, 0x44, 0x53, 0x49, 0x41, 0x75, // 1</DSIAu
|
|
/* 0640 */ 0x74, 0x6F, 0x52, 0x65, 0x66, 0x72, 0x65, 0x73, // toRefres
|
|
/* 0648 */ 0x68, 0x46, 0x72, 0x61, 0x6D, 0x65, 0x4E, 0x75, // hFrameNu
|
|
/* 0650 */ 0x6D, 0x44, 0x69, 0x76, 0x3E, 0x0A, 0x3C, 0x44, // mDiv>.<D
|
|
/* 0658 */ 0x53, 0x49, 0x45, 0x73, 0x63, 0x61, 0x70, 0x65, // SIEscape
|
|
/* 0660 */ 0x43, 0x6C, 0x6F, 0x63, 0x6B, 0x46, 0x72, 0x65, // ClockFre
|
|
/* 0668 */ 0x71, 0x75, 0x65, 0x6E, 0x63, 0x79, 0x3E, 0x39, // quency>9
|
|
/* 0670 */ 0x36, 0x30, 0x30, 0x30, 0x30, 0x30, 0x3C, 0x2F, // 600000</
|
|
/* 0678 */ 0x44, 0x53, 0x49, 0x45, 0x73, 0x63, 0x61, 0x70, // DSIEscap
|
|
/* 0680 */ 0x65, 0x43, 0x6C, 0x6F, 0x63, 0x6B, 0x46, 0x72, // eClockFr
|
|
/* 0688 */ 0x65, 0x71, 0x75, 0x65, 0x6E, 0x63, 0x79, 0x3E, // equency>
|
|
/* 0690 */ 0x0A, 0x3C, 0x44, 0x53, 0x49, 0x50, 0x61, 0x63, // .<DSIPac
|
|
/* 0698 */ 0x6B, 0x65, 0x74, 0x54, 0x72, 0x61, 0x6E, 0x73, // ketTrans
|
|
/* 06A0 */ 0x66, 0x65, 0x72, 0x48, 0x53, 0x3E, 0x54, 0x72, // ferHS>Tr
|
|
/* 06A8 */ 0x75, 0x65, 0x3C, 0x2F, 0x44, 0x53, 0x49, 0x50, // ue</DSIP
|
|
/* 06B0 */ 0x61, 0x63, 0x6B, 0x65, 0x74, 0x54, 0x72, 0x61, // acketTra
|
|
/* 06B8 */ 0x6E, 0x73, 0x66, 0x65, 0x72, 0x48, 0x53, 0x3E, // nsferHS>
|
|
/* 06C0 */ 0x0A, 0x3C, 0x44, 0x53, 0x49, 0x43, 0x6F, 0x6E, // .<DSICon
|
|
/* 06C8 */ 0x74, 0x72, 0x6F, 0x6C, 0x6C, 0x65, 0x72, 0x4D, // trollerM
|
|
/* 06D0 */ 0x61, 0x70, 0x70, 0x69, 0x6E, 0x67, 0x3E, 0x0A, // apping>.
|
|
/* 06D8 */ 0x20, 0x20, 0x30, 0x30, 0x0A, 0x3C, 0x2F, 0x44, // 00.</D
|
|
/* 06E0 */ 0x53, 0x49, 0x43, 0x6F, 0x6E, 0x74, 0x72, 0x6F, // SIContro
|
|
/* 06E8 */ 0x6C, 0x6C, 0x65, 0x72, 0x4D, 0x61, 0x70, 0x70, // llerMapp
|
|
/* 06F0 */ 0x69, 0x6E, 0x67, 0x3E, 0x0A, 0x3C, 0x2F, 0x47, // ing>.</G
|
|
/* 06F8 */ 0x72, 0x6F, 0x75, 0x70, 0x3E, 0x0A, 0x3C, 0x44, // roup>.<D
|
|
/* 0700 */ 0x53, 0x49, 0x49, 0x6E, 0x69, 0x74, 0x53, 0x65, // SIInitSe
|
|
/* 0708 */ 0x71, 0x75, 0x65, 0x6E, 0x63, 0x65, 0x3E, 0x20, // quence>
|
|
/* 0710 */ 0x30, 0x35, 0x20, 0x31, 0x31, 0x20, 0x30, 0x30, // 05 11 00
|
|
/* 0718 */ 0x0A, 0x20, 0x46, 0x46, 0x20, 0x30, 0x41, 0x0A, // . FF 0A.
|
|
/* 0720 */ 0x20, 0x33, 0x39, 0x20, 0x46, 0x30, 0x20, 0x35, // 39 F0 5
|
|
/* 0728 */ 0x41, 0x20, 0x35, 0x41, 0x0A, 0x20, 0x31, 0x35, // A 5A. 15
|
|
/* 0730 */ 0x20, 0x33, 0x35, 0x20, 0x30, 0x30, 0x0A, 0x20, // 35 00.
|
|
/* 0738 */ 0x33, 0x39, 0x20, 0x46, 0x30, 0x20, 0x41, 0x35, // 39 F0 A5
|
|
/* 0740 */ 0x20, 0x41, 0x35, 0x0A, 0x20, 0x33, 0x39, 0x20, // A5. 39
|
|
/* 0748 */ 0x32, 0x42, 0x20, 0x30, 0x30, 0x20, 0x30, 0x30, // 2B 00 00
|
|
/* 0750 */ 0x20, 0x30, 0x38, 0x20, 0x36, 0x46, 0x0A, 0x20, // 08 6F.
|
|
/* 0758 */ 0x31, 0x35, 0x20, 0x35, 0x33, 0x20, 0x32, 0x30, // 15 53 20
|
|
/* 0760 */ 0x0A, 0x20, 0x33, 0x39, 0x20, 0x35, 0x31, 0x20, // . 39 51
|
|
/* 0768 */ 0x30, 0x30, 0x20, 0x30, 0x30, 0x0A, 0x20, 0x31, // 00 00. 1
|
|
/* 0770 */ 0x35, 0x20, 0x35, 0x35, 0x20, 0x30, 0x30, 0x0A, // 5 55 00.
|
|
/* 0778 */ 0x20, 0x33, 0x39, 0x20, 0x46, 0x30, 0x20, 0x35, // 39 F0 5
|
|
/* 0780 */ 0x41, 0x20, 0x35, 0x41, 0x0A, 0x20, 0x31, 0x35, // A 5A. 15
|
|
/* 0788 */ 0x20, 0x42, 0x30, 0x20, 0x30, 0x32, 0x0A, 0x20, // B0 02.
|
|
/* 0790 */ 0x33, 0x39, 0x20, 0x45, 0x32, 0x20, 0x42, 0x33, // 39 E2 B3
|
|
/* 0798 */ 0x20, 0x30, 0x43, 0x20, 0x30, 0x34, 0x20, 0x33, // 0C 04 3
|
|
/* 07A0 */ 0x39, 0x20, 0x43, 0x45, 0x20, 0x31, 0x33, 0x20, // 9 CE 13
|
|
/* 07A8 */ 0x30, 0x37, 0x20, 0x30, 0x34, 0x20, 0x41, 0x46, // 07 04 AF
|
|
/* 07B0 */ 0x20, 0x34, 0x34, 0x20, 0x45, 0x36, 0x20, 0x43, // 44 E6 C
|
|
/* 07B8 */ 0x44, 0x20, 0x43, 0x39, 0x20, 0x31, 0x31, 0x20, // D C9 11
|
|
/* 07C0 */ 0x43, 0x32, 0x20, 0x45, 0x41, 0x20, 0x45, 0x36, // C2 EA E6
|
|
/* 07C8 */ 0x20, 0x31, 0x38, 0x20, 0x46, 0x46, 0x20, 0x46, // 18 FF F
|
|
/* 07D0 */ 0x46, 0x20, 0x46, 0x46, 0x20, 0x46, 0x31, 0x20, // F FF F1
|
|
/* 07D8 */ 0x31, 0x30, 0x20, 0x30, 0x37, 0x20, 0x30, 0x30, // 10 07 00
|
|
/* 07E0 */ 0x20, 0x43, 0x30, 0x20, 0x30, 0x30, 0x20, 0x30, // C0 00 0
|
|
/* 07E8 */ 0x37, 0x20, 0x30, 0x35, 0x20, 0x42, 0x35, 0x20, // 7 05 B5
|
|
/* 07F0 */ 0x30, 0x30, 0x20, 0x44, 0x37, 0x20, 0x43, 0x30, // 00 D7 C0
|
|
/* 07F8 */ 0x20, 0x46, 0x46, 0x20, 0x31, 0x36, 0x20, 0x43, // FF 16 C
|
|
/* 0800 */ 0x34, 0x20, 0x45, 0x37, 0x20, 0x45, 0x34, 0x20, // 4 E7 E4
|
|
/* 0808 */ 0x30, 0x46, 0x20, 0x46, 0x46, 0x20, 0x46, 0x46, // 0F FF FF
|
|
/* 0810 */ 0x20, 0x46, 0x46, 0x20, 0x42, 0x44, 0x20, 0x30, // FF BD 0
|
|
/* 0818 */ 0x32, 0x20, 0x30, 0x30, 0x20, 0x30, 0x43, 0x20, // 2 00 0C
|
|
/* 0820 */ 0x44, 0x36, 0x20, 0x30, 0x31, 0x20, 0x30, 0x36, // D6 01 06
|
|
/* 0828 */ 0x20, 0x30, 0x34, 0x20, 0x41, 0x35, 0x20, 0x30, // 04 A5 0
|
|
/* 0830 */ 0x36, 0x20, 0x45, 0x45, 0x20, 0x43, 0x39, 0x20, // 6 EE C9
|
|
/* 0838 */ 0x43, 0x38, 0x20, 0x30, 0x41, 0x20, 0x44, 0x46, // C8 0A DF
|
|
/* 0840 */ 0x20, 0x44, 0x31, 0x20, 0x45, 0x37, 0x20, 0x30, // D1 E7 0
|
|
/* 0848 */ 0x36, 0x20, 0x46, 0x46, 0x20, 0x46, 0x45, 0x20, // 6 FF FE
|
|
/* 0850 */ 0x46, 0x45, 0x0A, 0x20, 0x33, 0x39, 0x20, 0x46, // FE. 39 F
|
|
/* 0858 */ 0x30, 0x20, 0x41, 0x35, 0x20, 0x41, 0x35, 0x0A, // 0 A5 A5.
|
|
/* 0860 */ 0x20, 0x33, 0x39, 0x20, 0x46, 0x30, 0x20, 0x35, // 39 F0 5
|
|
/* 0868 */ 0x41, 0x20, 0x35, 0x41, 0x0A, 0x20, 0x31, 0x35, // A 5A. 15
|
|
/* 0870 */ 0x20, 0x42, 0x30, 0x20, 0x30, 0x31, 0x0A, 0x20, // B0 01.
|
|
/* 0878 */ 0x31, 0x35, 0x20, 0x45, 0x32, 0x20, 0x30, 0x31, // 15 E2 01
|
|
/* 0880 */ 0x0A, 0x20, 0x33, 0x39, 0x20, 0x46, 0x30, 0x20, // . 39 F0
|
|
/* 0888 */ 0x41, 0x35, 0x20, 0x41, 0x35, 0x0A, 0x20, 0x33, // A5 A5. 3
|
|
/* 0890 */ 0x39, 0x20, 0x46, 0x30, 0x20, 0x35, 0x41, 0x20, // 9 F0 5A
|
|
/* 0898 */ 0x35, 0x41, 0x0A, 0x20, 0x31, 0x35, 0x20, 0x42, // 5A. 15 B
|
|
/* 08A0 */ 0x30, 0x20, 0x30, 0x32, 0x0A, 0x20, 0x33, 0x39, // 0 02. 39
|
|
/* 08A8 */ 0x20, 0x44, 0x35, 0x20, 0x30, 0x32, 0x20, 0x30, // D5 02 0
|
|
/* 08B0 */ 0x30, 0x20, 0x31, 0x34, 0x20, 0x31, 0x34, 0x0A, // 0 14 14.
|
|
/* 08B8 */ 0x20, 0x33, 0x39, 0x20, 0x46, 0x30, 0x20, 0x41, // 39 F0 A
|
|
/* 08C0 */ 0x35, 0x20, 0x41, 0x35, 0x0A, 0x20, 0x46, 0x46, // 5 A5. FF
|
|
/* 08C8 */ 0x20, 0x36, 0x45, 0x0A, 0x20, 0x46, 0x45, 0x20, // 6E. FE
|
|
/* 08D0 */ 0x30, 0x30, 0x20, 0x30, 0x30, 0x20, 0x30, 0x30, // 00 00 00
|
|
/* 08D8 */ 0x0A, 0x20, 0x30, 0x35, 0x20, 0x32, 0x39, 0x20, // . 05 29
|
|
/* 08E0 */ 0x30, 0x30, 0x0A, 0x3C, 0x2F, 0x44, 0x53, 0x49, // 00.</DSI
|
|
/* 08E8 */ 0x49, 0x6E, 0x69, 0x74, 0x53, 0x65, 0x71, 0x75, // InitSequ
|
|
/* 08F0 */ 0x65, 0x6E, 0x63, 0x65, 0x3E, 0x0A, 0x3C, 0x44, // ence>.<D
|
|
/* 08F8 */ 0x53, 0x49, 0x54, 0x65, 0x72, 0x6D, 0x53, 0x65, // SITermSe
|
|
/* 0900 */ 0x71, 0x75, 0x65, 0x6E, 0x63, 0x65, 0x3E, 0x0A, // quence>.
|
|
/* 0908 */ 0x20, 0x30, 0x35, 0x20, 0x32, 0x38, 0x20, 0x30, // 05 28 0
|
|
/* 0910 */ 0x30, 0x0A, 0x20, 0x30, 0x35, 0x20, 0x31, 0x30, // 0. 05 10
|
|
/* 0918 */ 0x20, 0x30, 0x30, 0x0A, 0x20, 0x46, 0x46, 0x20, // 00. FF
|
|
/* 0920 */ 0x37, 0x38, 0x0A, 0x3C, 0x2F, 0x44, 0x53, 0x49, // 78.</DSI
|
|
/* 0928 */ 0x54, 0x65, 0x72, 0x6D, 0x53, 0x65, 0x71, 0x75, // TermSequ
|
|
/* 0930 */ 0x65, 0x6E, 0x63, 0x65, 0x3E, 0x0A, 0x3C, 0x47, // ence>.<G
|
|
/* 0938 */ 0x72, 0x6F, 0x75, 0x70, 0x20, 0x69, 0x64, 0x3D, // roup id=
|
|
/* 0940 */ 0x27, 0x42, 0x61, 0x63, 0x6B, 0x6C, 0x69, 0x67, // 'Backlig
|
|
/* 0948 */ 0x68, 0x74, 0x20, 0x43, 0x6F, 0x6E, 0x66, 0x69, // ht Confi
|
|
/* 0950 */ 0x67, 0x75, 0x72, 0x61, 0x74, 0x69, 0x6F, 0x6E, // guration
|
|
/* 0958 */ 0x27, 0x3E, 0x20, 0x3C, 0x42, 0x61, 0x63, 0x6B, // '> <Back
|
|
/* 0960 */ 0x6C, 0x69, 0x67, 0x68, 0x74, 0x54, 0x79, 0x70, // lightTyp
|
|
/* 0968 */ 0x65, 0x3E, 0x33, 0x3C, 0x2F, 0x42, 0x61, 0x63, // e>3</Bac
|
|
/* 0970 */ 0x6B, 0x6C, 0x69, 0x67, 0x68, 0x74, 0x54, 0x79, // klightTy
|
|
/* 0978 */ 0x70, 0x65, 0x3E, 0x0A, 0x20, 0x3C, 0x44, 0x69, // pe>. <Di
|
|
/* 0980 */ 0x73, 0x70, 0x6C, 0x61, 0x79, 0x52, 0x65, 0x73, // splayRes
|
|
/* 0988 */ 0x65, 0x74, 0x49, 0x6E, 0x66, 0x6F, 0x3E, 0x30, // etInfo>0
|
|
/* 0990 */ 0x20, 0x31, 0x30, 0x30, 0x30, 0x30, 0x20, 0x31, // 10000 1
|
|
/* 0998 */ 0x30, 0x30, 0x30, 0x30, 0x20, 0x31, 0x30, 0x30, // 0000 100
|
|
/* 09A0 */ 0x30, 0x30, 0x20, 0x30, 0x3C, 0x2F, 0x44, 0x69, // 00 0</Di
|
|
/* 09A8 */ 0x73, 0x70, 0x6C, 0x61, 0x79, 0x52, 0x65, 0x73, // splayRes
|
|
/* 09B0 */ 0x65, 0x74, 0x49, 0x6E, 0x66, 0x6F, 0x3E, 0x0A, // etInfo>.
|
|
/* 09B8 */ 0x3C, 0x2F, 0x47, 0x72, 0x6F, 0x75, 0x70, 0x3E, // </Group>
|
|
/* 09C0 */ 0x0A, 0x00 // ..
|
|
})
|
|
Local2 = PCFG /* \_SB_.GPU0._ROM.PCFG */
|
|
If ((Arg0 >= SizeOf (Local2)))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
Else
|
|
{
|
|
Local0 = Arg0
|
|
}
|
|
|
|
If ((Arg1 > 0x1000))
|
|
{
|
|
Local1 = 0x1000
|
|
}
|
|
Else
|
|
{
|
|
Local1 = Arg1
|
|
}
|
|
|
|
If (((Local0 + Local1) > SizeOf (Local2)))
|
|
{
|
|
Local1 = (SizeOf (Local2) - Local0)
|
|
}
|
|
|
|
CreateField (Local2, (0x08 * Local0), (0x08 * Local1), RBUF)
|
|
Return (RBUF) /* \_SB_.GPU0._ROM.RBUF */
|
|
}
|
|
|
|
Method (PIGC, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.PIGC.RBUF */
|
|
}
|
|
|
|
Method (PPCC, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.PPCC.RBUF */
|
|
}
|
|
|
|
Method (PGCT, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.PGCT.RBUF */
|
|
}
|
|
|
|
Method (PLGC, 3, NotSerialized)
|
|
{
|
|
Name (TBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
If ((Arg1 >= SizeOf (TBUF)))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
Else
|
|
{
|
|
Local1 = Arg1
|
|
}
|
|
|
|
If ((Arg2 > 0x1000))
|
|
{
|
|
Local2 = 0x1000
|
|
}
|
|
Else
|
|
{
|
|
Local2 = Arg2
|
|
}
|
|
|
|
If (((Local1 + Local2) > SizeOf (TBUF)))
|
|
{
|
|
Local2 = (SizeOf (TBUF) - Local1)
|
|
}
|
|
|
|
CreateField (TBUF, (0x08 * Local1), (0x08 * Local2), RBUF)
|
|
Return (RBUF) /* \_SB_.GPU0.PLGC.RBUF */
|
|
}
|
|
|
|
Method (HSIC, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.HSIC.RBUF */
|
|
}
|
|
|
|
Method (PGMT, 2, NotSerialized)
|
|
{
|
|
Name (TBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
If ((Arg0 >= SizeOf (TBUF)))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
Else
|
|
{
|
|
Local0 = Arg0
|
|
}
|
|
|
|
If ((Arg1 > 0x1000))
|
|
{
|
|
Local1 = 0x1000
|
|
}
|
|
Else
|
|
{
|
|
Local1 = Arg1
|
|
}
|
|
|
|
If (((Local0 + Local1) > SizeOf (TBUF)))
|
|
{
|
|
Local1 = (SizeOf (TBUF) - Local0)
|
|
}
|
|
|
|
CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF)
|
|
Return (RBUF) /* \_SB_.GPU0.PGMT.RBUF */
|
|
}
|
|
|
|
Method (PWGM, 2, NotSerialized)
|
|
{
|
|
Name (TBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
If ((Arg0 >= SizeOf (TBUF)))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
Else
|
|
{
|
|
Local0 = Arg0
|
|
}
|
|
|
|
If ((Arg1 > 0x1000))
|
|
{
|
|
Local1 = 0x1000
|
|
}
|
|
Else
|
|
{
|
|
Local1 = Arg1
|
|
}
|
|
|
|
If (((Local0 + Local1) > SizeOf (TBUF)))
|
|
{
|
|
Local1 = (SizeOf (TBUF) - Local0)
|
|
}
|
|
|
|
CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF)
|
|
Return (RBUF) /* \_SB_.GPU0.PWGM.RBUF */
|
|
}
|
|
|
|
Method (PGRT, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.PGRT.RBUF */
|
|
}
|
|
|
|
Method (PBRT, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.PBRT.RBUF */
|
|
}
|
|
|
|
Method (PBRC, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (0x02)
|
|
{
|
|
0x00, 0x00 // ..
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.PBRC.RBUF */
|
|
}
|
|
|
|
Method (DITH, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.DITH.RBUF */
|
|
}
|
|
|
|
Method (BLCP, 1, Serialized)
|
|
{
|
|
Name(RBUF, Buffer(0x100){})
|
|
Store(0x0, LOCAL0)
|
|
|
|
CreateField(RBUF, Multiply(LOCAL0, 8), 32, PKHR)
|
|
Add(LOCAL0, 4, LOCAL0)
|
|
|
|
CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKCM)
|
|
Add(LOCAL0, 1, LOCAL0)
|
|
|
|
CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKDS)
|
|
Add(LOCAL0, 1, LOCAL0)
|
|
|
|
CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKUB)
|
|
Add(LOCAL0, 1, LOCAL0)
|
|
|
|
CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKLB)
|
|
Add(LOCAL0, 1, LOCAL0)
|
|
|
|
// Add additonal ON command
|
|
Name (BON, // Backlight on
|
|
Buffer() {0x39, // Command 39
|
|
0x53, 0x24}) // Manual backlight control
|
|
// Create the packet header field
|
|
CreateField(RBUF, Multiply(LOCAL0, 8), 32, PKH2) // Create the packet header
|
|
Add(LOCAL0, 4, LOCAL0) // Increment the data pointer
|
|
// Create the packet payload field
|
|
CreateField(RBUF, Multiply(LOCAL0, 8), 32, PKP2) // Create the packet payload
|
|
Store(Sizeof(BON), PKH2) // Store the size of the buffer in the header
|
|
Store(BON, PKP2) // Store the packet payload
|
|
Add(LOCAL0, Sizeof(BON), LOCAL0) // Increment the offset by the packet size
|
|
|
|
CreateDWordField(RBUF, Multiply(LOCAL0, 8), EOF)
|
|
|
|
/*LOCAL1 = Arg0 * 10 // to map to 1024
|
|
LOCAL2 = LOCAL1 >> 8
|
|
LOCAL1 &= 0xFF*/
|
|
|
|
LOCAL1 = Arg0 * 1023
|
|
LOCAL1 /= 0xFF
|
|
|
|
LOCAL2 = Arg0 * 1023
|
|
LOCAL2 /= 0xFF00
|
|
LOCAL2 &= 3
|
|
|
|
PKHR = 4
|
|
PKCM = 0x39
|
|
PKDS = 0x51
|
|
//PKUB = 0x00
|
|
//PKLB = 0x10
|
|
PKUB = LOCAL2
|
|
PKLB = LOCAL1
|
|
|
|
EOF = 0x0
|
|
|
|
Return(RBUF)
|
|
}
|
|
|
|
Method (ROM2, 3, NotSerialized)
|
|
{
|
|
Name (PCFG, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
While (One)
|
|
{
|
|
If (One)
|
|
{
|
|
Local2 = PCFG /* \_SB_.GPU0.ROM2.PCFG */
|
|
}
|
|
|
|
Break
|
|
}
|
|
|
|
If ((Arg0 >= SizeOf (Local2)))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
Else
|
|
{
|
|
Local0 = Arg0
|
|
}
|
|
|
|
If ((Arg1 > 0x1000))
|
|
{
|
|
Local1 = 0x1000
|
|
}
|
|
Else
|
|
{
|
|
Local1 = Arg1
|
|
}
|
|
|
|
If (((Local0 + Local1) > SizeOf (Local2)))
|
|
{
|
|
Local1 = (SizeOf (Local2) - Local0)
|
|
}
|
|
|
|
CreateField (Local2, (0x08 * Local0), (0x08 * Local1), RBUF)
|
|
Return (RBUF) /* \_SB_.GPU0.ROM2.RBUF */
|
|
}
|
|
|
|
Method (IGC2, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.IGC2.RBUF */
|
|
}
|
|
|
|
Method (PCC2, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.PCC2.RBUF */
|
|
}
|
|
|
|
Method (GCT2, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.GCT2.RBUF */
|
|
}
|
|
|
|
Method (LGC2, 3, NotSerialized)
|
|
{
|
|
Name (TBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
If ((Arg1 >= SizeOf (TBUF)))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
Else
|
|
{
|
|
Local1 = Arg1
|
|
}
|
|
|
|
If ((Arg2 > 0x1000))
|
|
{
|
|
Local2 = 0x1000
|
|
}
|
|
Else
|
|
{
|
|
Local2 = Arg2
|
|
}
|
|
|
|
If (((Local1 + Local2) > SizeOf (TBUF)))
|
|
{
|
|
Local2 = (SizeOf (TBUF) - Local1)
|
|
}
|
|
|
|
CreateField (TBUF, (0x08 * Local1), (0x08 * Local2), RBUF)
|
|
Return (RBUF) /* \_SB_.GPU0.LGC2.RBUF */
|
|
}
|
|
|
|
Method (HSI2, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.HSI2.RBUF */
|
|
}
|
|
|
|
Method (GMT2, 2, NotSerialized)
|
|
{
|
|
Name (TBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
If ((Arg0 >= SizeOf (TBUF)))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
Else
|
|
{
|
|
Local0 = Arg0
|
|
}
|
|
|
|
If ((Arg1 > 0x1000))
|
|
{
|
|
Local1 = 0x1000
|
|
}
|
|
Else
|
|
{
|
|
Local1 = Arg1
|
|
}
|
|
|
|
If (((Local0 + Local1) > SizeOf (TBUF)))
|
|
{
|
|
Local1 = (SizeOf (TBUF) - Local0)
|
|
}
|
|
|
|
CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF)
|
|
Return (RBUF) /* \_SB_.GPU0.GMT2.RBUF */
|
|
}
|
|
|
|
Method (WGM2, 2, NotSerialized)
|
|
{
|
|
Name (TBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
If ((Arg0 >= SizeOf (TBUF)))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
Else
|
|
{
|
|
Local0 = Arg0
|
|
}
|
|
|
|
If ((Arg1 > 0x1000))
|
|
{
|
|
Local1 = 0x1000
|
|
}
|
|
Else
|
|
{
|
|
Local1 = Arg1
|
|
}
|
|
|
|
If (((Local0 + Local1) > SizeOf (TBUF)))
|
|
{
|
|
Local1 = (SizeOf (TBUF) - Local0)
|
|
}
|
|
|
|
CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF)
|
|
Return (RBUF) /* \_SB_.GPU0.WGM2.RBUF */
|
|
}
|
|
|
|
Method (GRT2, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.GRT2.RBUF */
|
|
}
|
|
|
|
Method (BRT2, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.BRT2.RBUF */
|
|
}
|
|
|
|
Method (DIT2, 2, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.DIT2.RBUF */
|
|
}
|
|
|
|
Method (BLC2, 1, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (0x0100){})
|
|
Return (RBUF) /* \_SB_.GPU0.BLC2.RBUF */
|
|
}
|
|
|
|
Method (ROE1, 3, NotSerialized)
|
|
{
|
|
Name (PCFG, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Local2 = PCFG /* \_SB_.GPU0.ROE1.PCFG */
|
|
If ((Arg0 >= SizeOf (Local2)))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
Else
|
|
{
|
|
Local0 = Arg0
|
|
}
|
|
|
|
If ((Arg1 > 0x1000))
|
|
{
|
|
Local1 = 0x1000
|
|
}
|
|
Else
|
|
{
|
|
Local1 = Arg1
|
|
}
|
|
|
|
If (((Local0 + Local1) > SizeOf (Local2)))
|
|
{
|
|
Local1 = (SizeOf (Local2) - Local0)
|
|
}
|
|
|
|
CreateField (Local2, (0x08 * Local0), (0x08 * Local1), RBUF)
|
|
Return (RBUF) /* \_SB_.GPU0.ROE1.RBUF */
|
|
}
|
|
|
|
Name (_DOD, Package (0x01) // _DOD: Display Output Devices
|
|
{
|
|
0x00024321
|
|
})
|
|
|
|
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Method (CHDV, 0, NotSerialized)
|
|
{
|
|
Name (CHIF, Package (0x02)
|
|
{
|
|
One,
|
|
Package (0x07)
|
|
{
|
|
"CHILDDEV",
|
|
Zero,
|
|
0x00024321,
|
|
"QCOM_AVStream_850",
|
|
Zero,
|
|
"Qualcomm Camera AVStream Mini Driver",
|
|
Package (0x04)
|
|
{
|
|
"COMPATIBLEIDS",
|
|
0x02,
|
|
"VEN_QCOM&DEV__AVSTREAM",
|
|
"QCOM_AVSTREAM"
|
|
}
|
|
}
|
|
})
|
|
Return (CHIF) /* \_SB_.GPU0.CHDV.CHIF */
|
|
}
|
|
|
|
Method (DPCC, 2, NotSerialized)
|
|
{
|
|
Return (\_SB.CCST)
|
|
}
|
|
|
|
Method (DPIN, 2, NotSerialized)
|
|
{
|
|
Return (\_SB.PINA)
|
|
}
|
|
|
|
Method (REGR, 0, NotSerialized)
|
|
{
|
|
Name (RBUF, Package (0x1B)
|
|
{
|
|
Package (0x02)
|
|
{
|
|
"ForceMaxPerf",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ForceStablePowerSettings",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ForceActive",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DeferForceActive",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PreventPowerCollapse",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DisableThermalMitigation",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DisableTzMDSSRestore",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"UseLowPTForGfxPerProcess",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DisableCDI",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"GPU64bAddrEnabled",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"MaxPreemptionOffsets",
|
|
0x80
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"MaxRequiredDmaQueueEntry",
|
|
0x08
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"SupportsSecureInAperture",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ZeroFlagSupportInPTE",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"SupportsCacheCoherency",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"SupportsSHMBridge",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"SecureCarveoutSize",
|
|
0x00200000
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"UBWCEnable",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"allowDrmAbove1080p",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ZeroPageLowAddr",
|
|
0x85F00000
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"ZeroPageHighAddr",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"KeepUefiBuffer",
|
|
One
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"GRAPHICS",
|
|
Package (0x02)
|
|
{
|
|
"ForceActive",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"EnableSystemCache",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"EnableSysCacheForGpuhtw",
|
|
One
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
"DCVS",
|
|
Package (0x02)
|
|
{
|
|
"Enable",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"IncreaseFilterBw",
|
|
0x00020000
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DecreaseFilterBw",
|
|
0x3333
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TargetBusyPct",
|
|
0x55
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"SampleRate",
|
|
0x3C
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"TargetBusyPctOffscreen",
|
|
0x4B
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"SampleRateOffscreen",
|
|
0x14
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"GpuResetValue",
|
|
0x11490C80
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"BusResetValue",
|
|
0x04B0
|
|
}
|
|
},
|
|
|
|
Package (0x06)
|
|
{
|
|
"A6x",
|
|
Package (0x02)
|
|
{
|
|
"SleepMode",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DisableICG",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DisableGmuCG",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"EnableFallbackToDisableSecureMode",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DisableCPCrashDump",
|
|
Zero
|
|
}
|
|
}
|
|
},
|
|
|
|
Package (0x04)
|
|
{
|
|
"VIDEO",
|
|
Package (0x02)
|
|
{
|
|
"ForceActive",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PreventPowerCollapse",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"EnableSystemCache",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"CRYPTO",
|
|
Package (0x02)
|
|
{
|
|
"EnableCryptoVA",
|
|
One
|
|
}
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
"VIDEO_ENCODER",
|
|
Package (0x02)
|
|
{
|
|
"ForceActive",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"PreventPowerCollapse",
|
|
Zero
|
|
}
|
|
},
|
|
|
|
Package (0x07)
|
|
{
|
|
"DISPLAY",
|
|
Package (0x02)
|
|
{
|
|
"DisableMiracast",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"EnableOEMDriverDependency",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"EnableBridgeDriverDependency",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DisableRotator",
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DisableMDPBLT",
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
"DisableExternal",
|
|
3
|
|
}
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.GPU0.REGR.RBUF */
|
|
}
|
|
}
|
|
|
|
|
|
Device (SCM0)
|
|
{
|
|
Name (_HID, "QCOM0214") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
}
|
|
|
|
Device (TREE)
|
|
{
|
|
Name (_HID, "QCOM02BB") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Method (MCGT, 0, NotSerialized)
|
|
{
|
|
Name (TPKG, Package (One)
|
|
{
|
|
Package (0x02)
|
|
{
|
|
Zero,
|
|
Zero
|
|
}
|
|
})
|
|
DerefOf (TPKG [Zero]) [Zero] = TCMA /* \_SB_.TCMA */
|
|
DerefOf (TPKG [Zero]) [One] = TCML /* \_SB_.TCML */
|
|
Return (TPKG) /* \_SB_.TREE.MCGT.TPKG */
|
|
}
|
|
}
|
|
|
|
Device (SPMI)
|
|
{
|
|
Name (_HID, "QCOM0216") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_CID, "PNP0CA2") // _CID: Compatible ID
|
|
Name (_UID, One) // _UID: Unique ID
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x0C400000, // Address Base
|
|
0x02800000, // Address Length
|
|
)
|
|
})
|
|
Return (RBUF) /* \_SB_.SPMI._CRS.RBUF */
|
|
}
|
|
|
|
Method (CONF, 0, NotSerialized)
|
|
{
|
|
Name (XBUF, Buffer (0x1A)
|
|
{
|
|
/* 0000 */ 0x00, 0x01, 0x01, 0x01, 0xFF, 0x00, 0x02, 0x00, // ........
|
|
/* 0008 */ 0x0A, 0x07, 0x04, 0x07, 0x01, 0xFF, 0x10, 0x01, // ........
|
|
/* 0010 */ 0x00, 0x01, 0x0C, 0x40, 0x00, 0x00, 0x02, 0x80, // ...@....
|
|
/* 0018 */ 0x00, 0x00 // ..
|
|
})
|
|
Return (XBUF) /* \_SB_.SPMI.CONF.XBUF */
|
|
}
|
|
}
|
|
|
|
Device (GIO0)
|
|
{
|
|
Name (_HID, "QCOM0217") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Name (HPD1, ResourceTemplate ()
|
|
{
|
|
GpioIo (Shared, PullNone, 0x0000, 0x0000, IoRestrictionNone,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x0071
|
|
}
|
|
})
|
|
OperationRegion (HPD2, GeneralPurposeIo, Zero, One)
|
|
Field (HPD2, ByteAcc, NoLock, Preserve)
|
|
{
|
|
Connection (\_SB.GIO0.HPD1),
|
|
ESTA, 1
|
|
}
|
|
OperationRegion (GPOR, GeneralPurposeIo, Zero, One)
|
|
Field (\_SB.GIO0.GPOR, ByteAcc, NoLock, Preserve)
|
|
{
|
|
}
|
|
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x03400000, // Address Base
|
|
0x00C00000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x000000F0,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x000000F0,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x000000F0,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x00000288,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x00000238,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x00000226,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x00000232,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x00000284,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x0000021F,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x00000236,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x0000023D,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.GIO0._CRS.RBUF */
|
|
}
|
|
|
|
Method (OFNI, 0, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (0x02)
|
|
{
|
|
0x96, 0x00 // ..
|
|
})
|
|
Return (RBUF) /* \_SB_.GIO0.OFNI.RBUF */
|
|
}
|
|
|
|
Name (GABL, Zero)
|
|
Method (_REG, 2, NotSerialized) // _REG: Region Availability
|
|
{
|
|
If ((Arg0 == 0x08))
|
|
{
|
|
GABL = Arg1
|
|
}
|
|
}
|
|
|
|
Name (_AEI, Buffer (0x02) // _AEI: ACPI Event Interrupts
|
|
{
|
|
0x79, 0x00 // y.
|
|
})
|
|
}
|
|
|
|
OperationRegion (CP00, SystemMemory, 0x13000000, 0x24)
|
|
Field (CP00, DWordAcc, NoLock, Preserve)
|
|
{
|
|
MVIO, 32,
|
|
MV01, 32,
|
|
MV02, 32,
|
|
MV03, 32,
|
|
MV04, 32,
|
|
MV11, 32,
|
|
MV12, 32,
|
|
MV13, 32,
|
|
MV14, 32
|
|
}
|
|
|
|
OperationRegion (CP01, SystemMemory, 0x01C00000, 0x1004)
|
|
Field (CP01, DWordAcc, NoLock, Preserve)
|
|
{
|
|
PSC0, 32,
|
|
Offset (0x20),
|
|
PPC0, 32,
|
|
PPS0, 32,
|
|
Offset (0x1B0),
|
|
PLT0, 32,
|
|
Offset (0x358),
|
|
PSL0, 32,
|
|
Offset (0x360),
|
|
WBL0, 32,
|
|
WBH0, 32,
|
|
WLL0, 32,
|
|
WLH0, 32,
|
|
RBL0, 32,
|
|
RBH0, 32,
|
|
RLL0, 32,
|
|
RLH0, 32,
|
|
PPEB, 32,
|
|
Offset (0x398),
|
|
WBL1, 32,
|
|
WBH1, 32,
|
|
WLL1, 32,
|
|
WLH1, 32,
|
|
RBL1, 32,
|
|
RBH1, 32,
|
|
RLL1, 32,
|
|
RLH1, 32,
|
|
Offset (0x1000),
|
|
PDT0, 32
|
|
}
|
|
|
|
OperationRegion (CP02, SystemMemory, 0x01C06000, 0x0188)
|
|
Field (CP02, DWordAcc, NoLock, Preserve)
|
|
{
|
|
Offset (0x0C),
|
|
QCB1, 32,
|
|
QSEC, 32,
|
|
QAP1, 32,
|
|
QAP2, 32,
|
|
QSP1, 32,
|
|
QSP2, 32,
|
|
QSS1, 32,
|
|
QSS2, 32,
|
|
Offset (0x34),
|
|
QECE, 32,
|
|
QCE1, 32,
|
|
QSCC, 32,
|
|
QSBE, 32,
|
|
Offset (0x48),
|
|
QCPI, 32,
|
|
Offset (0x5C),
|
|
QCED, 32,
|
|
QCP0, 32,
|
|
Offset (0x68),
|
|
QPR0, 32,
|
|
Offset (0x70),
|
|
QPC0, 32,
|
|
Offset (0x80),
|
|
QSES, 32,
|
|
Offset (0x88),
|
|
QCRC, 32,
|
|
Offset (0x90),
|
|
QCLC, 32,
|
|
Offset (0x98),
|
|
QC1M, 32,
|
|
QC2M, 32,
|
|
QC3M, 32,
|
|
Offset (0xB0),
|
|
QSM0, 32,
|
|
Offset (0xB8),
|
|
QS1M, 32,
|
|
QS2M, 32,
|
|
QS3M, 32,
|
|
Offset (0xD8),
|
|
QIG0, 32,
|
|
QIG1, 32,
|
|
Offset (0xF0),
|
|
QCVT, 32,
|
|
QVT1, 32,
|
|
QVT2, 32,
|
|
Offset (0x11C),
|
|
QTT1, 32,
|
|
QTT2, 32,
|
|
Offset (0x138),
|
|
QCCS, 32,
|
|
QCHS, 32,
|
|
Offset (0x148),
|
|
QCD0, 32,
|
|
Offset (0x154),
|
|
QCCN, 32,
|
|
Offset (0x15C),
|
|
QCCC, 32,
|
|
Offset (0x164),
|
|
QMCS, 32,
|
|
Offset (0x184),
|
|
QCCM, 32
|
|
}
|
|
|
|
OperationRegion (CP03, SystemMemory, 0x01C06200, 0xA8)
|
|
Field (CP03, DWordAcc, NoLock, Preserve)
|
|
{
|
|
Offset (0x44),
|
|
QTOT, 32,
|
|
Offset (0x60),
|
|
QTDE, 32,
|
|
Offset (0x8C),
|
|
QTM1, 32,
|
|
Offset (0xA4),
|
|
QTL2, 32
|
|
}
|
|
|
|
OperationRegion (CP04, SystemMemory, 0x01C06400, 0x016C)
|
|
Field (CP04, DWordAcc, NoLock, Preserve)
|
|
{
|
|
Offset (0x0C),
|
|
QRSH, 32,
|
|
Offset (0x14),
|
|
QRSG, 32,
|
|
Offset (0x34),
|
|
QRUS, 32,
|
|
Offset (0x3C),
|
|
QRFL, 32,
|
|
Offset (0x44),
|
|
QRPC, 32,
|
|
Offset (0xD4),
|
|
QRC2, 32,
|
|
QRC3, 32,
|
|
QRC4, 32,
|
|
Offset (0xF8),
|
|
QRA1, 32,
|
|
QRA2, 32,
|
|
QRSE, 32,
|
|
QRSC, 32,
|
|
Offset (0x10C),
|
|
QRDC, 32,
|
|
Offset (0x11C),
|
|
QRIM, 32,
|
|
Offset (0x164),
|
|
QRM0, 32,
|
|
QRM1, 32
|
|
}
|
|
|
|
OperationRegion (CP05, SystemMemory, 0x01C06600, 0x70)
|
|
Field (CP05, DWordAcc, NoLock, Preserve)
|
|
{
|
|
Offset (0x2C),
|
|
PMDC, 32,
|
|
Offset (0x44),
|
|
PAC1, 32,
|
|
Offset (0x54),
|
|
PMC2, 32,
|
|
PMC3, 32,
|
|
PMC4, 32,
|
|
PMC5, 32
|
|
}
|
|
|
|
OperationRegion (CP06, SystemMemory, 0x01C06800, 0x0210)
|
|
Field (CP06, DWordAcc, NoLock, Preserve)
|
|
{
|
|
PPSR, 32,
|
|
PPDC, 32,
|
|
PCST, 32,
|
|
Offset (0x54),
|
|
PERD, 32,
|
|
Offset (0x6C),
|
|
PSC4, 32,
|
|
Offset (0xA0),
|
|
PDTA, 32,
|
|
PLTA, 32,
|
|
PLCD, 32,
|
|
Offset (0xC4),
|
|
PFC1, 32,
|
|
PFC2, 32,
|
|
PFVL, 32,
|
|
PFVH, 32,
|
|
PFMC, 32,
|
|
Offset (0x174),
|
|
PPPS, 32,
|
|
Offset (0x1A8),
|
|
PSDM, 32,
|
|
PODA, 32,
|
|
PPSC, 32,
|
|
Offset (0x1D8),
|
|
PRSL, 32,
|
|
PDAL, 32,
|
|
PDAM, 32,
|
|
Offset (0x20C),
|
|
PRC1, 32
|
|
}
|
|
|
|
OperationRegion (CP07, SystemMemory, 0x60000000, 0x1000)
|
|
Field (CP07, DWordAcc, NoLock, Preserve)
|
|
{
|
|
Offset (0x04),
|
|
SCR0, 32,
|
|
CRI0, 32,
|
|
Offset (0x10),
|
|
R0B0, 32,
|
|
R0B1, 32,
|
|
BNR0, 32,
|
|
Offset (0x7C),
|
|
LCA0, 32,
|
|
LCS0, 32,
|
|
Offset (0x88),
|
|
SLC0, 32,
|
|
Offset (0xA0),
|
|
LC20, 32,
|
|
Offset (0x8BC),
|
|
CSW0, 32,
|
|
Offset (0x900),
|
|
IAV0, 32,
|
|
CR10, 32,
|
|
CR20, 32,
|
|
ILB0, 32,
|
|
IUB0, 32,
|
|
ILR0, 32,
|
|
ILT0, 32,
|
|
IUT0, 32,
|
|
Offset (0xF24),
|
|
ESC0, 32,
|
|
EST0, 32,
|
|
Offset (0xFC4),
|
|
ECS0, 32
|
|
}
|
|
|
|
Method (PPU0, 0, Serialized)
|
|
{
|
|
Name (TOUT, Zero)
|
|
PDT0 = 0x04
|
|
PPDC = One
|
|
QECE = 0x14
|
|
QCPI = 0x07
|
|
QCLC = One
|
|
QCRC = 0x20
|
|
QCVT = Zero
|
|
QVT2 = One
|
|
QVT1 = 0xC9
|
|
QTT1 = 0xFF
|
|
QTT2 = 0x3F
|
|
QMCS = One
|
|
QCCN = Zero
|
|
QCD0 = 0x0A
|
|
QCED = 0x19
|
|
QCE1 = 0x90
|
|
QSM0 = 0x82
|
|
QS3M = 0x02
|
|
QS2M = 0xEA
|
|
QS1M = 0xAB
|
|
QC3M = Zero
|
|
QC2M = 0x0D
|
|
QC1M = 0x04
|
|
QCHS = Zero
|
|
QCP0 = 0x06
|
|
QPR0 = 0x16
|
|
QPC0 = 0x36
|
|
QCCM = One
|
|
QCCC = 0x16
|
|
QCCS = 0x33
|
|
QSCC = 0x02
|
|
QSBE = 0x07
|
|
QSES = 0x04
|
|
QIG1 = Zero
|
|
QIG0 = 0x3F
|
|
QCB1 = 0x09
|
|
QSEC = One
|
|
QSP1 = 0x40
|
|
QSP2 = One
|
|
QAP1 = 0x02
|
|
QAP2 = Zero
|
|
QSS1 = 0x7E
|
|
QSS2 = 0x15
|
|
QTOT = 0x02
|
|
QTL2 = 0x12
|
|
QTDE = 0x10
|
|
QTM1 = 0x06
|
|
QRSC = 0x03
|
|
QRSE = 0x1C
|
|
QRDC = 0x14
|
|
QRC2 = 0x0E
|
|
QRC3 = 0x04
|
|
QRC4 = 0x1A
|
|
QRUS = 0x4B
|
|
QRSG = 0x04
|
|
QRSH = 0x04
|
|
QRA1 = 0x71
|
|
QRM0 = 0x59
|
|
QRM1 = 0x59
|
|
QRA2 = 0x80
|
|
QRIM = 0x40
|
|
QRPC = 0x71
|
|
QRFL = 0x40
|
|
PERD = 0x04
|
|
PMDC = 0x52
|
|
PMC2 = 0x50
|
|
PMC4 = 0x1A
|
|
PMC5 = 0x06
|
|
PFC2 = 0x83
|
|
PFVL = 0x09
|
|
PFVH = 0xA2
|
|
PFMC = 0x40
|
|
PFC1 = 0x02
|
|
PODA = Zero
|
|
PDTA = One
|
|
PDAM = Zero
|
|
PDAL = 0x20
|
|
PSDM = Zero
|
|
PLTA = One
|
|
PLCD = 0x73
|
|
PRSL = 0xAA
|
|
PPSC = 0x03
|
|
PRC1 = 0x0D
|
|
PSC4 = Zero
|
|
PAC1 = Zero
|
|
If ((\_SB.SIDV >= 0x00020000)){}
|
|
PPDC = 0x03
|
|
PPSR = Zero
|
|
PCST = 0x03
|
|
Local0 = PPPS /* \_SB_.PPPS */
|
|
While ((Local0 & 0x40))
|
|
{
|
|
Sleep (One)
|
|
TOUT++
|
|
If ((TOUT == 0x0F))
|
|
{
|
|
Break
|
|
}
|
|
|
|
Local0 = PPPS /* \_SB_.PPPS */
|
|
}
|
|
|
|
If ((TOUT == 0x0F))
|
|
{
|
|
Return (One)
|
|
}
|
|
Else
|
|
{
|
|
Return (Zero)
|
|
}
|
|
}
|
|
|
|
Method (LTS0, 0, Serialized)
|
|
{
|
|
Name (TOUT, Zero)
|
|
Local0 = LC20 /* \_SB_.LC20 */
|
|
Local0 |= 0x40
|
|
LC20 = Local0
|
|
PLT0 = 0x0100
|
|
Local0 = EST0 /* \_SB_.EST0 */
|
|
While (((Local0 & 0x0400) != 0x0400))
|
|
{
|
|
Sleep (One)
|
|
TOUT++
|
|
If ((TOUT == 0x96))
|
|
{
|
|
Break
|
|
}
|
|
|
|
Local0 = EST0 /* \_SB_.EST0 */
|
|
}
|
|
|
|
If ((TOUT == 0x96))
|
|
{
|
|
Return (One)
|
|
}
|
|
Else
|
|
{
|
|
Return (Zero)
|
|
}
|
|
}
|
|
|
|
Method (IAT0, 0, Serialized)
|
|
{
|
|
IAV0 = One
|
|
ILB0 = 0x60100000
|
|
IUB0 = Zero
|
|
ILR0 = 0x601FFFFF
|
|
ILT0 = 0x01000000
|
|
IUT0 = Zero
|
|
CR10 = 0x04
|
|
CR20 = 0x80000000
|
|
BNR0 = 0x00010100
|
|
}
|
|
|
|
Method (REB0, 2, Serialized)
|
|
{
|
|
Local0 = PSC0 /* \_SB_.PSC0 */
|
|
Local0 &= 0xFBFFFFFF
|
|
PSC0 = Local0
|
|
WBL0 = Arg0
|
|
WBH0 = Zero
|
|
WLL0 = Arg1
|
|
WLH0 = Zero
|
|
RBL0 = Arg0
|
|
RBH0 = Zero
|
|
RLL0 = Arg1
|
|
RLH0 = Zero
|
|
Local0 = PSC0 /* \_SB_.PSC0 */
|
|
Local0 |= 0x04000000
|
|
PSC0 = Local0
|
|
}
|
|
|
|
Method (EEB0, 2, Serialized)
|
|
{
|
|
Local0 = PSC0 /* \_SB_.PSC0 */
|
|
Local0 &= 0xBFFFFFFF
|
|
PSC0 = Local0
|
|
WBL1 = Arg0
|
|
WBH1 = Zero
|
|
WLL1 = Arg1
|
|
WLH1 = Zero
|
|
RBL1 = Arg0
|
|
RBH1 = Zero
|
|
RLL1 = Arg1
|
|
RLH1 = Zero
|
|
Local0 = PSC0 /* \_SB_.PSC0 */
|
|
Local0 |= 0x40000000
|
|
PSC0 = Local0
|
|
}
|
|
|
|
Name (E0LT, 0x600FFFFF)
|
|
Method (MSC0, 0, Serialized)
|
|
{
|
|
Local0 = SCR0 /* \_SB_.SCR0 */
|
|
Local0 |= 0x02
|
|
SCR0 = Local0
|
|
PSL0 = 0x01000000
|
|
Local0 = PPC0 /* \_SB_.PPC0 */
|
|
Local0 &= 0xFFFFFFDF
|
|
PPC0 = Local0
|
|
CSW0 = One
|
|
Local0 = LCA0 /* \_SB_.LCA0 */
|
|
Local0 |= 0x00400000
|
|
Local0 &= 0xFFFFFBFF
|
|
Local0 |= 0x0800
|
|
LCA0 = Local0
|
|
Local0 = CRI0 /* \_SB_.CRI0 */
|
|
Local0 &= 0xFFFF
|
|
Local0 |= 0x06040000
|
|
CRI0 = Local0
|
|
ECS0 = One
|
|
R0B0 = Zero
|
|
R0B1 = Zero
|
|
ECS0 = Zero
|
|
CSW0 = Zero
|
|
PPEB = 0x60000000
|
|
REB0 (0x60001000, \_SB.E0LT)
|
|
EEB0 (0x60101000, 0x601FFFFF)
|
|
}
|
|
|
|
Name (G0D3, Zero)
|
|
|
|
|
|
|
|
|
|
OperationRegion (CP08, SystemMemory, 0x01C08000, 0x1004)
|
|
Field (CP08, DWordAcc, NoLock, Preserve)
|
|
{
|
|
PSC1, 32,
|
|
Offset (0x20),
|
|
PPC1, 32,
|
|
PPS1, 32,
|
|
Offset (0x1B0),
|
|
PLT1, 32,
|
|
Offset (0x358),
|
|
PSL1, 32,
|
|
Offset (0x360),
|
|
LBW0, 32,
|
|
HBW0, 32,
|
|
LLW0, 32,
|
|
HLW0, 32,
|
|
LBR0, 32,
|
|
HBR0, 32,
|
|
LLR0, 32,
|
|
HLR0, 32,
|
|
PEB1, 32,
|
|
Offset (0x398),
|
|
LBW1, 32,
|
|
HBW1, 32,
|
|
LLW1, 32,
|
|
HLW1, 32,
|
|
LBR1, 32,
|
|
HBR1, 32,
|
|
LLR1, 32,
|
|
HLR1, 32,
|
|
Offset (0x1000),
|
|
PDT1, 32
|
|
}
|
|
|
|
OperationRegion (CP09, SystemMemory, 0x01C0A000, 0x026C)
|
|
Field (CP09, DWordAcc, NoLock, Preserve)
|
|
{
|
|
Offset (0x14),
|
|
HSEC, 32,
|
|
HAP1, 32,
|
|
HAP2, 32,
|
|
HSP1, 32,
|
|
HSP2, 32,
|
|
HSS1, 32,
|
|
HSS2, 32,
|
|
Offset (0x34),
|
|
HSM1, 32,
|
|
HSM2, 32,
|
|
Offset (0x54),
|
|
HECE, 32,
|
|
HCE1, 32,
|
|
HSCC, 32,
|
|
HSBE, 32,
|
|
HPLE, 32,
|
|
HCPI, 32,
|
|
C1M0, 32,
|
|
C2M0, 32,
|
|
C3M0, 32,
|
|
C1M1, 32,
|
|
C2M1, 32,
|
|
C3M1, 32,
|
|
Offset (0xB4),
|
|
HCM0, 32,
|
|
HCM1, 32,
|
|
Offset (0xC0),
|
|
HPR0, 32,
|
|
HPR1, 32,
|
|
HPR2, 32,
|
|
HPC0, 32,
|
|
HPC1, 32,
|
|
HPC2, 32,
|
|
Offset (0xDC),
|
|
HSES, 32,
|
|
Offset (0xF0),
|
|
HRC2, 32,
|
|
Offset (0xF8),
|
|
HCLC, 32,
|
|
Offset (0x100),
|
|
HRM0, 32,
|
|
Offset (0x108),
|
|
HRM1, 32,
|
|
Offset (0x11C),
|
|
S1M0, 32,
|
|
S2M0, 32,
|
|
S3M0, 32,
|
|
S1M1, 32,
|
|
S2M1, 32,
|
|
S3M1, 32,
|
|
Offset (0x150),
|
|
G0M0, 32,
|
|
Offset (0x158),
|
|
G0M1, 32,
|
|
Offset (0x178),
|
|
HCVT, 32,
|
|
Offset (0x1CC),
|
|
HCCS, 32,
|
|
HCHS, 32,
|
|
Offset (0x1E0),
|
|
HCDV, 32,
|
|
Offset (0x1E8),
|
|
HCCE, 32,
|
|
Offset (0x1F0),
|
|
HCCC, 32,
|
|
Offset (0x1FC),
|
|
HMCS, 32,
|
|
Offset (0x21C),
|
|
HDM1, 32,
|
|
Offset (0x224),
|
|
HCCM, 32,
|
|
HVD1, 32,
|
|
HVD2, 32
|
|
}
|
|
|
|
OperationRegion (CP10, SystemMemory, 0x01C0A800, 0x02F0)
|
|
Field (CP10, DWordAcc, NoLock, Preserve)
|
|
{
|
|
Offset (0x0C),
|
|
L0C0, 32,
|
|
L0C1, 32,
|
|
L0C2, 32,
|
|
L0TE, 32,
|
|
Offset (0x60),
|
|
L0BM, 32,
|
|
L0LM, 32,
|
|
Offset (0x7C),
|
|
L0PR, 32,
|
|
Offset (0xC0),
|
|
L0L0, 32,
|
|
L0L1, 32,
|
|
L0L2, 32,
|
|
Offset (0xD0),
|
|
L0R1, 32,
|
|
L0R2, 32,
|
|
L0M0, 32,
|
|
L0M1, 32,
|
|
L0M2, 32,
|
|
Offset (0xFC),
|
|
L0CD, 32,
|
|
L0VD, 32,
|
|
Offset (0x108),
|
|
L0X0, 32,
|
|
Offset (0x114),
|
|
L0TT, 32,
|
|
L0OT, 32,
|
|
L0RT, 32,
|
|
L0ET, 32,
|
|
L0VG, 32,
|
|
L0DG, 32,
|
|
Offset (0x130),
|
|
L0EG, 32,
|
|
L0OG, 32,
|
|
L0PG, 32,
|
|
L0IN, 32,
|
|
Offset (0x154),
|
|
L0EI, 32,
|
|
Offset (0x160),
|
|
L0DI, 32,
|
|
Offset (0x168),
|
|
L0B0, 32,
|
|
L0B1, 32,
|
|
Offset (0x178),
|
|
L0T1, 32,
|
|
Offset (0x180),
|
|
L0RC, 32,
|
|
L0F0, 32,
|
|
L0F1, 32,
|
|
L0F2, 32,
|
|
L0S0, 32,
|
|
L0S1, 32,
|
|
L0S2, 32,
|
|
L0SC, 32,
|
|
Offset (0x1A4),
|
|
L0RB, 32,
|
|
Offset (0x1C0),
|
|
L0P0, 32,
|
|
L0P1, 32,
|
|
L0P2, 32,
|
|
Offset (0x230),
|
|
L0SE, 32,
|
|
L0SN, 32,
|
|
L0SD, 32,
|
|
Offset (0x2A4),
|
|
L0DC, 32,
|
|
L0ST, 32,
|
|
L0RE, 32,
|
|
L0PC, 32,
|
|
Offset (0x2B8),
|
|
L0N0, 32,
|
|
Offset (0x2C0),
|
|
L0ER, 32,
|
|
L0HI, 32,
|
|
Offset (0x2CC),
|
|
L0RR, 32
|
|
}
|
|
|
|
OperationRegion (CP11, SystemMemory, 0x01C0B000, 0x02F0)
|
|
Field (CP11, DWordAcc, NoLock, Preserve)
|
|
{
|
|
Offset (0x0C),
|
|
L1C0, 32,
|
|
L1C1, 32,
|
|
L1C2, 32,
|
|
L1TE, 32,
|
|
Offset (0x60),
|
|
L1BM, 32,
|
|
L1LM, 32,
|
|
Offset (0x7C),
|
|
L1PR, 32,
|
|
Offset (0xC0),
|
|
L1L0, 32,
|
|
L1L1, 32,
|
|
L1L2, 32,
|
|
Offset (0xD0),
|
|
L1R1, 32,
|
|
L1R2, 32,
|
|
L1M0, 32,
|
|
L1M1, 32,
|
|
L1M2, 32,
|
|
Offset (0xFC),
|
|
L1CD, 32,
|
|
L1VD, 32,
|
|
Offset (0x108),
|
|
L1X0, 32,
|
|
Offset (0x114),
|
|
L1TT, 32,
|
|
L1OT, 32,
|
|
L1RT, 32,
|
|
L1ET, 32,
|
|
L1VG, 32,
|
|
L1DG, 32,
|
|
Offset (0x130),
|
|
L1EG, 32,
|
|
L1OG, 32,
|
|
L1PG, 32,
|
|
L1IN, 32,
|
|
Offset (0x154),
|
|
L1EI, 32,
|
|
Offset (0x160),
|
|
L1DI, 32,
|
|
Offset (0x168),
|
|
L1B0, 32,
|
|
L1B1, 32,
|
|
Offset (0x178),
|
|
L1T1, 32,
|
|
Offset (0x180),
|
|
L1RC, 32,
|
|
L1F0, 32,
|
|
L1F1, 32,
|
|
L1F2, 32,
|
|
L1S0, 32,
|
|
L1S1, 32,
|
|
L1S2, 32,
|
|
L1SC, 32,
|
|
Offset (0x1A4),
|
|
L1RB, 32,
|
|
Offset (0x1C0),
|
|
L1P0, 32,
|
|
L1P1, 32,
|
|
L1P2, 32,
|
|
Offset (0x230),
|
|
L1SE, 32,
|
|
L1SN, 32,
|
|
L1SD, 32,
|
|
Offset (0x2A4),
|
|
L1DC, 32,
|
|
L1ST, 32,
|
|
L1RE, 32,
|
|
L1PC, 32,
|
|
Offset (0x2B8),
|
|
L1N0, 32,
|
|
Offset (0x2C0),
|
|
L1ER, 32,
|
|
L1HI, 32,
|
|
Offset (0x2CC),
|
|
L1RR, 32
|
|
}
|
|
|
|
OperationRegion (CP12, SystemMemory, 0x01C0B800, 0x02DC)
|
|
Field (CP12, DWordAcc, NoLock, Preserve)
|
|
{
|
|
HPSR, 32,
|
|
HPDC, 32,
|
|
HSTC, 32,
|
|
Offset (0x2C),
|
|
HTM3, 32,
|
|
Offset (0x40),
|
|
HTP3, 32,
|
|
Offset (0x54),
|
|
HTM6, 32,
|
|
Offset (0x68),
|
|
HTP6, 32,
|
|
Offset (0x15C),
|
|
HPSG, 32,
|
|
Offset (0x174),
|
|
HTRC, 32,
|
|
Offset (0x2AC),
|
|
HPST, 32
|
|
}
|
|
|
|
OperationRegion (CP13, SystemMemory, 0x40000000, 0x1000)
|
|
Field (CP13, DWordAcc, NoLock, Preserve)
|
|
{
|
|
Offset (0x04),
|
|
SCR1, 32,
|
|
CRI1, 32,
|
|
Offset (0x10),
|
|
R1B0, 32,
|
|
R1B1, 32,
|
|
BNR1, 32,
|
|
Offset (0x7C),
|
|
LCA1, 32,
|
|
LCS1, 32,
|
|
SCA1, 32,
|
|
SLC1, 32,
|
|
Offset (0xA0),
|
|
LC21, 32,
|
|
Offset (0x154),
|
|
P1PR, 32,
|
|
Offset (0x710),
|
|
GPLC, 32,
|
|
Offset (0x80C),
|
|
G32C, 32,
|
|
Offset (0x8A8),
|
|
GEQC, 32,
|
|
GMDC, 32,
|
|
Offset (0x8BC),
|
|
CSW1, 32,
|
|
Offset (0x900),
|
|
IAV1, 32,
|
|
CR11, 32,
|
|
CR21, 32,
|
|
ILB1, 32,
|
|
IUB1, 32,
|
|
ILR1, 32,
|
|
ILT1, 32,
|
|
IUT1, 32,
|
|
Offset (0xF24),
|
|
ESC1, 32,
|
|
EST1, 32,
|
|
Offset (0xFC4),
|
|
ECS1, 32
|
|
}
|
|
|
|
OperationRegion (CP14, SystemMemory, 0x03971000, 0x10)
|
|
Field (CP14, DWordAcc, NoLock, Preserve)
|
|
{
|
|
C113, 32,
|
|
I113, 32,
|
|
N113, 32,
|
|
S113, 32
|
|
}
|
|
|
|
OperationRegion (CP15, SystemMemory, 0x0016B000, 0x1020)
|
|
Field (CP15, DWordAcc, NoLock, Preserve)
|
|
{
|
|
GP0B, 32,
|
|
Offset (0x101C),
|
|
G0PB, 32
|
|
}
|
|
|
|
OperationRegion (CP16, SystemMemory, 0x0018D000, 0x1030)
|
|
Field (CP16, DWordAcc, NoLock, Preserve)
|
|
{
|
|
GP1B, 32,
|
|
Offset (0x1014),
|
|
G1LB, 32,
|
|
Offset (0x101C),
|
|
G1PB, 32,
|
|
G1NB, 32
|
|
}
|
|
|
|
Method (PPU1, 0, Serialized)
|
|
{
|
|
Name (TOUT, Zero)
|
|
PDT1 = 0x04
|
|
HPDC = 0x03
|
|
HSES = 0x27
|
|
HSEC = One
|
|
HSP1 = 0x31
|
|
HSP2 = One
|
|
HSS1 = 0xDE
|
|
HSS2 = 0x07
|
|
HSM1 = 0x4C
|
|
HSM2 = 0x06
|
|
HECE = 0x18
|
|
HCE1 = 0xB0
|
|
C1M0 = 0x8C
|
|
C2M0 = 0x20
|
|
C1M1 = 0x14
|
|
C2M1 = 0x34
|
|
HCM0 = 0x06
|
|
HCM1 = 0x06
|
|
HPR0 = 0x16
|
|
HPR1 = 0x16
|
|
HPC0 = 0x36
|
|
HPC1 = 0x36
|
|
HRC2 = 0x05
|
|
HCLC = 0x42
|
|
HRM0 = 0x82
|
|
HRM1 = 0x68
|
|
S1M0 = 0x55
|
|
S2M0 = 0x55
|
|
S3M0 = 0x03
|
|
S1M1 = 0xAB
|
|
S2M1 = 0xAA
|
|
S3M1 = 0x02
|
|
G0M0 = 0x3F
|
|
G0M1 = 0x3F
|
|
HCVT = 0x10
|
|
HCCS = Zero
|
|
HCHS = 0x30
|
|
HCDV = 0x04
|
|
HCCE = 0x73
|
|
HCCC = 0x1C
|
|
HMCS = 0x15
|
|
HDM1 = 0x04
|
|
HCCM = One
|
|
HVD1 = 0x22
|
|
HVD2 = Zero
|
|
L0C0 = Zero
|
|
L0TE = 0x0D
|
|
L0BM = One
|
|
L0LM = 0x3A
|
|
L0PR = 0x2F
|
|
L0L0 = 0x09
|
|
L0L1 = 0x09
|
|
L0L2 = 0x1A
|
|
L0R1 = One
|
|
L0R2 = 0x07
|
|
L0M0 = 0x31
|
|
L0M1 = 0x31
|
|
L0M2 = 0x03
|
|
L0CD = 0x02
|
|
L0VD = One
|
|
L0X0 = 0x12
|
|
L0TT = 0x25
|
|
L0OT = Zero
|
|
L0RT = 0x05
|
|
L0ET = One
|
|
L0VG = 0x26
|
|
L0DG = 0x12
|
|
L0EG = 0x04
|
|
L0OG = 0x04
|
|
L0PG = 0x09
|
|
L0EI = 0x15
|
|
L0DI = 0x32
|
|
L0B0 = 0x7F
|
|
L0B1 = 0x07
|
|
L0T1 = 0x04
|
|
L0RC = 0x70
|
|
L0F0 = 0x08
|
|
L0F1 = 0x08
|
|
L0F2 = 0x09
|
|
L0S0 = 0x04
|
|
L0S1 = 0x04
|
|
L0S2 = 0x02
|
|
L0SC = 0x0C
|
|
L0RB = 0x02
|
|
L0P0 = 0x5C
|
|
L0P1 = 0x3E
|
|
L0P2 = 0x3F
|
|
L0SE = 0x21
|
|
L0SN = 0xA0
|
|
L0SD = 0x08
|
|
L0DC = One
|
|
L0RE = 0xC3
|
|
L0PC = Zero
|
|
L0N0 = 0x8C
|
|
L0ER = 0x7F
|
|
L0HI = 0x2A
|
|
L0C1 = 0x0C
|
|
L0C2 = Zero
|
|
L0RR = 0x02
|
|
L0IN = 0x20
|
|
L1C0 = Zero
|
|
L1TE = 0x0D
|
|
L1BM = One
|
|
L1LM = 0x3A
|
|
L1PR = 0x2F
|
|
L1L0 = 0x09
|
|
L1L1 = 0x09
|
|
L1L2 = 0x1A
|
|
L1R1 = One
|
|
L1R2 = 0x07
|
|
L1M0 = 0x31
|
|
L1M1 = 0x31
|
|
L1M2 = 0x03
|
|
L1CD = 0x02
|
|
L1VD = One
|
|
L1X0 = 0x12
|
|
L1TT = 0x25
|
|
L1OT = Zero
|
|
L1RT = 0x05
|
|
L1ET = One
|
|
L1VG = 0x26
|
|
L1DG = 0x12
|
|
L1EG = 0x04
|
|
L1OG = 0x04
|
|
L1PG = 0x09
|
|
L1EI = 0x15
|
|
L1DI = 0x32
|
|
L1B0 = 0x7F
|
|
L1B1 = 0x07
|
|
L1T1 = 0x04
|
|
L1RC = 0x70
|
|
L1F0 = 0x08
|
|
L1F1 = 0x08
|
|
L1F2 = 0x09
|
|
L1S0 = 0x04
|
|
L1S1 = 0x04
|
|
L1S2 = 0x02
|
|
L1SC = 0x0C
|
|
L1RB = 0x02
|
|
L1P0 = 0x5C
|
|
L1P1 = 0x3E
|
|
L1P2 = 0x3F
|
|
L1SE = 0x21
|
|
L1SN = 0xA0
|
|
L1SD = 0x08
|
|
L1DC = One
|
|
L1RE = 0xC3
|
|
L1PC = Zero
|
|
L1N0 = 0x8C
|
|
L1ER = 0x7F
|
|
L1HI = 0x2A
|
|
L1C1 = 0x0C
|
|
L1C2 = Zero
|
|
L1RR = 0x02
|
|
L1IN = 0x20
|
|
HPSG = 0x3F
|
|
HTRC = 0x58
|
|
HTM3 = 0x19
|
|
HTP3 = 0x07
|
|
HTM6 = 0x17
|
|
HTP6 = 0x09
|
|
If ((\_SB.SIDV >= 0x00020000)){}
|
|
HPSR = Zero
|
|
L0ST = One
|
|
L1ST = One
|
|
HSTC = One
|
|
Local0 = HPST /* \_SB_.HPST */
|
|
While ((Local0 & 0x40))
|
|
{
|
|
Sleep (One)
|
|
TOUT++
|
|
If ((TOUT == 0x0F))
|
|
{
|
|
Break
|
|
}
|
|
|
|
Local0 = HPST /* \_SB_.HPST */
|
|
}
|
|
|
|
If ((TOUT == 0x0F))
|
|
{
|
|
Return (One)
|
|
}
|
|
Else
|
|
{
|
|
Return (Zero)
|
|
}
|
|
}
|
|
|
|
Method (LTS1, 0, Serialized)
|
|
{
|
|
Name (TOUT, Zero)
|
|
Local0 = G32C /* \_SB_.G32C */
|
|
Local0 &= 0xFFFFE0FF
|
|
Local0 |= 0x0100
|
|
G32C = Local0
|
|
GMDC = 0x000155A0
|
|
Local0 = GEQC /* \_SB_.GEQC */
|
|
Local0 &= 0xFFFFFFEF
|
|
GEQC = Local0
|
|
CSW1 = One
|
|
P1PR = 0x77777777
|
|
CSW1 = Zero
|
|
Local0 = GPLC /* \_SB_.GPLC */
|
|
Local0 &= 0xFFC0F0FF
|
|
Local0 |= 0x00030300
|
|
GPLC = Local0
|
|
PLT1 = 0x0100
|
|
Local0 = EST1 /* \_SB_.EST1 */
|
|
While (((Local0 & 0x0400) != 0x0400))
|
|
{
|
|
Sleep (One)
|
|
TOUT++
|
|
If ((TOUT == 0x96))
|
|
{
|
|
Break
|
|
}
|
|
|
|
Local0 = EST1 /* \_SB_.EST1 */
|
|
}
|
|
|
|
If ((TOUT == 0x96))
|
|
{
|
|
Return (One)
|
|
}
|
|
Else
|
|
{
|
|
Return (Zero)
|
|
}
|
|
}
|
|
|
|
Method (IAT1, 0, Serialized)
|
|
{
|
|
IAV1 = One
|
|
ILB1 = 0x40100000
|
|
IUB1 = Zero
|
|
ILR1 = 0x401FFFFF
|
|
ILT1 = 0x01000000
|
|
IUT1 = Zero
|
|
CR11 = 0x04
|
|
CR21 = 0x80000000
|
|
BNR1 = 0x00010100
|
|
}
|
|
|
|
Method (REB1, 2, Serialized)
|
|
{
|
|
Local0 = PSC1 /* \_SB_.PSC1 */
|
|
Local0 &= 0xFBFFFFFF
|
|
PSC1 = Local0
|
|
LBW0 = Arg0
|
|
HBW0 = Zero
|
|
LLW0 = Arg1
|
|
HLW0 = Zero
|
|
LBR0 = Arg0
|
|
HBR0 = Zero
|
|
LLR0 = Arg1
|
|
HLR0 = Zero
|
|
Local0 = PSC1 /* \_SB_.PSC1 */
|
|
Local0 |= 0x04000000
|
|
PSC1 = Local0
|
|
}
|
|
|
|
Method (EEB1, 2, Serialized)
|
|
{
|
|
Local0 = PSC1 /* \_SB_.PSC1 */
|
|
Local0 &= 0xBFFFFFFF
|
|
PSC1 = Local0
|
|
LBW1 = Arg0
|
|
HBW1 = Zero
|
|
LLW1 = Arg1
|
|
HLW1 = Zero
|
|
LBR1 = Arg0
|
|
HBR1 = Zero
|
|
LLR1 = Arg1
|
|
HLR1 = Zero
|
|
Local0 = PSC1 /* \_SB_.PSC1 */
|
|
Local0 |= 0x40000000
|
|
PSC1 = Local0
|
|
}
|
|
|
|
Name (E1LT, 0x400FFFFF)
|
|
Method (MSC1, 0, Serialized)
|
|
{
|
|
Local0 = SCR1 /* \_SB_.SCR1 */
|
|
Local0 |= 0x02
|
|
SCR1 = Local0
|
|
PSL1 = 0x20000000
|
|
Local0 = PPC1 /* \_SB_.PPC1 */
|
|
Local0 &= 0xFFFFFFDF
|
|
PPC1 = Local0
|
|
CSW1 = One
|
|
Local0 = LCA1 /* \_SB_.LCA1 */
|
|
Local0 |= 0x00400000
|
|
Local0 |= 0x0C00
|
|
LCA1 = Local0
|
|
Local0 = CRI1 /* \_SB_.CRI1 */
|
|
Local0 &= 0xFFFF
|
|
Local0 |= 0x06040000
|
|
CRI1 = Local0
|
|
Local0 = SCA1 /* \_SB_.SCA1 */
|
|
Local0 &= 0xFFFFFFBF
|
|
SCA1 = Local0
|
|
CSW1 = Zero
|
|
ECS1 = One
|
|
R1B0 = Zero
|
|
R1B1 = Zero
|
|
ECS1 = Zero
|
|
PEB1 = 0x40000000
|
|
REB1 (0x40001000, \_SB.E1LT)
|
|
EEB1 (0x40101000, 0x401FFFFF)
|
|
}
|
|
|
|
Name (G1D3, Zero)
|
|
|
|
|
|
|
|
Device (IPC0)
|
|
{
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.GLNK
|
|
})
|
|
Name (_HID, "QCOM021C") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
}
|
|
|
|
Device (GLNK)
|
|
{
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.RPEN
|
|
})
|
|
Name (_HID, "QCOM02F9") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001E3,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000BE,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000CC,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000260,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001E1,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000BC,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000000CA,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000025E,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.GLNK._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Device (ARPC)
|
|
{
|
|
Name (_DEP, Package (0x03) // _DEP: Dependencies
|
|
{
|
|
\_SB.MMU0,
|
|
\_SB.GLNK,
|
|
\_SB.SCM0
|
|
})
|
|
Name (_HID, "QCOM0297") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
}
|
|
|
|
Device (ARPD)
|
|
{
|
|
Name (_DEP, Package (0x02) // _DEP: Dependencies
|
|
{
|
|
\_SB.ADSP,
|
|
\_SB.ARPC
|
|
})
|
|
Name (_HID, "QCOM02F3") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
}
|
|
|
|
Device (RFS0)
|
|
{
|
|
Name (_DEP, Package (0x02) // _DEP: Dependencies
|
|
{
|
|
\_SB.IPC0,
|
|
\_SB.UFS0
|
|
})
|
|
Name (_HID, "QCOM0235") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x88888888, // Address Base
|
|
0x99999999, // Address Length
|
|
_Y00)
|
|
Memory32Fixed (ReadWrite,
|
|
0x11111111, // Address Base
|
|
0x22222222, // Address Length
|
|
_Y01)
|
|
Memory32Fixed (ReadWrite,
|
|
0x33333333, // Address Base
|
|
0x44444444, // Address Length
|
|
_Y02)
|
|
})
|
|
CreateDWordField (RBUF, \_SB.RFS0._CRS._Y00._BAS, RMTA) // _BAS: Base Address
|
|
CreateDWordField (RBUF, \_SB.RFS0._CRS._Y00._LEN, RMTL) // _LEN: Length
|
|
CreateDWordField (RBUF, \_SB.RFS0._CRS._Y01._BAS, RFMA) // _BAS: Base Address
|
|
CreateDWordField (RBUF, \_SB.RFS0._CRS._Y01._LEN, RFML) // _LEN: Length
|
|
CreateDWordField (RBUF, \_SB.RFS0._CRS._Y02._BAS, RFAA) // _BAS: Base Address
|
|
CreateDWordField (RBUF, \_SB.RFS0._CRS._Y02._LEN, RFAL) // _LEN: Length
|
|
RMTA = \_SB.RMTB
|
|
RMTL = \_SB.RMTX
|
|
RFMA = \_SB.RFMB
|
|
RFML = \_SB.RFMS
|
|
RFAA = \_SB.RFAB
|
|
RFAL = \_SB.RFAS
|
|
Return (RBUF) /* \_SB_.RFS0._CRS.RBUF */
|
|
}
|
|
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0B)
|
|
}
|
|
}
|
|
|
|
Device (IPA)
|
|
{
|
|
Name (_DEP, Package (0x06) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.RPEN,
|
|
\_SB.PILC,
|
|
\_SB.MMU0,
|
|
\_SB.GSI,
|
|
\_SB.GLNK
|
|
})
|
|
Name (_HID, "QCOM02B3") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Return (ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x01E40000, // Address Base
|
|
0x0001FFFF, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000157,
|
|
}
|
|
})
|
|
}
|
|
}
|
|
|
|
Device (GSI)
|
|
{
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0
|
|
})
|
|
Name (_HID, "QCOM02E7") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x01E00000, // Address Base
|
|
0x00030000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x000001D0,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.GSI_._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Device (QDIG)
|
|
{
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.GLNK
|
|
})
|
|
Name (_HID, "QCOM0225") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
}
|
|
|
|
Device (QCDB)
|
|
{
|
|
Name (_HID, "QCOM0298") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
}
|
|
|
|
Device (SYSM)
|
|
{
|
|
Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID
|
|
Name (_UID, 0x00100000) // _UID: Unique ID
|
|
Name (_LPI, Package (0x05) // _LPI: Low Power Idle States
|
|
{
|
|
Zero,
|
|
0x01000000,
|
|
0x02,
|
|
Package (0x0A)
|
|
{
|
|
0x251C,
|
|
0x1770,
|
|
Zero,
|
|
0x20,
|
|
Zero,
|
|
Zero,
|
|
0x3300,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"platform.F1"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x2710,
|
|
0x19C8,
|
|
One,
|
|
0x20,
|
|
Zero,
|
|
Zero,
|
|
0xC300,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"platform.F2"
|
|
}
|
|
})
|
|
Device (CLUS)
|
|
{
|
|
Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID
|
|
Name (_UID, 0x10) // _UID: Unique ID
|
|
Name (_LPI, Package (0x05) // _LPI: Low Power Idle States
|
|
{
|
|
Zero,
|
|
0x01000000,
|
|
0x02,
|
|
Package (0x0A)
|
|
{
|
|
0x170C,
|
|
0x0BB8,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
0x20,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"L3Cluster.D2"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x1770,
|
|
0x0CE4,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
0x02,
|
|
0x40,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"L3Cluster.D4"
|
|
}
|
|
})
|
|
Device (CPU0)
|
|
{
|
|
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Name (_LPI, Package (0x07) // _LPI: Low Power Idle States
|
|
{
|
|
Zero,
|
|
Zero,
|
|
0x04,
|
|
Package (0x0A)
|
|
{
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x00000000FFFFFFFF, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver0.C1"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x0190,
|
|
0x64,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000002, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver0.C2"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x1388,
|
|
0x01F4,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000003, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver0.C3"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x13EC,
|
|
0x0226,
|
|
One,
|
|
One,
|
|
Zero,
|
|
0x02,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000004, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver0.C4"
|
|
}
|
|
})
|
|
}
|
|
|
|
Device (CPU1)
|
|
{
|
|
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
|
|
Name (_UID, One) // _UID: Unique ID
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Name (_LPI, Package (0x07) // _LPI: Low Power Idle States
|
|
{
|
|
Zero,
|
|
Zero,
|
|
0x04,
|
|
Package (0x0A)
|
|
{
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x00000000FFFFFFFF, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver1.C1"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x0190,
|
|
0x64,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000002, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver1.C2"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x1388,
|
|
0x01F4,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000003, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver1.C3"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x13EC,
|
|
0x0226,
|
|
One,
|
|
One,
|
|
Zero,
|
|
0x02,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000004, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver1.C4"
|
|
}
|
|
})
|
|
}
|
|
|
|
Device (CPU2)
|
|
{
|
|
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
|
|
Name (_UID, 0x02) // _UID: Unique ID
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Name (_LPI, Package (0x07) // _LPI: Low Power Idle States
|
|
{
|
|
Zero,
|
|
Zero,
|
|
0x04,
|
|
Package (0x0A)
|
|
{
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x00000000FFFFFFFF, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver2.C1"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x0190,
|
|
0x64,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000002, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver2.C2"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x1388,
|
|
0x01F4,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000003, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver2.C3"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x13EC,
|
|
0x0226,
|
|
One,
|
|
One,
|
|
Zero,
|
|
0x02,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000004, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver2.C4"
|
|
}
|
|
})
|
|
}
|
|
|
|
Device (CPU3)
|
|
{
|
|
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
|
|
Name (_UID, 0x03) // _UID: Unique ID
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Name (_LPI, Package (0x07) // _LPI: Low Power Idle States
|
|
{
|
|
Zero,
|
|
Zero,
|
|
0x04,
|
|
Package (0x0A)
|
|
{
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x00000000FFFFFFFF, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver3.C1"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x0190,
|
|
0x64,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000002, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver3.C2"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x1388,
|
|
0x01F4,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000003, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver3.C3"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x13EC,
|
|
0x0226,
|
|
One,
|
|
One,
|
|
Zero,
|
|
0x02,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000004, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoSilver3.C4"
|
|
}
|
|
})
|
|
}
|
|
|
|
Device (CPU4)
|
|
{
|
|
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
|
|
Name (_UID, 0x04) // _UID: Unique ID
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Name (_LPI, Package (0x07) // _LPI: Low Power Idle States
|
|
{
|
|
Zero,
|
|
Zero,
|
|
0x04,
|
|
Package (0x0A)
|
|
{
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x00000000FFFFFFFF, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold0.C1"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x0190,
|
|
0x64,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000002, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold0.C2"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x03E8,
|
|
0x028A,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000003, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold0.C3"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x05DC,
|
|
0x044C,
|
|
One,
|
|
One,
|
|
Zero,
|
|
0x02,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000004, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold0.C4"
|
|
}
|
|
})
|
|
}
|
|
|
|
Device (CPU5)
|
|
{
|
|
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
|
|
Name (_UID, 0x05) // _UID: Unique ID
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Name (_LPI, Package (0x07) // _LPI: Low Power Idle States
|
|
{
|
|
Zero,
|
|
Zero,
|
|
0x04,
|
|
Package (0x0A)
|
|
{
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x00000000FFFFFFFF, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold1.C1"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x0190,
|
|
0x64,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000002, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold1.C2"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x03E8,
|
|
0x028A,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000003, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold1.C3"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x05DC,
|
|
0x044C,
|
|
One,
|
|
One,
|
|
Zero,
|
|
0x02,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000004, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold1.C4"
|
|
}
|
|
})
|
|
}
|
|
|
|
Device (CPU6)
|
|
{
|
|
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
|
|
Name (_UID, 0x06) // _UID: Unique ID
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Name (_LPI, Package (0x07) // _LPI: Low Power Idle States
|
|
{
|
|
Zero,
|
|
Zero,
|
|
0x04,
|
|
Package (0x0A)
|
|
{
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x00000000FFFFFFFF, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold2.C1"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x0190,
|
|
0x64,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000002, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold2.C2"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x03E8,
|
|
0x028A,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000003, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold2.C3"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x05DC,
|
|
0x044C,
|
|
One,
|
|
One,
|
|
Zero,
|
|
0x02,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000004, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold2.C4"
|
|
}
|
|
})
|
|
}
|
|
|
|
Device (CPU7)
|
|
{
|
|
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
|
|
Name (_UID, 0x07) // _UID: Unique ID
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Name (_LPI, Package (0x07) // _LPI: Low Power Idle States
|
|
{
|
|
Zero,
|
|
Zero,
|
|
0x04,
|
|
Package (0x0A)
|
|
{
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x00000000FFFFFFFF, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold3.C1"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x0190,
|
|
0x64,
|
|
Zero,
|
|
Zero,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000002, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold3.C2"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x03E8,
|
|
0x028A,
|
|
One,
|
|
One,
|
|
Zero,
|
|
One,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000003, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold3.C3"
|
|
},
|
|
|
|
Package (0x0A)
|
|
{
|
|
0x05DC,
|
|
0x044C,
|
|
One,
|
|
One,
|
|
Zero,
|
|
0x02,
|
|
ResourceTemplate ()
|
|
{
|
|
Register (FFixedHW,
|
|
0x20, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000040000004, // Address
|
|
0x03, // Access Size
|
|
)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
ResourceTemplate ()
|
|
{
|
|
Register (SystemMemory,
|
|
0x00, // Bit Width
|
|
0x00, // Bit Offset
|
|
0x0000000000000000, // Address
|
|
,)
|
|
},
|
|
|
|
"KryoGold3.C4"
|
|
}
|
|
})
|
|
}
|
|
}
|
|
}
|
|
|
|
Device (QRNG)
|
|
{
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0
|
|
})
|
|
Name (_HID, "QCOM02FE") // _HID: Hardware ID
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x00793000, // Address Base
|
|
0x00001000, // Address Length
|
|
)
|
|
})
|
|
Return (RBUF) /* \_SB_.QRNG._CRS.RBUF */
|
|
}
|
|
}
|
|
|
|
Device (GPS)
|
|
{
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.GLNK
|
|
})
|
|
Name (_HID, "QCOM02B6") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_CID, "ACPIQCOM24B4") // _CID: Compatible ID
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
}
|
|
|
|
Device (QGP0)
|
|
{
|
|
Name (_HID, "QCOM02F4") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x00804000, // Address Base
|
|
0x00050000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000119,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000011B,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.QGP0._CRS.RBUF */
|
|
}
|
|
|
|
Method (GPII, 0, Serialized)
|
|
{
|
|
Return (Package (0x02)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x05,
|
|
0x0119
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x07,
|
|
0x011B
|
|
}
|
|
})
|
|
}
|
|
}
|
|
|
|
Device (QGP1)
|
|
{
|
|
Name (_HID, "QCOM02F4") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, One) // _UID: Unique ID
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x00A04000, // Address Base
|
|
0x00050000, // Address Length
|
|
)
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x00000138,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
|
|
{
|
|
0x0000013A,
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.QGP1._CRS.RBUF */
|
|
}
|
|
|
|
Method (GPII, 0, Serialized)
|
|
{
|
|
Return (Package (0x02)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
One,
|
|
0x0138
|
|
},
|
|
|
|
Package (0x03)
|
|
{
|
|
One,
|
|
0x03,
|
|
0x013A
|
|
}
|
|
})
|
|
}
|
|
}
|
|
|
|
Device (SARM)
|
|
{
|
|
Name (_HID, "QCOM0301") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
}
|
|
|
|
Scope (\_SB)
|
|
{
|
|
Device (WBDI)
|
|
{
|
|
Name (_HID, "SAM0909") // _HID: Hardware ID
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Name (_SUB, "RENEGA0E") // _SUB: Subsystem ID
|
|
Name (_DEP, Package (0x02) // _DEP: Dependencies
|
|
{
|
|
\_SB.GIO0,
|
|
\_SB.SCM0
|
|
})
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x003E
|
|
}
|
|
GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x003B
|
|
}
|
|
GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x003C
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.WBDI._CRS.RBUF */
|
|
}
|
|
}
|
|
}
|
|
|
|
Scope (\_SB)
|
|
{
|
|
Name (GRST, Zero)
|
|
}
|
|
|
|
|
|
Device (SEN2)
|
|
{
|
|
Name (_DEP, Package (0x03) // _DEP: Dependencies
|
|
{
|
|
\_SB.IPC0,
|
|
\_SB.SCSS,
|
|
\_SB.ARPC
|
|
})
|
|
Name (_HID, "QCOM0308") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_CID, "QCOM02A2") // _CID: Compatible ID
|
|
}
|
|
|
|
Device (LID0)
|
|
{
|
|
Name (_HID, "PNP0C0D" /* Lid Device */) // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (LIDB, One)
|
|
Method (_LID, 0, NotSerialized) // _LID: Lid Status
|
|
{
|
|
Return (LIDB) /* \_SB_.LID0.LIDB */
|
|
}
|
|
}
|
|
|
|
Method (ADDR, 0, NotSerialized)
|
|
{
|
|
If ((\_SB.SVMJ == One))
|
|
{
|
|
Return (0x0390B000)
|
|
}
|
|
ElseIf ((\_SB.SVMJ == 0x02))
|
|
{
|
|
Return (0x0350B000)
|
|
}
|
|
}
|
|
|
|
OperationRegion (NM11, SystemMemory, ADDR (), 0x14)
|
|
Field (NM11, DWordAcc, NoLock, Preserve)
|
|
{
|
|
PI1C, 32,
|
|
PIN1, 32,
|
|
PI1N, 32,
|
|
PI1S, 32,
|
|
PI1L, 32
|
|
}
|
|
|
|
Method (_MID, 0, Serialized)
|
|
{
|
|
Name (NMID, Zero)
|
|
NMID = PIN1 /* \_SB_.PIN1 */
|
|
Return (NMID) /* \_SB_._MID.NMID */
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Scope (\_SB)
|
|
{
|
|
Device (AGNT)
|
|
{
|
|
Name (_ADR, Zero) // _ADR: Address
|
|
Name (_HID, "SAM0603") // _HID: Hardware ID
|
|
Name (_CID, "SAM0603") // _CID: Compatible ID
|
|
Name (_SUB, "RENEGA0E") // _SUB: Subsystem ID
|
|
Name (_UID, One) // _UID: Unique ID
|
|
Name (_STA, 0x0F) // _STA: Status
|
|
}
|
|
}
|
|
|
|
Method (ADBG, 1, Serialized)
|
|
{
|
|
|
|
}
|
|
|
|
Device (UCP0)
|
|
{
|
|
Name (_HID, "QCOM02D0") // _HID: Hardware ID
|
|
Name (_DEP, Package (0x03) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.PTCC,
|
|
\_SB.URS0
|
|
})
|
|
Device (CON0)
|
|
{
|
|
Name (_ADR, Zero) // _ADR: Address
|
|
Name (_PLD, Package (0x01) // _PLD: Physical Location of Device
|
|
{
|
|
ToPLD (
|
|
PLD_Revision = 0x2,
|
|
PLD_IgnoreColor = 0x1,
|
|
PLD_Red = 0x0,
|
|
PLD_Green = 0x0,
|
|
PLD_Blue = 0x0,
|
|
PLD_Width = 0x0,
|
|
PLD_Height = 0x0,
|
|
PLD_UserVisible = 0x1,
|
|
PLD_Dock = 0x0,
|
|
PLD_Lid = 0x0,
|
|
PLD_Panel = "BACK",
|
|
PLD_VerticalPosition = "CENTER",
|
|
PLD_HorizontalPosition = "LEFT",
|
|
PLD_Shape = "VERTICALRECTANGLE",
|
|
PLD_GroupOrientation = 0x0,
|
|
PLD_GroupToken = 0x0,
|
|
PLD_GroupPosition = 0x1,
|
|
PLD_Bay = 0x0,
|
|
PLD_Ejectable = 0x0,
|
|
PLD_EjectRequired = 0x0,
|
|
PLD_CabinetNumber = 0x0,
|
|
PLD_CardCageNumber = 0x0,
|
|
PLD_Reference = 0x0,
|
|
PLD_Rotation = 0x0,
|
|
PLD_Order = 0x0,
|
|
PLD_VerticalOffset = 0xFFFF,
|
|
PLD_HorizontalOffset = 0xFFFF)
|
|
|
|
})
|
|
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
|
|
{
|
|
One,
|
|
0x09,
|
|
Zero,
|
|
Zero
|
|
})
|
|
Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
|
|
{
|
|
ToUUID ("6b856e62-40f4-4688-bd46-5e888a2260de"),
|
|
Package (0x0A)
|
|
{
|
|
Package (0x02)
|
|
{
|
|
One,
|
|
0x04
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x02,
|
|
0x03
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x03,
|
|
Zero
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x04,
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x05,
|
|
0x03
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x06,
|
|
Package (0x01)
|
|
{
|
|
0x0001905A
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x07,
|
|
Package (0x02)
|
|
{
|
|
0x0001912C,
|
|
0x0002D0C8
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x08,
|
|
Package (0x02)
|
|
{
|
|
0xFF01,
|
|
0x3C86
|
|
}
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x09,
|
|
One
|
|
},
|
|
|
|
Package (0x02)
|
|
{
|
|
0x0A,
|
|
One
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler
|
|
{
|
|
0x00 // .
|
|
})
|
|
CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.UCP0._DSM._T_0 */
|
|
If ((_T_0 == ToUUID ("18de299f-9476-4fc9-b43b-8aeb713ed751")))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_1 = ToInteger (Arg2)
|
|
If ((_T_1 == Zero))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_2 = ToInteger (Arg1)
|
|
If ((_T_2 == Zero))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x01 // .
|
|
})
|
|
Break
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x01 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
ElseIf ((_T_1 == One))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_3, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_3 = ToInteger (Arg3)
|
|
If ((_T_3 == Zero))
|
|
{
|
|
Return (Package (0x01)
|
|
{
|
|
0x36019050
|
|
})
|
|
Break
|
|
}
|
|
ElseIf ((_T_3 == One))
|
|
{
|
|
Return (Package (0x01)
|
|
{
|
|
0x3601912C
|
|
})
|
|
Break
|
|
}
|
|
Else
|
|
{
|
|
Return (Package (0x01)
|
|
{
|
|
Zero
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
|
|
Method (CCOT, 2, NotSerialized)
|
|
{
|
|
\_SB.CCST = Arg0
|
|
\_SB.HSFL = Arg1
|
|
}
|
|
|
|
Method (CCVL, 0, NotSerialized)
|
|
{
|
|
Return (\_SB.CCST)
|
|
}
|
|
|
|
Method (HPDS, 0, NotSerialized)
|
|
{
|
|
Notify (\_SB.GPU0, 0x94) // Device-Specific
|
|
}
|
|
|
|
Method (HPDF, 2, NotSerialized)
|
|
{
|
|
\_SB.HPDB = Arg0
|
|
\_SB.PINA = Arg1
|
|
Notify (\_SB.GPU0, \_SB.HPDB)
|
|
}
|
|
|
|
Method (HPDV, 0, NotSerialized)
|
|
{
|
|
Return (\_SB.HPDB)
|
|
}
|
|
|
|
Method (PINV, 0, NotSerialized)
|
|
{
|
|
Return (\_SB.PINA)
|
|
}
|
|
}
|
|
|
|
|
|
Name (QUFN, Zero)
|
|
Name (DPP0, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
|
|
|
|
Device (URS0)
|
|
{
|
|
Method (URSI, 0, NotSerialized)
|
|
{
|
|
If ((\_SB.QUFN == Zero))
|
|
{
|
|
Return ("QCOM0304")
|
|
//Return ("QCOM0305")
|
|
}
|
|
Else
|
|
{
|
|
Return ("QCOM0305")
|
|
}
|
|
}
|
|
|
|
Alias (URSI, _HID)
|
|
Name (_CID, "PNP0CA1") // _CID: Compatible ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Name (_CCA, Zero) // _CCA: Cache Coherency Attribute
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0
|
|
})
|
|
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x0A600000, // Address Base
|
|
0x000FFFFF, // Address Length
|
|
)
|
|
})
|
|
Device (USB0)
|
|
{
|
|
Name (_ADR, Zero) // _ADR: Address
|
|
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
|
|
Name (_PLD, Package (0x01) // _PLD: Physical Location of Device
|
|
{
|
|
ToPLD (
|
|
PLD_Revision = 0x2,
|
|
PLD_IgnoreColor = 0x1,
|
|
PLD_Red = 0x0,
|
|
PLD_Green = 0x0,
|
|
PLD_Blue = 0x0,
|
|
PLD_Width = 0x0,
|
|
PLD_Height = 0x0,
|
|
PLD_UserVisible = 0x1,
|
|
PLD_Dock = 0x0,
|
|
PLD_Lid = 0x0,
|
|
PLD_Panel = "BACK",
|
|
PLD_VerticalPosition = "CENTER",
|
|
PLD_HorizontalPosition = "LEFT",
|
|
PLD_Shape = "VERTICALRECTANGLE",
|
|
PLD_GroupOrientation = 0x0,
|
|
PLD_GroupToken = 0x0,
|
|
PLD_GroupPosition = 0x1,
|
|
PLD_Bay = 0x0,
|
|
PLD_Ejectable = 0x0,
|
|
PLD_EjectRequired = 0x0,
|
|
PLD_CabinetNumber = 0x0,
|
|
PLD_CardCageNumber = 0x0,
|
|
PLD_Reference = 0x0,
|
|
PLD_Rotation = 0x0,
|
|
PLD_Order = 0x0,
|
|
PLD_VerticalOffset = 0xFFFF,
|
|
PLD_HorizontalOffset = 0xFFFF)
|
|
|
|
})
|
|
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
|
|
{
|
|
One,
|
|
0x09,
|
|
Zero,
|
|
Zero
|
|
})
|
|
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
|
|
{
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x000000A5,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake, ,, )
|
|
{
|
|
0x0000017A,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake, ,, )
|
|
{
|
|
0x00000206,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, SharedAndWake, ,, )
|
|
{
|
|
0x00000208,
|
|
}
|
|
Interrupt (ResourceConsumer, Edge, ActiveHigh, SharedAndWake, ,, )
|
|
{
|
|
0x00000209,
|
|
}
|
|
})
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Method (DPM0, 1, NotSerialized)
|
|
{
|
|
\_SB.DPP0 = Arg0
|
|
Notify (\_SB.PEP0, 0xA0) // Device-Specific
|
|
}
|
|
|
|
Method (CCVL, 0, NotSerialized)
|
|
{
|
|
Return (\_SB.CCST)
|
|
}
|
|
|
|
Method (HSEN, 0, NotSerialized)
|
|
{
|
|
Return (\_SB.HSFL)
|
|
}
|
|
|
|
Name (HSEI, ResourceTemplate ()
|
|
{
|
|
GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x002B
|
|
}
|
|
})
|
|
Scope (\_SB.GIO0)
|
|
{
|
|
OperationRegion (HLEN, GeneralPurposeIo, Zero, One)
|
|
}
|
|
|
|
Field (\_SB.GIO0.HLEN, ByteAcc, NoLock, Preserve)
|
|
{
|
|
Connection (\_SB.URS0.USB0.HSEI),
|
|
MOD1, 1
|
|
}
|
|
|
|
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler
|
|
{
|
|
0x00 // .
|
|
})
|
|
CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.URS0.USB0._DSM._T_0 */
|
|
If ((_T_0 == ToUUID ("ce2ee385-00e6-48cb-9f05-2edb927c4899") /* USB Controller */))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_1 = ToInteger (Arg2)
|
|
If ((_T_1 == Zero))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_2 = ToInteger (Arg1)
|
|
If ((_T_2 == Zero))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x1D // .
|
|
})
|
|
Break
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x01 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
ElseIf ((_T_1 == 0x02))
|
|
{
|
|
Return (Zero)
|
|
Break
|
|
}
|
|
ElseIf ((_T_1 == 0x03))
|
|
{
|
|
Return (One)
|
|
Break
|
|
}
|
|
ElseIf ((_T_1 == 0x04))
|
|
{
|
|
Return (0x02)
|
|
Break
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
ElseIf ((_T_0 == ToUUID ("a9a82a56-95a1-4b4a-b014-3be47df1b7d5")))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_3, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_3 = ToInteger (Arg1)
|
|
If ((_T_3 == One))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_4, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_4 = ToInteger (Arg2)
|
|
If ((_T_4 == One))
|
|
{
|
|
ADBG ("MOD1+")
|
|
\_SB.URS0.USB0.MOD1 = One
|
|
Return (Buffer (One)
|
|
{
|
|
0x01 // .
|
|
})
|
|
}
|
|
ElseIf ((_T_4 == Zero))
|
|
{
|
|
ADBG ("MOD1-")
|
|
\_SB.URS0.USB0.MOD1 = Zero
|
|
Return (Buffer (One)
|
|
{
|
|
0x01 // .
|
|
})
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
|
|
Method (PHYC, 0, NotSerialized)
|
|
{
|
|
Name (CFG0, Package (0x01)
|
|
{
|
|
Package (0x03)
|
|
{
|
|
Zero,
|
|
0x088E2198,
|
|
0x20
|
|
}
|
|
})
|
|
Return (CFG0) /* \_SB_.URS0.USB0.PHYC.CFG0 */
|
|
}
|
|
|
|
Device (RHUB)
|
|
{
|
|
Name (_ADR, Zero) // _ADR: Address
|
|
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler
|
|
{
|
|
0x00 // .
|
|
})
|
|
CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.URS0.USB0.RHUB._DSM._T_0 */
|
|
If ((_T_0 == ToUUID ("a9a82a56-95a1-4b4a-b014-3be47df1b7d5")))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_1 = ToInteger (Arg1)
|
|
If ((_T_1 == One))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_2 = ToInteger (Arg2)
|
|
If ((_T_2 == One))
|
|
{
|
|
ADBG ("MOD1++")
|
|
\_SB.URS0.USB0.MOD1 = One
|
|
Return (Buffer (One)
|
|
{
|
|
0x01 // .
|
|
})
|
|
}
|
|
ElseIf ((_T_2 == Zero))
|
|
{
|
|
ADBG ("MOD1--")
|
|
\_SB.URS0.USB0.MOD1 = Zero
|
|
Return (Buffer (One)
|
|
{
|
|
0x01 // .
|
|
})
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
Device (UFN0)
|
|
{
|
|
Name (_ADR, One) // _ADR: Address
|
|
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
|
|
Name (_PLD, Package (0x01) // _PLD: Physical Location of Device
|
|
{
|
|
ToPLD (
|
|
PLD_Revision = 0x2,
|
|
PLD_IgnoreColor = 0x1,
|
|
PLD_Red = 0x0,
|
|
PLD_Green = 0x0,
|
|
PLD_Blue = 0x0,
|
|
PLD_Width = 0x0,
|
|
PLD_Height = 0x0,
|
|
PLD_UserVisible = 0x1,
|
|
PLD_Dock = 0x0,
|
|
PLD_Lid = 0x0,
|
|
PLD_Panel = "BACK",
|
|
PLD_VerticalPosition = "CENTER",
|
|
PLD_HorizontalPosition = "LEFT",
|
|
PLD_Shape = "VERTICALRECTANGLE",
|
|
PLD_GroupOrientation = 0x0,
|
|
PLD_GroupToken = 0x0,
|
|
PLD_GroupPosition = 0x1,
|
|
PLD_Bay = 0x0,
|
|
PLD_Ejectable = 0x0,
|
|
PLD_EjectRequired = 0x0,
|
|
PLD_CabinetNumber = 0x0,
|
|
PLD_CardCageNumber = 0x0,
|
|
PLD_Reference = 0x0,
|
|
PLD_Rotation = 0x0,
|
|
PLD_Order = 0x0,
|
|
PLD_VerticalOffset = 0xFFFF,
|
|
PLD_HorizontalOffset = 0xFFFF)
|
|
|
|
})
|
|
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
|
|
{
|
|
One,
|
|
0x09,
|
|
Zero,
|
|
Zero
|
|
})
|
|
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
|
|
{
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
|
|
{
|
|
0x000000A5,
|
|
}
|
|
Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake, ,, )
|
|
{
|
|
0x000000A2,
|
|
}
|
|
})
|
|
Method (CCVL, 0, NotSerialized)
|
|
{
|
|
Return (\_SB.CCST)
|
|
}
|
|
|
|
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler
|
|
{
|
|
0x00 // .
|
|
})
|
|
CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.URS0.UFN0._DSM._T_0 */
|
|
If ((_T_0 == ToUUID ("fe56cfeb-49d5-4378-a8a2-2978dbe54ad2")))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_1 = ToInteger (Arg2)
|
|
If ((_T_1 == Zero))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_2 = ToInteger (Arg1)
|
|
If ((_T_2 == Zero))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x03 // .
|
|
})
|
|
Break
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x01 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
ElseIf ((_T_1 == One))
|
|
{
|
|
Return (0x20)
|
|
Break
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
ElseIf ((_T_0 == ToUUID ("18de299f-9476-4fc9-b43b-8aeb713ed751")))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_3, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_3 = ToInteger (Arg2)
|
|
If ((_T_3 == Zero))
|
|
{
|
|
While (One)
|
|
{
|
|
Name (_T_4, 0x00) // _T_x: Emitted by ASL Compiler
|
|
_T_4 = ToInteger (Arg1)
|
|
If ((_T_4 == Zero))
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x03 // .
|
|
})
|
|
Break
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x01 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
ElseIf ((_T_3 == One))
|
|
{
|
|
Return (0x39)
|
|
Break
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
Else
|
|
{
|
|
Return (Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Break
|
|
}
|
|
|
|
Break
|
|
}
|
|
}
|
|
|
|
Method (PHYC, 0, NotSerialized)
|
|
{
|
|
Name (CFG0, Package (0x12)
|
|
{
|
|
/*Package (0x03)
|
|
{
|
|
Zero,
|
|
0x088E2198,
|
|
0x20
|
|
}*/
|
|
|
|
Package (0x03) { Zero, 0x088E2210, 0x23 },
|
|
Package (0x03) { Zero, 0x088E2004, 0x03 },
|
|
Package (0x03) { Zero, 0x088E218c, 0x7c },
|
|
Package (0x03) { Zero, 0x088E202c, 0x80 },
|
|
Package (0x03) { Zero, 0x088E2184, 0x0a },
|
|
Package (0x03) { Zero, 0x088E20b4, 0x19 },
|
|
Package (0x03) { Zero, 0x088E2194, 0x40 },
|
|
Package (0x03) { Zero, 0x088E2198, 0x28 },
|
|
Package (0x03) { Zero, 0x088E2214, 0x21 },
|
|
Package (0x03) { Zero, 0x088E2220, 0x00 },
|
|
Package (0x03) { Zero, 0x088E2224, 0x58 },
|
|
Package (0x03) { Zero, 0x088E2240, 0x35 },
|
|
Package (0x03) { Zero, 0x088E2244, 0x29 },
|
|
Package (0x03) { Zero, 0x088E2248, 0xca },
|
|
Package (0x03) { Zero, 0x088E224c, 0x04 },
|
|
Package (0x03) { Zero, 0x088E2250, 0x03 },
|
|
Package (0x03) { Zero, 0x088E223c, 0x00 },
|
|
Package (0x03) { Zero, 0x088E2210, 0x22 }
|
|
})
|
|
Return (CFG0) /* \_SB_.URS0.UFN0.PHYC.CFG0 */
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
|
|
Name (HPDB, Zero)
|
|
Name (PINA, Zero)
|
|
Name (CCST, Buffer (One)
|
|
{
|
|
0x02 // .
|
|
})
|
|
Name (HSFL, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Name (HPDS, Zero)
|
|
Name (USBC, Buffer (One)
|
|
{
|
|
0x0B // .
|
|
})
|
|
|
|
Name (DPPN, 0x0D)
|
|
Name (MUXC, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
|
|
|
|
|
|
Name (DPP1, Buffer (One)
|
|
{
|
|
0x00 // .
|
|
})
|
|
Name (SKYD, Buffer (One)
|
|
{
|
|
0x01 // .
|
|
})
|
|
|
|
|
|
Include("cust_thermal_zones.asl")
|
|
|
|
Name (HWNH, Zero)
|
|
Name (HWNL, Zero)
|
|
Device (HWN1)
|
|
{
|
|
Name (_HID, "QCOM02A9") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
If ((\_SB.HWNH == Zero))
|
|
{
|
|
Return (Zero)
|
|
}
|
|
Else
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
}
|
|
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.PMIC
|
|
})
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
GpioInt (Level, ActiveHigh, Exclusive, PullNone, 0x0000,
|
|
"\\_SB.PM01", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x0190
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.HWN1._CRS.RBUF */
|
|
}
|
|
|
|
Method (HAPI, 0, NotSerialized)
|
|
{
|
|
Name (CFG0, Package (0x03)
|
|
{
|
|
One,
|
|
One,
|
|
One
|
|
})
|
|
Return (CFG0) /* \_SB_.HWN1.HAPI.CFG0 */
|
|
}
|
|
|
|
Method (HAPC, 0, NotSerialized)
|
|
{
|
|
Name (CFG0, Package (0x16)
|
|
{
|
|
Zero,
|
|
0x0984,
|
|
Zero,
|
|
One,
|
|
One,
|
|
One,
|
|
One,
|
|
Zero,
|
|
0x04,
|
|
One,
|
|
0x03,
|
|
0x14,
|
|
One,
|
|
0x03,
|
|
Zero,
|
|
Zero,
|
|
0x06,
|
|
Zero,
|
|
Zero,
|
|
0x0535,
|
|
0x03,
|
|
One
|
|
})
|
|
Return (CFG0) /* \_SB_.HWN1.HAPC.CFG0 */
|
|
}
|
|
}
|
|
|
|
Device (HWN0)
|
|
{
|
|
Name (_HID, "QCOM02A8") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
If ((\_SB.HWNL == Zero))
|
|
{
|
|
Return (Zero)
|
|
}
|
|
Else
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
}
|
|
|
|
Method (HWNL, 0, NotSerialized)
|
|
{
|
|
Name (CFG0, Package (0x10)
|
|
{
|
|
One,
|
|
0x03,
|
|
0x019B,
|
|
0x14,
|
|
0x20,
|
|
0x02,
|
|
0x40,
|
|
0x03,
|
|
0x80,
|
|
0x04,
|
|
One,
|
|
One,
|
|
One,
|
|
0x03,
|
|
One,
|
|
One
|
|
})
|
|
Return (CFG0) /* \_SB_.HWN0.HWNL.CFG0 */
|
|
}
|
|
}
|
|
|
|
Device (CONT)
|
|
{
|
|
Name (_HID, "CONT1234") // _HID: Hardware ID
|
|
Name (_CID, "PNP0C60" /* Display Sensor Device */) // _CID: Compatible ID
|
|
}
|
|
|
|
Device (POWR)
|
|
{
|
|
Name (_HID, "POWR1234") // _HID: Hardware ID
|
|
Name (_CID, "PNP0C40" /* Standard Button Controller */) // _CID: Compatible ID
|
|
}
|
|
|
|
Device (SVBI)
|
|
{
|
|
Name (_HID, "SAMM0901") // _HID: Hardware ID
|
|
Name (_SUB, "RENEGA0E") // _SUB: Subsystem ID
|
|
}
|
|
|
|
Device (TSC1)
|
|
{
|
|
Name (_HID, "MSHW1003") // _HID: Hardware ID
|
|
Name (_UID, One) // _UID: Unique ID
|
|
Name (_DEP, Package (0x03) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.GIO0,
|
|
\_SB.IC6
|
|
})
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
I2cSerialBusV2 (0x0020, ControllerInitiated, 0x00061A80,
|
|
AddressingMode7Bit, "\\_SB.IC6",
|
|
0x00, ResourceConsumer, , Exclusive,
|
|
)
|
|
GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullUp, 0x0000,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x007D
|
|
}
|
|
GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,
|
|
"\\_SB.GIO0", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x007E
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.TSC1._CRS.RBUF */
|
|
}
|
|
|
|
/*Method (INFO, 0, NotSerialized)
|
|
{
|
|
Name (RBUF, Buffer (0x04)
|
|
{
|
|
0x0F, 0x01, 0x00, 0x00 // ....
|
|
})
|
|
Return (RBUF)
|
|
}*/
|
|
|
|
Name (PGID, Buffer (0x0A)
|
|
{
|
|
"\\_SB.TSC1"
|
|
})
|
|
Name (DBUF, Buffer (DBFL){})
|
|
CreateByteField (DBUF, Zero, STAT)
|
|
CreateByteField (DBUF, 0x02, DVAL)
|
|
CreateField (DBUF, 0x18, 0xA0, DEID)
|
|
Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
|
|
{
|
|
Return (0x03)
|
|
}
|
|
|
|
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
|
|
{
|
|
Return (0x03)
|
|
}
|
|
|
|
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
|
|
{
|
|
Return (0x03)
|
|
}
|
|
|
|
Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
|
|
{
|
|
DEID = Buffer (ESNL){}
|
|
DVAL = Zero
|
|
DEID = PGID /* \_SB_.TSC1.PGID */
|
|
If (\_SB.ABD.AVBL)
|
|
{
|
|
\_SB.PEP0.FLD0 = DBUF /* \_SB_.TSC1.DBUF */
|
|
}
|
|
}
|
|
|
|
Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
|
|
{
|
|
DEID = Buffer (ESNL){}
|
|
DVAL = 0x03
|
|
DEID = PGID /* \_SB_.TSC1.PGID */
|
|
If (\_SB.ABD.AVBL)
|
|
{
|
|
\_SB.PEP0.FLD0 = DBUF /* \_SB_.TSC1.DBUF */
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
|
|
Device (BTNS)
|
|
{
|
|
Name (_HID, "ACPI0011" /* Generic Buttons Device */) // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
GpioInt (Edge, ActiveBoth, Exclusive, PullDown, 0x0010,
|
|
"\\_SB.PM01", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x0000
|
|
}
|
|
GpioInt (Edge, ActiveBoth, ExclusiveAndWake, PullUp, 0x0000,
|
|
"\\_SB.PM01", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x0085
|
|
}
|
|
GpioInt (Edge, ActiveBoth, ExclusiveAndWake, PullDown, 0x0000,
|
|
"\\_SB.PM01", 0x00, ResourceConsumer, ,
|
|
)
|
|
{ // Pin list
|
|
0x0084
|
|
}
|
|
})
|
|
Return (RBUF) /* \_SB_.BTNS._CRS.RBUF */
|
|
}
|
|
|
|
Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
|
|
{
|
|
ToUUID ("fa6bd625-9ce8-470d-a2c7-b3ca36c4282e"),
|
|
Package (0x06)
|
|
{
|
|
Package (0x05)
|
|
{
|
|
Zero,
|
|
One,
|
|
Zero,
|
|
One,
|
|
0x0D
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
One,
|
|
Zero,
|
|
One,
|
|
One,
|
|
0x81
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
One,
|
|
One,
|
|
One,
|
|
0x0C,
|
|
0xE9
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
One,
|
|
0x02,
|
|
One,
|
|
0x0C,
|
|
0xEA
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
One,
|
|
0x03,
|
|
One,
|
|
0x90,
|
|
0x20
|
|
},
|
|
|
|
Package (0x05)
|
|
{
|
|
One,
|
|
0x04,
|
|
One,
|
|
0x90,
|
|
0x21
|
|
}
|
|
}
|
|
})
|
|
}
|
|
|
|
Device (QDCI)
|
|
{
|
|
Name (_DEP, Package (One) // _DEP: Dependencies
|
|
{
|
|
\_SB.GLNK
|
|
})
|
|
Name (_HID, "QCOM0224") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
}
|
|
|
|
Device (BTH0)
|
|
{
|
|
Name (_HID, "QCOM02B5") // _HID: Hardware ID
|
|
Alias (\_SB.PSUB, _SUB)
|
|
Name (_DEP, Package (0x03) // _DEP: Dependencies
|
|
{
|
|
\_SB.PEP0,
|
|
\_SB.PMIC,
|
|
\_SB.UAR7
|
|
})
|
|
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
|
|
{
|
|
Zero,
|
|
Zero
|
|
})
|
|
Name (_S4W, 0x02) // _S4W: S4 Device Wake State
|
|
Name (_S0W, 0x02) // _S0W: S0 Device Wake State
|
|
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name(PBUF, Buffer(0x22)
|
|
{
|
|
0x8e, 0x1d, 0x00, 0x01, 0x00, 0x03, 0x02, 0x35, 0x00, 0x01, 0x0a, 0x00,
|
|
0x00, 0xc2, 0x01, 0x00, 0x20, 0x00, 0x20, 0x00, 0x00, 0xc0, 0x5c, 0x5f,
|
|
0x53, 0x42, 0x2e, 0x55, 0x41, 0x52, 0x37, 0x00, 0x79, 0x00
|
|
})
|
|
Return(PBUF)
|
|
}
|
|
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
}
|
|
|
|
Include("adc.asl")
|
|
|
|
}
|
|
|
|
Name (WAKP, Package (0x02)
|
|
{
|
|
Zero,
|
|
Zero
|
|
})
|
|
|
|
|
|
|
|
}
|